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Searched defs:RCC_CFGR_HPRE_DIV2 (Results 1 – 25 of 37) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_rcc.h155 #define RCC_CFGR_HPRE_DIV2 (0x08U << RCC_CFGR_HPRE_Pos) ///< AHB = FCLK = S… macro
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dft32f030x6.h2289 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
A Dft32f032x8.h2370 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
A Dft32f030x8.h2328 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
A Dft32f032x6.h2369 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
A Dft32f072x8.h2366 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
A Dft32f072xb.h2595 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
/bsp/mm32l3xx/Libraries/MM32L3xx/Include/
A DMM32L3xx.h1248 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
/bsp/mm32f103x/Libraries/MM32F103/Include/
A DMM32F103.h1257 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
/bsp/tkm32F499/Libraries/CMSIS_and_startup/
A Dtk499.h1585 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
/bsp/mm32l07x/Libraries/MM32L0xx/Include/
A DMM32L0xx.h1236 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h2941 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dhk32f04ax4x6x8.h2936 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dhk32f031x4x6.h3011 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/
A Dair32f10x.h1371 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2… macro
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h3930 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dstm32l100xba.h3941 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dstm32l151xb.h3815 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dstm32l151xba.h3829 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dstm32l152xb.h3948 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dstm32l152xba.h3947 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dstm32l100xc.h4043 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dstm32l151xca.h4112 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dstm32l151xc.h4075 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro
A Dstm32l162xdx.h4422 #define RCC_CFGR_HPRE_DIV2 (0x00000080U) /*!< SYSCLK divided … macro

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