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Searched defs:SCG_LPFLLCSR_LPFLLTREN_MASK (Results 1 – 2 of 2) sorted by relevance

/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/
A DRV32M1_ri5cy.h17112 #define SCG_LPFLLCSR_LPFLLTREN_MASK (0x100U) macro
A DRV32M1_zero_riscy.h17939 #define SCG_LPFLLCSR_LPFLLTREN_MASK (0x100U) macro

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