| /bsp/mini4020/drivers/ |
| A D | lcdc.h | 56 #define SCR (0 << 9) //时钟源选择.行脉冲. macro
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| /bsp/zynqmp-r5-axu4ev/drivers/Zynq_HAL_Driver/sdps_v3_9/ |
| A D | xsdps_host.c | 204 static u8 SCR[8] = { 0U }; in XSdPs_SdModeInit() local
206 static u8 SCR[8] __attribute__ ((aligned(32))) = { 0U }; in XSdPs_SdModeInit() local
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| /bsp/yichip/yc3121-pos/Libraries/core/ |
| A D | misc.c | 27 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| /bsp/mm32f327x/Libraries/MM32F327x/Include/ |
| A D | reg_pwr.h | 71 …__IO u32 SCR; ///< clear status regi… member
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| A D | reg_uart.h | 81 …__IO u32 SCR; ///< Smart Card Regist… member
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| /bsp/fujitsu/mb9x/mb9bf568r/CMSIS/Include/ |
| A D | core_cm0.h | 298 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/ |
| A D | core_cm0.h | 340 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/efm32/Libraries/CMSIS/Include/ |
| A D | core_cm0.h | 296 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/CME_M7/CMSIS/CMSIS/Include/ |
| A D | core_cm0.h | 311 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ |
| A D | core_cm0.h | 331 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/ |
| A D | core_cm0.h | 311 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/samd21/sam_d2x_asflib/CMSIS/Include/ |
| A D | core_cm0.h | 340 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/mm32l07x/Libraries/CMSIS/CORE/ |
| A D | core_cm0.h | 296 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0.h | 340 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0.h | 340 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_cm0.h | 296 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/Core/ |
| A D | core_cm0.h | 311 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/nxp/lpc/lpc43xx/Libraries/CMSIS/Include/ |
| A D | core_cm0.h | 311 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0.h | 330 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/mm32f103x/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_cm0.h | 286 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/wch/arm/ch579m/libraries/CMSIS/Include/ |
| A D | core_cm0.h | 340 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/xplorer4330/Libraries/CMSIS/Include/ |
| A D | core_cm0.h | 311 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/essemi/es32f0654/libraries/CMSIS/Include/ |
| A D | core_cm0.h | 297 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
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| /bsp/acm32/acm32f0x0-nucleo/libraries/CMSIS/ |
| A D | core_cm0.h | 395 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| /bsp/mm32f327x/Libraries/CMSIS/IAR_Core/ |
| A D | core_cm0.h | 335 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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