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Searched defs:SLPCTRL (Results 1 – 2 of 2) sorted by relevance

/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/
A DRV32M1_ri5cy.h5408 __IO uint32_t SLPCTRL; /**< Sleep Control Register, offset: 0x80 */ member
A DRV32M1_zero_riscy.h4678 __IO uint32_t SLPCTRL; /**< Sleep Control Register, offset: 0x80 */ member

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