1 /**
2 *****************************************************************************
3 * @file cmem7_spi.c
4 *
5 * @brief CMEM7 SPI source file
6 *
7 *
8 * @version V1.0
9 * @date 3. September 2013
10 *
11 * @note
12 *
13 *****************************************************************************
14 * @attention
15 *
16 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
17 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
18 * TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
19 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
20 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
21 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
22 *
23 * <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2>
24 *****************************************************************************
25 */
26
27 #include "cmem7_spi.h"
28
SPI_Init(SPI0_Type * SPIx,SPI_InitTypeDef * init)29 void SPI_Init(SPI0_Type* SPIx, SPI_InitTypeDef *init) {
30 assert_param(IS_SPI_ALL_PERIPH(SPIx));
31 assert_param(init);
32 assert_param(IS_SPI_MODE(init->SPI_Mode));
33 assert_param(init->SPI_BitLength != 0);
34
35 if (init->SPI_Mode == SPI_MODE_CPOL_0_CPHA_0) {
36 SPIx->CTRL_b.CLK_HIGH = FALSE;
37 SPIx->CTRL_b.NEG_EDGE = TRUE;
38 } else if (init->SPI_Mode == SPI_MODE_CPOL_0_CPHA_1) {
39 SPIx->CTRL_b.CLK_HIGH = FALSE;
40 SPIx->CTRL_b.NEG_EDGE = FALSE;
41 } else if (init->SPI_Mode == SPI_MODE_CPOL_1_CPHA_0) {
42 SPIx->CTRL_b.CLK_HIGH = TRUE;
43 SPIx->CTRL_b.NEG_EDGE = FALSE;
44 } else {
45 SPIx->CTRL_b.CLK_HIGH = TRUE;
46 SPIx->CTRL_b.NEG_EDGE = TRUE;
47 }
48
49 SPIx->CTRL_b.RX_EN = init->SPI_RxEn;
50 SPIx->BCNT_b.CNT = init->SPI_BitLength - 1;
51 SPIx->DIV = init->SPI_ClockDividor;
52 SPIx->GAP = (init->SPI_Gap == 0) ? 0 : init->SPI_Gap / 2 + 1;
53 }
54
SPI_Enable(SPI0_Type * SPIx,BOOL enable)55 void SPI_Enable(SPI0_Type* SPIx, BOOL enable) {
56 assert_param(IS_SPI_ALL_PERIPH(SPIx));
57
58 SPIx->CTRL_b.EN = enable;
59 }
60
SPI_EnableInt(SPI0_Type * SPIx,uint32_t Int,BOOL enable)61 void SPI_EnableInt(SPI0_Type* SPIx, uint32_t Int, BOOL enable) {
62 assert_param(IS_SPI_ALL_PERIPH(SPIx));
63 assert_param(IS_SPI_INT(Int));
64
65 if (enable) {
66 SPIx->INT_MASK &= ~Int;
67 } else {
68 SPIx->INT_MASK |= Int;
69 }
70
71 SPIx->INT_MASK &= SPI_INT_ALL;
72 }
73
SPI_GetIntStatus(SPI0_Type * SPIx,uint32_t Int)74 BOOL SPI_GetIntStatus(SPI0_Type* SPIx, uint32_t Int) {
75 assert_param(IS_SPI_ALL_PERIPH(SPIx));
76 assert_param(IS_SPI_INT(Int));
77
78 if (0 != (SPIx->INT_STATUS & Int)) {
79 return TRUE;
80 }
81
82 return FALSE;
83 }
SPI_ClearInt(SPI0_Type * SPIx,uint32_t Int)84 void SPI_ClearInt(SPI0_Type* SPIx, uint32_t Int) {
85 assert_param(IS_SPI_ALL_PERIPH(SPIx));
86 assert_param(IS_SPI_INT(Int));
87
88 SPIx->INT_STATUS = Int;
89 }
90
SPI_ReadFifo(SPI0_Type * SPIx,uint8_t size,uint32_t * data)91 uint8_t SPI_ReadFifo(SPI0_Type* SPIx, uint8_t size, uint32_t* data) {
92 uint8_t count;
93
94 assert_param(IS_SPI_ALL_PERIPH(SPIx));
95 assert_param(data);
96
97 if (!SPIx->CTRL_b.EN) {
98 return 0;
99 }
100
101 count = 0;
102 while (!SPIx->STATUS_b.RFIFO_EMPTY && count < size) {
103 uint32_t d = SPIx->RW_DATA;
104 d <<= (32 - SPIx->BCNT_b.CNT - 1);
105 d >>= (32 - SPIx->BCNT_b.CNT - 1);
106 *(data + count++) = d;
107 }
108
109 return count;
110 }
111
SPI_WriteFifo(SPI0_Type * SPIx,uint8_t Size,uint32_t * data)112 uint8_t SPI_WriteFifo(SPI0_Type* SPIx, uint8_t Size, uint32_t* data) {
113 uint8_t count;
114
115 assert_param(IS_SPI_ALL_PERIPH(SPIx));
116 assert_param(data);
117
118 if (!SPIx->CTRL_b.EN) {
119 return 0;
120 }
121
122 count = 0;
123 while (!SPIx->STATUS_b.TFIFO_FULL && count < Size) {
124 uint32_t d = *(data + count++);
125 d <<= (32 - SPIx->BCNT_b.CNT - 1);
126 SPIx->RW_DATA = d;
127 }
128
129 return count;
130 }
131
SPI_Transcation(SPI0_Type * SPIx,uint8_t size)132 BOOL SPI_Transcation(SPI0_Type* SPIx, uint8_t size) {
133 assert_param(IS_SPI_ALL_PERIPH(SPIx));
134 assert_param(size);
135
136 if (!SPIx->CTRL_b.EN) {
137 return FALSE;
138 }
139
140 SPIx->TRANS_CNT = size - 1;
141 SPIx->TRANS_START_b.TX_TRIGGER = TRUE;
142
143 return TRUE;
144 }
145
146