1 /*!
2 * @file apm32f0xx_tmr.c
3 *
4 * @brief This file contains all the functions for the TMR peripheral
5 *
6 * @version V1.0.3
7 *
8 * @date 2022-09-20
9 *
10 * @attention
11 *
12 * Copyright (C) 2020-2022 Geehy Semiconductor
13 *
14 * You may not use this file except in compliance with the
15 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
16 *
17 * The program is only for reference, which is distributed in the hope
18 * that it will be useful and instructional for customers to develop
19 * their software. Unless required by applicable law or agreed to in
20 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
21 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
23 * and limitations under the License.
24 */
25
26 #include "apm32f0xx_tmr.h"
27 #include "apm32f0xx_rcm.h"
28
29 /** @addtogroup APM32F0xx_StdPeriphDriver
30 @{
31 */
32
33 /** @addtogroup TMR_Driver TMR Driver
34 @{
35 */
36
37 /** @defgroup TMR_Marcos Marcos
38 @{
39 */
40
41 /**@} end of group TMR_Marcos */
42
43 /** @defgroup TMR_Enumerations Enumerations
44 @{
45 */
46
47 /**@} end of group TMR_Enumerations */
48
49 /** @defgroup TMR_Structures Structures
50 @{
51 */
52
53 /**@} end of group TMR_Structures */
54
55 /** @defgroup TMR_Variables Variables
56 @{
57 */
58
59 /**@} end of group TMR_Variables */
60
61 /** @defgroup TMR_Functions Functions
62 @{
63 */
64
65 /*!
66 * @brief Reset the TMR peripheral registers to their default reset values
67 *
68 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
69 *
70 * @retval None
71 *
72 * @note TMR2 TMR15 it's not for APM32F030 devices
73 * TMR7 it's only for APM32F072 and APM32F091 devices
74 */
TMR_Reset(TMR_T * TMRx)75 void TMR_Reset(TMR_T* TMRx)
76 {
77 if (TMRx == TMR1)
78 {
79 RCM_EnableAPB2PeriphReset(RCM_APB2_PERIPH_TMR1);
80 RCM_DisableAPB2PeriphReset(RCM_APB2_PERIPH_TMR1);
81 }
82 else if (TMRx == TMR2)
83 {
84 RCM_EnableAPB1PeriphReset(RCM_APB1_PERIPH_TMR2);
85 RCM_DisableAPB1PeriphReset(RCM_APB1_PERIPH_TMR2);
86 }
87 else if (TMRx == TMR3)
88 {
89 RCM_EnableAPB1PeriphReset(RCM_APB1_PERIPH_TMR3);
90 RCM_DisableAPB1PeriphReset(RCM_APB1_PERIPH_TMR3);
91 }
92 else if (TMRx == TMR6)
93 {
94 RCM_EnableAPB1PeriphReset(RCM_APB1_PERIPH_TMR6);
95 RCM_DisableAPB1PeriphReset(RCM_APB1_PERIPH_TMR6);
96 }
97 else if (TMRx == TMR7)
98 {
99 RCM_EnableAPB1PeriphReset(RCM_APB1_PERIPH_TMR7);
100 RCM_DisableAPB1PeriphReset(RCM_APB1_PERIPH_TMR7);
101 }
102 else if (TMRx == TMR14)
103 {
104 RCM_EnableAPB1PeriphReset(RCM_APB1_PERIPH_TMR14);
105 RCM_DisableAPB1PeriphReset(RCM_APB1_PERIPH_TMR14);
106 }
107 else if (TMRx == TMR15)
108 {
109 RCM_EnableAPB2PeriphReset(RCM_APB2_PERIPH_TMR15);
110 RCM_DisableAPB2PeriphReset(RCM_APB2_PERIPH_TMR15);
111 }
112 else if (TMRx == TMR16)
113 {
114 RCM_EnableAPB2PeriphReset(RCM_APB2_PERIPH_TMR16);
115 RCM_DisableAPB2PeriphReset(RCM_APB2_PERIPH_TMR16);
116 }
117 else if (TMRx == TMR17)
118 {
119 RCM_EnableAPB2PeriphReset(RCM_APB2_PERIPH_TMR17);
120 RCM_DisableAPB2PeriphReset(RCM_APB2_PERIPH_TMR17);
121 }
122 }
123
124 /*!
125 * @brief Initializes the TMRx Time Base Unit peripheral according to
126 * the specified parameters in the TMR_ConfigTimeBase
127 *
128 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
129 *
130 * @param timeBaseConfig: pointer to a TMR_TimeBase_T structure that contains
131 * the configuration information for the specified TMR peripheral
132 *
133 * @retval None
134 *
135 * @note TMR2 it's not for APM32F030 devices
136 * TMR7 it's only for APM32F072 and APM32F091 devices
137 */
TMR_ConfigTimeBase(TMR_T * TMRx,TMR_TimeBase_T * timeBaseConfig)138 void TMR_ConfigTimeBase(TMR_T* TMRx, TMR_TimeBase_T* timeBaseConfig)
139 {
140 if ((TMRx == TMR1) || (TMRx == TMR3))
141 {
142 /** Select the Counter Mode */
143 TMRx->CTRL1_B.CNTDIR = timeBaseConfig->counterMode;
144 TMRx->CTRL1_B.CAMSEL = (timeBaseConfig->counterMode) >> 1;
145 }
146
147 if (TMRx != TMR6)
148 {
149 /** Set the clock division */
150 TMRx->CTRL1_B.CLKDIV = timeBaseConfig->clockDivision;
151 }
152
153 /** Set the Autoreload value */
154 TMRx->AUTORLD = timeBaseConfig->period ;
155
156 /** Set the Prescaler value */
157 TMRx->PSC = timeBaseConfig->div ;
158
159 if ((TMRx == TMR1) || (TMRx == TMR15) || (TMRx == TMR16) || (TMRx == TMR17))
160 {
161 /** Set the Repetition Counter value */
162 TMRx->REPCNT = timeBaseConfig->repetitionCounter;
163 }
164
165 /** Enable Update generation */
166 TMRx->CEG_B.UEG = BIT_SET;
167 }
168
169 /*!
170 * @brief Fills each TMR_ConfigTimeBaseStruct member with its default value
171 *
172 * @param timeBaseConfig: pointer to a TMR_TimeBase_T structure that contains
173 * the configuration information for the specified TMR peripheral
174 *
175 * @retval None
176 */
TMR_ConfigTimeBaseStruct(TMR_TimeBase_T * timeBaseConfig)177 void TMR_ConfigTimeBaseStruct(TMR_TimeBase_T* timeBaseConfig)
178 {
179 timeBaseConfig->period = 0xFFFFFFFF;
180 timeBaseConfig->div = 0x0000;
181 timeBaseConfig->clockDivision = TMR_CKD_DIV1;
182 timeBaseConfig->counterMode = TMR_COUNTER_MODE_UP;
183 timeBaseConfig->repetitionCounter = 0x0000;
184 }
185
186 /*!
187 * @brief Configures the TMRx Div
188 *
189 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
190 *
191 * @param div: specifies the Div Register value
192 *
193 * @param mode: specifies the TMR Prescaler Reload mode
194 *
195 * @retval None
196 *
197 * @note TMR2 it's not for APM32F030 devices
198 * TMR7 it's only for APM32F072 and APM32F091 devices
199 */
TMR_ConfigDIV(TMR_T * TMRx,uint16_t div,TMR_PRESCALER_RELOAD_T mode)200 void TMR_ConfigDIV(TMR_T* TMRx, uint16_t div, TMR_PRESCALER_RELOAD_T mode)
201 {
202 TMRx->PSC = div;
203 TMRx->CEG_B.UEG = mode;
204 }
205
206 /*!
207 * @brief Specifies the TMRx Counter Mode to be used
208 *
209 * @param TMRx: x can be can be 1 or 3 to select Timer
210 *
211 * @param mode : specifies the Counter Mode to be used
212 *
213 * @retval None
214 */
TMR_ConfigCounterMode(TMR_T * TMRx,TMR_COUNTER_MODE_T mode)215 void TMR_ConfigCounterMode(TMR_T* TMRx, TMR_COUNTER_MODE_T mode)
216 {
217 TMRx->CTRL1_B.CNTDIR = mode;
218 TMRx->CTRL1_B.CAMSEL = (mode) >> 1;
219 }
220
221 /*!
222 * @brief Sets the TMRx Counter Register value
223 *
224 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
225 *
226 * @param counter: specifies the Counter register new value
227 *
228 * @retval None
229 *
230 * @note TMR2 it's not for APM32F030 devices
231 * TMR7 it's only for APM32F072 and APM32F091 devices
232 */
TMR_SetCounter(TMR_T * TMRx,uint32_t counter)233 void TMR_SetCounter(TMR_T* TMRx, uint32_t counter)
234 {
235 TMRx->CNT = counter;
236 }
237
238 /*!
239 * @brief Read the TMRx Counter value
240 *
241 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
242 *
243 * @retval Counter Register value
244 *
245 * @note TMR2 it's not for APM32F030 devices
246 * TMR7 it's only for APM32F072 and APM32F091 devices
247 */
TMR_ReadCounter(TMR_T * TMRx)248 uint32_t TMR_ReadCounter(TMR_T* TMRx)
249 {
250 return (uint32_t)TMRx->CNT;
251 }
252
253 /*!
254 * @brief Sets the AutoReload Register value
255 *
256 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
257 *
258 * @param autoReload: autoReload register new value
259 *
260 * @retval None
261 *
262 * @note TMR2 it's not for APM32F030 devices
263 * TMR7 it's only for APM32F072 and APM32F091 devices
264 */
TMR_SetAutoReload(TMR_T * TMRx,uint32_t autoReload)265 void TMR_SetAutoReload(TMR_T* TMRx, uint32_t autoReload)
266 {
267 TMRx->AUTORLD = autoReload;
268 }
269
270 /*!
271 * @brief Read the TMRx Div value
272 *
273 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
274 *
275 * @retval Div Register value
276 *
277 * @note TMR2 it's not for APM32F030 devices
278 * TMR7 it's only for APM32F072 and APM32F091 devices
279 */
TMR_ReadDiv(TMR_T * TMRx)280 uint32_t TMR_ReadDiv(TMR_T* TMRx)
281 {
282 return (uint32_t)TMRx->PSC;
283 }
284
285 /*!
286 * @brief Enable the No update event
287 *
288 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
289 *
290 * @retval None
291 *
292 * @note TMR2 it's not for APM32F030 devices
293 * TMR7 it's only for APM32F072 and APM32F091 devices
294 */
TMR_EnableNGUpdate(TMR_T * TMRx)295 void TMR_EnableNGUpdate(TMR_T* TMRx)
296 {
297 TMRx->CTRL1_B.UD = ENABLE;
298 }
299
300 /*!
301 * @brief Enable the No update event
302 *
303 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
304 *
305 * @retval None
306 *
307 * @note TMR2 it's not for APM32F030 devices
308 * TMR7 it's only for APM32F072 and APM32F091 devices
309 */
TMR_DisableNGUpdate(TMR_T * TMRx)310 void TMR_DisableNGUpdate(TMR_T* TMRx)
311 {
312 TMRx->CTRL1_B.UD = DISABLE;
313 }
314
315 /*!
316 * @brief Configures the Update Request Interrupt source.
317 *
318 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
319 *
320 * @param source: Config the Update source
321 *
322 * @retval None
323 *
324 * @note TMR2 it's not for APM32F030 devices
325 * TMR7 it's only for APM32F072 and APM32F091 devices
326 */
TMR_ConfigUPdateRequest(TMR_T * TMRx,TMR_UPDATE_SOURCE_T source)327 void TMR_ConfigUPdateRequest(TMR_T* TMRx, TMR_UPDATE_SOURCE_T source)
328 {
329 if (source != TMR_UPDATE_SOURCE_GLOBAL)
330 {
331 TMRx->CTRL1_B.URSSEL = BIT_SET;
332 }
333 else
334 {
335 TMRx->CTRL1_B.URSSEL = BIT_RESET;
336 }
337 }
338
339 /*!
340 * @brief Enables peripheral Preload register on AUTORLD
341 *
342 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
343 *
344 * @retval None
345 *
346 * @note TMR2 it's not for APM32F030 devices
347 * TMR7 it's only for APM32F072 and APM32F091 devices
348 */
TMR_EnableAUTOReload(TMR_T * TMRx)349 void TMR_EnableAUTOReload(TMR_T* TMRx)
350 {
351 TMRx->CTRL1_B.ARPEN = ENABLE;
352 }
353
354 /*!
355 * @brief Disable peripheral Preload register on AUTORLD
356 *
357 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
358 *
359 * @retval None
360 *
361 * @note TMR2 it's not for APM32F030 devices
362 * TMR7 it's only for APM32F072 and APM32F091 devices
363 */
TMR_DisableAUTOReload(TMR_T * TMRx)364 void TMR_DisableAUTOReload(TMR_T* TMRx)
365 {
366 TMRx->CTRL1_B.ARPEN = DISABLE;
367 }
368
369 /*!
370 * @brief Selects the One Pulse Mode
371 *
372 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
373 *
374 * @param OPMode:Config OP Mode to be used
375 *
376 * @retval None
377 *
378 * @note TMR2 it's not for APM32F030 devices
379 * TMR7 it's only for APM32F072 and APM32F091 devices
380 */
TMR_SelectOnePulseMode(TMR_T * TMRx,TMR_OPMODE_T OPMode)381 void TMR_SelectOnePulseMode(TMR_T* TMRx, TMR_OPMODE_T OPMode)
382 {
383 TMRx->CTRL1_B.SPMEN = OPMode;
384 }
385
386 /*!
387 * @brief Sets the Clock Division value
388 *
389 * @param TMRx: x can be can be 1��2��3, 14, 15, 16 and 17 to select Timer
390 *
391 * @param clockDivision: clock division value
392 *
393 * @retval None
394 *
395 * @note TMR2 it's not for APM32F030 devices
396 * TMR7 it's only for APM32F072 and APM32F091 devices
397 */
TMR_SetClockDivision(TMR_T * TMRx,TMR_CKD_T clockDivision)398 void TMR_SetClockDivision(TMR_T* TMRx, TMR_CKD_T clockDivision)
399 {
400 TMRx->CTRL1_B.CLKDIV = clockDivision;
401 }
402
403 /*!
404 * @brief Enable the specified TMR peripheral
405 *
406 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
407 *
408 * @retval None
409 *
410 * @note TMR2 it's not for APM32F030 devices
411 * TMR7 it's only for APM32F072 and APM32F091 devices
412 */
TMR_Enable(TMR_T * TMRx)413 void TMR_Enable(TMR_T* TMRx)
414 {
415 TMRx->CTRL1_B.CNTEN = ENABLE;
416 }
417
418 /*!
419 * @brief Disable the specified TMR peripheral
420 *
421 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
422 *
423 * @retval None
424 *
425 * @note TMR2 it's not for APM32F030 devices
426 * TMR7 it's only for APM32F072 and APM32F091 devices
427 */
TMR_Disable(TMR_T * TMRx)428 void TMR_Disable(TMR_T* TMRx)
429 {
430 TMRx->CTRL1_B.CNTEN = DISABLE;
431 }
432
433 /*!
434 * @brief Configures the: Break feature, dead time, Lock level, the OSSI
435 *
436 * @param TMRx: x can be can be 1, 15, 16 and 17 to select Timer
437 *
438 * @param structure: pointer to a TMR_BDTInit_T structure that contains
439 * the BDT Register configuration information for the TMR peripheral
440 *
441 * @retval None
442 */
TMR_ConfigBDT(TMR_T * TMRx,TMR_BDTInit_T * structure)443 void TMR_ConfigBDT(TMR_T* TMRx, TMR_BDTInit_T* structure)
444 {
445 TMRx->BDT = (uint32_t)(((uint32_t)structure->automaticOutput) << 14) |
446 (((uint32_t)structure->breakPolarity) << 13) |
447 (((uint32_t)structure->breakState) << 12) |
448 (((uint32_t)structure->RMOS_State) << 11) |
449 (((uint32_t)structure->IMOS_State) << 10) |
450 (((uint32_t)structure->lockLevel) << 8) |
451 ((uint32_t)structure->deadTime);
452 }
453
454 /*!
455 * @brief Initialize the BDT timer with its default value.
456 *
457 * @param structure: pointer to a TMR_BDTInit_T structure that contains
458 * the BDT Register configuration information for the TMR peripheral
459 *
460 * @retval None
461 */
TMR_ConfigBDTStructInit(TMR_BDTInit_T * structure)462 void TMR_ConfigBDTStructInit(TMR_BDTInit_T* structure)
463 {
464 structure->RMOS_State = TMR_RMOS_STATE_DISABLE;
465 structure->IMOS_State = TMR_IMOS_STATE_DISABLE;
466 structure->lockLevel = TMR_LOCK_LEVEL_OFF;
467 structure->deadTime = 0x00;
468 structure->breakState = TMR_BREAK_STATE_DISABLE;
469 structure->breakPolarity = TMR_BREAK_POLARITY_LOW;
470 structure->automaticOutput = TMR_AUTOMATIC_OUTPUT_DISABLE;
471 }
472
473 /*!
474 * @brief Enable TMRx PWM output.
475 *
476 * @param TMRx: x can be can be 1, 15, 16 and 17 to select Timer
477 *
478 * @retval None
479 */
TMR_EnablePWMOutputs(TMR_T * TMRx)480 void TMR_EnablePWMOutputs(TMR_T* TMRx)
481 {
482 TMRx->BDT_B.MOEN = ENABLE;
483 }
484
485 /*!
486 * @brief Disable TMRx PWM output.
487 *
488 * @param TMRx: x can be can be 1, 15, 16 and 17 to select Timer
489 *
490 * @retval None
491 */
TMR_DisablePWMOutputs(TMR_T * TMRx)492 void TMR_DisablePWMOutputs(TMR_T* TMRx)
493 {
494 TMRx->BDT_B.MOEN = DISABLE;
495 }
496
497 /*!
498 * @brief Configure channel 1 according to parameters
499 *
500 * @param TMRx: x can be can be 1, 2, 3, 14, 15, 16 and 17 to select Timer
501 *
502 * @param OCcongigStruct: Channel configuration structure
503 *
504 * @retval None
505 *
506 * @note TMR2 it's not for APM32F030 devices
507 */
TMR_OC1Config(TMR_T * TMRx,TMR_OCConfig_T * OCcongigStruct)508 void TMR_OC1Config(TMR_T* TMRx, TMR_OCConfig_T* OCcongigStruct)
509 {
510
511 /** Disable the Channel 1: Reset the CC1EN Bit */
512 TMRx->CCEN_B.CC1EN = BIT_RESET;
513
514 /** Reset and Select the Output Compare Mode Bits */
515 TMRx->CCM1_OUTPUT_B.CC1SEL = BIT_RESET;
516 TMRx->CCM1_OUTPUT_B.OC1MOD = OCcongigStruct->OC_Mode;
517
518 /** Reset and Set the Output Polarity level */
519 TMRx->CCEN_B.CC1POL = OCcongigStruct->OC_Polarity;
520
521 /** Set the Output State */
522 TMRx->CCEN_B.CC1EN = OCcongigStruct->OC_OutputState;
523
524 if ((TMRx == TMR1) || (TMRx == TMR15) || (TMRx == TMR16)
525 || (TMRx == TMR17))
526 {
527 /** Reset and Set the Output N Polarity level */
528 TMRx->CCEN_B.CC1NPOL = OCcongigStruct->OC_NPolarity;
529
530 /** Reset and Set the Output N State */
531 TMRx->CCEN_B.CC1NEN = OCcongigStruct->OC_OutputNState;
532
533 /** Reset the Output Compare and Output Compare N IDLE State */
534 TMRx->CTRL2_B.OC1OIS = BIT_RESET;
535 TMRx->CTRL2_B.OC1NOIS = BIT_RESET;
536
537 /** Set the Output Idle state */
538 TMRx->CTRL2_B.OC1OIS = OCcongigStruct->OC_Idlestate;
539 /** Set the Output N State */
540 TMRx->CTRL2_B.OC1NOIS = OCcongigStruct->OC_NIdlestate;
541 }
542
543 /** Set the Capture Compare Register value */
544 TMRx->CC1 = OCcongigStruct->Pulse;
545 }
546
547 /*!
548 * @brief Configure channel 2 according to parameters
549 *
550 * @param TMRx: x can be can be 1��2��3 and 15 to select Timer
551 *
552 * @param OCcongigStruct: Channel configuration structure
553 *
554 * @retval None
555 *
556 * @note TMR2 it's not for APM32F030 devices
557 */
TMR_OC2Config(TMR_T * TMRx,TMR_OCConfig_T * OCcongigStruct)558 void TMR_OC2Config(TMR_T* TMRx, TMR_OCConfig_T* OCcongigStruct)
559 {
560
561 /** Disable the Channel 2: Reset the CC2EN Bit */
562 TMRx->CCEN_B.CC2EN = BIT_RESET;
563
564 /** Reset and Select the Output Compare Mode Bits */
565 TMRx->CCM1_OUTPUT_B.CC2SEL = BIT_RESET;
566 TMRx->CCM1_OUTPUT_B.OC2MOD = OCcongigStruct->OC_Mode;
567
568 /** Reset and Set the Output Polarity level */
569 TMRx->CCEN_B.CC2POL = BIT_RESET;
570 TMRx->CCEN_B.CC2POL = OCcongigStruct->OC_Polarity;
571
572 /** Set the Output State */
573 TMRx->CCEN_B.CC2EN = OCcongigStruct->OC_OutputState;
574
575 if (TMRx == TMR1)
576 {
577 /** Reset and Set the Output N Polarity level */
578 TMRx->CCEN_B.CC2NPOL = BIT_RESET;
579 TMRx->CCEN_B.CC2NPOL = OCcongigStruct->OC_NPolarity;
580
581 /** Reset and Set the Output N State */
582 TMRx->CCEN_B.CC2NEN = BIT_RESET;
583 TMRx->CCEN_B.CC2NEN = OCcongigStruct->OC_OutputNState;
584
585 /** Reset the Output Compare and Output Compare N IDLE State */
586 TMRx->CTRL2_B.OC2OIS = BIT_RESET;
587 TMRx->CTRL2_B.OC2NOIS = BIT_RESET;
588
589 /** Set the Output Idle state */
590 TMRx->CTRL2_B.OC2OIS = OCcongigStruct->OC_Idlestate;
591 /** Set the Output N State */
592 TMRx->CTRL2_B.OC2NOIS = OCcongigStruct->OC_NIdlestate;
593 }
594
595 /** Set the Capture Compare Register value */
596 TMRx->CC2 = OCcongigStruct->Pulse;
597 }
598
599 /*!
600 * @brief Configure channel 3 according to parameters
601 *
602 * @param TMRx: x can be can be 1, 2, 3 to select Timer
603 *
604 * @param OCcongigStruct: Channel configuration structure
605 *
606 * @retval None
607 *
608 * @note TMR2 it's not for APM32F030 devices
609 */
TMR_OC3Config(TMR_T * TMRx,TMR_OCConfig_T * OCcongigStruct)610 void TMR_OC3Config(TMR_T* TMRx, TMR_OCConfig_T* OCcongigStruct)
611 {
612
613 /** Disable the Channel 3: Reset the CC3EN Bit */
614 TMRx->CCEN_B.CC3EN = BIT_RESET;
615
616 /** Reset and Select the Output Compare Mode Bits */
617 TMRx->CCM2_OUTPUT_B.CC3SEL = BIT_RESET;
618 TMRx->CCM2_OUTPUT_B.OC3MOD = OCcongigStruct->OC_Mode;
619
620 /** Reset and Set the Output Polarity level */
621 TMRx->CCEN_B.CC3POL = BIT_RESET;
622 TMRx->CCEN_B.CC3POL = OCcongigStruct->OC_Polarity;
623
624 /** Set the Output State */
625 TMRx->CCEN_B.CC3EN = OCcongigStruct->OC_OutputState;
626
627 if (TMRx == TMR1)
628 {
629 /** Reset and Set the Output N Polarity level */
630 TMRx->CCEN_B.CC3NPOL = BIT_RESET;
631 TMRx->CCEN_B.CC3NPOL = OCcongigStruct->OC_NPolarity;
632
633 /** Reset and Set the Output N State */
634 TMRx->CCEN_B.CC3NEN = BIT_RESET;
635 TMRx->CCEN_B.CC3NEN = OCcongigStruct->OC_OutputNState;
636
637 /** Reset the Output Compare and Output Compare N IDLE State */
638 TMRx->CTRL2_B.OC3OIS = BIT_RESET;
639 TMRx->CTRL2_B.OC3NOIS = BIT_RESET;
640
641 /** Set the Output Idle state */
642 TMRx->CTRL2_B.OC3OIS = OCcongigStruct->OC_Idlestate;
643 /** Set the Output N State */
644 TMRx->CTRL2_B.OC3NOIS = OCcongigStruct->OC_NIdlestate;
645 }
646
647 /** Set the Capture Compare Register value */
648 TMRx->CC3 = OCcongigStruct->Pulse;
649 }
650
651 /*!
652 * @brief Configure channel 4 according to parameters
653 *
654 * @param TMRx: x can be can be 1, 2, 3 to select Timer
655 *
656 * @param OCcongigStruct: Channel configuration structure
657 *
658 * @retval None
659 *
660 * @note TMR2 it's not for APM32F030 devices
661 */
TMR_OC4Config(TMR_T * TMRx,TMR_OCConfig_T * OCcongigStruct)662 void TMR_OC4Config(TMR_T* TMRx, TMR_OCConfig_T* OCcongigStruct)
663 {
664
665 /** Disable the Channel 4: Reset the CC4EN Bit */
666 TMRx->CCEN_B.CC4EN = BIT_RESET;
667
668 /** Reset and Select the Output Compare Mode Bits */
669 TMRx->CCM2_OUTPUT_B.CC4SEL = BIT_RESET;
670 TMRx->CCM2_OUTPUT_B.OC4MOD = OCcongigStruct->OC_Mode;
671
672 /** Reset and Set the Output Polarity level */
673 TMRx->CCEN_B.CC4POL = BIT_RESET;
674 TMRx->CCEN_B.CC4POL = OCcongigStruct->OC_Polarity;
675
676 /** Set the Output State */
677 TMRx->CCEN_B.CC4EN = OCcongigStruct->OC_OutputState;
678
679 if (TMRx == TMR1)
680 {
681 /** Reset the Output Compare and Output Compare IDLE State */
682 TMRx->CTRL2_B.OC4OIS = BIT_RESET;
683
684 /** Set the Output Idle state */
685 TMRx->CTRL2_B.OC4OIS = OCcongigStruct->OC_Idlestate;
686 }
687
688 /** Set the Capture Compare Register value */
689 TMRx->CC4 = OCcongigStruct->Pulse;
690 }
691
692 /*!
693 * @brief Initialize the OC timer with its default value.
694 *
695 * @param OCcongigStruct: Channel configuration structure
696 *
697 * @retval None
698 */
TMR_OCConfigStructInit(TMR_OCConfig_T * OCcongigStruct)699 void TMR_OCConfigStructInit(TMR_OCConfig_T* OCcongigStruct)
700 {
701 /** Set the default configuration */
702 OCcongigStruct->OC_Mode = TMR_OC_MODE_TMRING;
703 OCcongigStruct->OC_OutputState = TMR_OUTPUT_STATE_DISABLE;
704 OCcongigStruct->OC_OutputNState = TMR_OUTPUT_NSTATE_DISABLE;
705 OCcongigStruct->Pulse = 0x0000;
706 OCcongigStruct->OC_Polarity = TMR_OC_POLARITY_HIGH;
707 OCcongigStruct->OC_NPolarity = TMR_OC_NPOLARITY_HIGH;
708 OCcongigStruct->OC_Idlestate = TMR_OCIDLESTATE_RESET;
709 OCcongigStruct->OC_NIdlestate = TMR_OCNIDLESTATE_RESET;
710 }
711
712 /*!
713 * @brief Selects the Output Compare Mode.
714 *
715 * @param TMRx: x can be can be 1��2��3, 14, 15, 16 and 17 to select Timer
716 *
717 * @param channel: specifies the TMR Channel
718 * This parameter can be one of the following values:
719 * @arg TMR_CHANNEL_1
720 * @arg TMR_CHANNEL_2
721 * @arg TMR_CHANNEL_3
722 * @arg TMR_CHANNEL_4
723 *
724 * @param OCMode: specifies the TMR Output Compare Mode
725 * This parameter can be one of the following values:
726 * @arg TMR_OC_MODE_TMRING
727 * @arg TMR_OC_MODE_ACTIVE
728 * @arg TMR_OC_MODE_INACTIVE
729 * @arg TMR_OC_MODE_LOWLEVEL
730 * @arg TMR_OC_MODE_HIGHLEVEL
731 * @arg TMR_OC_MODE_PWM1
732 * @arg TMR_OC_MODE_PWM2
733
734 * @retval None
735 *
736 * @note TMR2 it's not for APM32F030 devices
737 */
TMR_SelectOCxMode(TMR_T * TMRx,TMR_CHANNEL_T channel,TMR_OC_MODE_T mode)738 void TMR_SelectOCxMode(TMR_T* TMRx, TMR_CHANNEL_T channel, TMR_OC_MODE_T mode)
739 {
740 TMRx->CCEN &= BIT_RESET << channel;
741
742 if (channel == TMR_CHANNEL_1)
743 {
744 TMRx->CCM1_OUTPUT_B.OC1MOD = mode;
745 }
746 else if (channel == TMR_CHANNEL_2)
747 {
748 TMRx->CCM1_OUTPUT_B.OC2MOD = mode;
749 }
750 else if (channel == TMR_CHANNEL_3)
751 {
752 TMRx->CCM2_OUTPUT_B.OC3MOD = mode;
753 }
754 else if (channel == TMR_CHANNEL_4)
755 {
756 TMRx->CCM2_OUTPUT_B.OC4MOD = mode;
757 }
758 }
759
760 /*!
761 * @brief Sets the Capture Compare1 Register value
762 *
763 * @param TMRx: x can be can be 1��2��3, 14, 15, 16 and 17 to select Timer
764 *
765 * @param compare: specifies the Capture Compare1 register new value
766 *
767 * @retval None
768 *
769 * @note TMR2 it's not for APM32F030 devices
770 */
TMR_SetCompare1(TMR_T * TMRx,uint32_t compare)771 void TMR_SetCompare1(TMR_T* TMRx, uint32_t compare)
772 {
773 TMRx->CC1 = compare;
774 }
775
776 /*!
777 * @brief Sets the Capture Compare2 Register value
778 *
779 * @param TMRx: x can be can be 1��2��3 and 15 to select Timer
780 *
781 * @param compare: specifies the Capture Compare1 register new value
782 *
783 * @retval None
784 *
785 * @note TMR2 it's not for APM32F030 devices
786 */
TMR_SetCompare2(TMR_T * TMRx,uint32_t compare)787 void TMR_SetCompare2(TMR_T* TMRx, uint32_t compare)
788 {
789 TMRx->CC2 = compare;
790 }
791
792 /*!
793 * @brief Sets the Capture Compare3 Register value
794 *
795 * @param TMRx: x can be can be 1, 2, 3 to select Timer
796 *
797 * @param compare: specifies the Capture Compare1 register new value
798 *
799 * @retval None
800 *
801 * @note TMR2 it's not for APM32F030 devices
802 */
TMR_SetCompare3(TMR_T * TMRx,uint32_t compare)803 void TMR_SetCompare3(TMR_T* TMRx, uint32_t compare)
804 {
805 TMRx->CC3 = compare;
806 }
807
808 /*!
809 * @brief Sets the Capture Compare4 Register value
810 *
811 * @param TMRx: x can be can be 1, 2, 3 to select Timer
812 *
813 * @param compare: specifies the Capture Compare1 register new value
814 *
815 * @retval None
816 *
817 * @note TMR2 it's not for APM32F030 devices
818 */
TMR_SetCompare4(TMR_T * TMRx,uint32_t compare)819 void TMR_SetCompare4(TMR_T* TMRx, uint32_t compare)
820 {
821 TMRx->CC4 = compare;
822 }
823
824 /*!
825 * @brief Forces the output 1 waveform to active or inactive level
826 *
827 * @param TMRx: x can be can be 1��2��3, 14, 15, 16 and 17 to select Timer
828 *
829 * @param action: forced Action to be set to the output waveform
830 * This parameter can be one of the following values:
831 * @arg TMR_FORCEDACTION_INACTIVE
832 * @arg TMR_FORCEDACTION_ACTIVE
833 * @retval None
834 *
835 * @note TMR2 it's not for APM32F030 devices
836 */
TMR_ForcedOC1Config(TMR_T * TMRx,TMR_FORCED_ACTION_T action)837 void TMR_ForcedOC1Config(TMR_T* TMRx, TMR_FORCED_ACTION_T action)
838 {
839 TMRx->CCM1_OUTPUT_B.OC1MOD = action;
840 }
841
842 /*!
843 * @brief Forces the output 2 waveform to active or inactive level
844 *
845 * @param TMRx: x can be can be 1��2��3 and 15 to select Timer
846 *
847 * @param action: forced Action to be set to the output waveform
848 * This parameter can be one of the following values:
849 * @arg TMR_FORCEDACTION_INACTIVE
850 * @arg TMR_FORCEDACTION_ACTIVE
851 * @retval None
852 *
853 * @note TMR2 it's not for APM32F030 devices
854 */
TMR_ForcedOC2Config(TMR_T * TMRx,TMR_FORCED_ACTION_T action)855 void TMR_ForcedOC2Config(TMR_T* TMRx, TMR_FORCED_ACTION_T action)
856 {
857 TMRx->CCM1_OUTPUT_B.OC2MOD = action;
858 }
859
860 /*!
861 * @brief Forces the output 3 waveform to active or inactive level
862 *
863 * @param TMRx: x can be can be 1, 2, 3 to select Timer
864 *
865 * @param action: forced Action to be set to the output waveform
866 * This parameter can be one of the following values:
867 * @arg TMR_FORCEDACTION_INACTIVE
868 * @arg TMR_FORCEDACTION_ACTIVE
869 * @retval None
870 *
871 * @note TMR2 it's not for APM32F030 devices
872 */
TMR_ForcedOC3Config(TMR_T * TMRx,TMR_FORCED_ACTION_T action)873 void TMR_ForcedOC3Config(TMR_T* TMRx, TMR_FORCED_ACTION_T action)
874 {
875 TMRx->CCM2_OUTPUT_B.OC3MOD = action;
876 }
877
878 /*!
879 * @brief Forces the output 4 waveform to active or inactive level
880 *
881 * @param TMRx: x can be can be 1, 2, 3 to select Timer
882 *
883 * @param action: forced Action to be set to the output waveform
884 * This parameter can be one of the following values:
885 * @arg TMR_FORCEDACTION_INACTIVE
886 * @arg TMR_FORCEDACTION_ACTIVE
887 *
888 * @retval None
889 *
890 * @note TMR2 it's not for APM32F030 devices
891 */
TMR_ForcedOC4Config(TMR_T * TMRx,TMR_FORCED_ACTION_T action)892 void TMR_ForcedOC4Config(TMR_T* TMRx, TMR_FORCED_ACTION_T action)
893 {
894 TMRx->CCM2_OUTPUT_B.OC4MOD = action;
895 }
896
897 /*!
898 * @brief Sets Capture Compare Preload Control bit
899 *
900 * @param TMRx: x can be can be 1��2��3 and 15 to select Timer
901 *
902 * @retval None
903 *
904 * @note TMR2 it's not for APM32F030 devices
905 */
TMR_EnableCCPreload(TMR_T * TMRx)906 void TMR_EnableCCPreload(TMR_T* TMRx)
907 {
908 TMRx->CTRL2_B.CCPEN = ENABLE;
909 }
910
911 /*!
912 * @brief Resets Capture Compare Preload Control bit
913 *
914 * @param TMRx: x can be can be 1��2��3 and 15 to select Timer
915 *
916 * @retval None
917 *
918 * @note TMR2 it's not for APM32F030 devices
919 */
TMR_DisableCCPreload(TMR_T * TMRx)920 void TMR_DisableCCPreload(TMR_T* TMRx)
921 {
922 TMRx->CTRL2_B.CCPEN = DISABLE;
923 }
924
925 /*!
926 * @brief Enables or disables the peripheral Preload register on CC1
927 *
928 * @param TMRx: x can be can be 1, 2, 3 ,14, 15, 16 and 17 to select Timer
929 *
930 * @param OCPreload: new state of the TMRx peripheral Preload register
931 * This parameter can be one of the following values:
932 * @arg TMR_OC_PRELOAD_DISABLE
933 * @arg TMR_OC_PRELOAD_ENABLE
934 * @retval None
935 *
936 * @note TMR2 it's not for APM32F030 devices
937 */
TMR_OC1PreloadConfig(TMR_T * TMRx,TMR_OC_PRELOAD_T OCPreload)938 void TMR_OC1PreloadConfig(TMR_T* TMRx, TMR_OC_PRELOAD_T OCPreload)
939 {
940 TMRx->CCM1_OUTPUT_B.OC1PEN = OCPreload;
941 }
942
943 /*!
944 * @brief Enables or disables the peripheral Preload register on CC2
945 *
946 * @param TMRx: x can be can be 1, 2, 3 and 15 to select Timer
947 *
948 * @param OCPreload: new state of the TMRx peripheral Preload register
949 * This parameter can be one of the following values:
950 * @arg TMR_OC_PRELOAD_DISABLE
951 * @arg TMR_OC_PRELOAD_ENABLE
952 * @retval None
953 *
954 * @note TMR2 it's not for APM32F030 devices
955 */
TMR_OC2PreloadConfig(TMR_T * TMRx,TMR_OC_PRELOAD_T OCPreload)956 void TMR_OC2PreloadConfig(TMR_T* TMRx, TMR_OC_PRELOAD_T OCPreload)
957 {
958 TMRx->CCM1_OUTPUT_B.OC2PEN = OCPreload;
959 }
960
961 /*!
962 * @brief Enables or disables the peripheral Preload register on CC3
963 *
964 * @param TMRx: x can be can be 1, 2, 3 to select Timer
965 *
966 * @param OCPreload: new state of the TMRx peripheral Preload register
967 * This parameter can be one of the following values:
968 * @arg TMR_OC_PRELOAD_DISABLE
969 * @arg TMR_OC_PRELOAD_ENABLE
970 * @retval None
971 *
972 * @note TMR2 it's not for APM32F030 devices
973 */
TMR_OC3PreloadConfig(TMR_T * TMRx,TMR_OC_PRELOAD_T OCPreload)974 void TMR_OC3PreloadConfig(TMR_T* TMRx, TMR_OC_PRELOAD_T OCPreload)
975 {
976 TMRx->CCM2_OUTPUT_B.OC3PEN = OCPreload;
977 }
978
979 /*!
980 * @brief Enables or disables the peripheral Preload register on CC4
981 *
982 * @param TMRx: x can be can be 1, 2, 3 to select Timer
983 *
984 * @param OCPreload: new state of the TMRx peripheral Preload register
985 * This parameter can be one of the following values:
986 * @arg TMR_OC_PRELOAD_DISABLE
987 * @arg TMR_OC_PRELOAD_ENABLE
988 * @retval None
989 *
990 * @note TMR2 it's not for APM32F030 devices
991 */
TMR_OC4PreloadConfig(TMR_T * TMRx,TMR_OC_PRELOAD_T OCPreload)992 void TMR_OC4PreloadConfig(TMR_T* TMRx, TMR_OC_PRELOAD_T OCPreload)
993 {
994 TMRx->CCM2_OUTPUT_B.OC4PEN = OCPreload;
995 }
996
997 /*!
998 * @brief Configures the Output Compare 1 Fast feature
999 *
1000 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TMR peripheral
1001 *
1002 * @param OCFast: new state of the Output Compare Fast Enable Bit
1003 * This parameter can be one of the following values:
1004 * @arg TMR_OCFAST_DISABLE
1005 * @arg TMR_OCFAST_ENABLE
1006 * @retval None
1007 *
1008 * @note TMR2 it's not for APM32F030 devices
1009 */
1010
TMR_OC1FastConfit(TMR_T * TMRx,TMR_OCFAST_T OCFast)1011 void TMR_OC1FastConfit(TMR_T* TMRx, TMR_OCFAST_T OCFast)
1012 {
1013 TMRx->CCM1_OUTPUT_B.OC1FEN = OCFast;
1014 }
1015
1016 /*!
1017 * @brief Configures the Output Compare 2 Fast feature
1018 *
1019 * @param TMRx: where x can be 1, 2, 3 and 15 to select the TMR peripheral
1020 *
1021 * @param OCFast: new state of the Output Compare Fast Enable Bit
1022 * This parameter can be one of the following values:
1023 * @arg TMR_OCFAST_DISABLE
1024 * @arg TMR_OCFAST_ENABLE
1025 * @retval None
1026 *
1027 * @note TMR2 it's not for APM32F030 devices
1028 */
TMR_OC2FastConfit(TMR_T * TMRx,TMR_OCFAST_T OCFast)1029 void TMR_OC2FastConfit(TMR_T* TMRx, TMR_OCFAST_T OCFast)
1030 {
1031 TMRx->CCM1_OUTPUT_B.OC2FEN = OCFast;
1032 }
1033
1034 /*!
1035 * @brief Configures the Output Compare 3 Fast feature
1036 *
1037 * @param TMRx: where x can be 1, 2, 3 to select the TMR peripheral
1038 *
1039 * @param OCFast: new state of the Output Compare Fast Enable Bit
1040 * This parameter can be one of the following values:
1041 * @arg TMR_OCFAST_DISABLE
1042 * @arg TMR_OCFAST_ENABLE
1043 * @retval None
1044 *
1045 * @note TMR2 it's not for APM32F030 devices
1046 */
TMR_OC3FastConfit(TMR_T * TMRx,TMR_OCFAST_T OCFast)1047 void TMR_OC3FastConfit(TMR_T* TMRx, TMR_OCFAST_T OCFast)
1048 {
1049 TMRx->CCM2_OUTPUT_B.OC3FEN = OCFast;
1050 }
1051
1052 /*!
1053 * @brief Configures the Output Compare 4 Fast feature
1054 *
1055 * @param TMRx: where x can be 1, 2, 3 to select the TMR peripheral
1056 *
1057 * @param OCFast: new state of the Output Compare Fast Enable Bit
1058 * This parameter can be one of the following values:
1059 * @arg TMR_OCFAST_DISABLE
1060 * @arg TMR_OCFAST_ENABLE
1061 * @retval None
1062 *
1063 * @note TMR2 it's not for APM32F030 devices
1064 */
TMR_OC4FastConfit(TMR_T * TMRx,TMR_OCFAST_T OCFast)1065 void TMR_OC4FastConfit(TMR_T* TMRx, TMR_OCFAST_T OCFast)
1066 {
1067 TMRx->CCM2_OUTPUT_B.OC4FEN = OCFast;
1068 }
1069
1070 /*!
1071 * @brief Clears or safeguards the OCREF1 signal on an external event
1072 *
1073 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TMR peripheral
1074 *
1075 * @param OCCler: new state of the Output Compare Clear Enable Bit
1076 * This parameter can be one of the following values:
1077 * @arg TMR_OCCLER_DISABLE
1078 * @arg TMR_OCCLER_ENABLE
1079 * @retval None
1080 *
1081 * @note TMR2 it's not for APM32F030 devices
1082 */
TMR_ClearOC1Ref(TMR_T * TMRx,TMR_OCCLER_T OCCler)1083 void TMR_ClearOC1Ref(TMR_T* TMRx, TMR_OCCLER_T OCCler)
1084 {
1085 TMRx->CCM1_OUTPUT_B.OC1CEN = OCCler;
1086 }
1087
1088 /*!
1089 * @brief Clears or safeguards the OCREF2 signal on an external event
1090 *
1091 * @param TMRx: where x can be 1, 2, 3 and 15 to select the TMR peripheral
1092 *
1093 * @param OCCler: new state of the Output Compare Clear Enable Bit
1094 * This parameter can be one of the following values:
1095 * @arg TMR_OCCLER_DISABLE
1096 * @arg TMR_OCCLER_ENABLE
1097 * @retval None
1098 *
1099 * @note TMR2 it's not for APM32F030 devices
1100 */
TMR_ClearOC2Ref(TMR_T * TMRx,TMR_OCCLER_T OCCler)1101 void TMR_ClearOC2Ref(TMR_T* TMRx, TMR_OCCLER_T OCCler)
1102 {
1103 TMRx->CCM1_OUTPUT_B.OC2CEN = OCCler;
1104 }
1105
1106 /*!
1107 * @brief Clears or safeguards the OCREF3 signal on an external event
1108 *
1109 * @param TMRx: where x can be 1, 2, 3 to select the TMR peripheral
1110 *
1111 * @param OCCler: new state of the Output Compare Clear Enable Bit
1112 * This parameter can be one of the following values:
1113 * @arg TMR_OCCLER_DISABLE
1114 * @arg TMR_OCCLER_ENABLE
1115 * @retval None
1116 *
1117 * @note TMR2 it's not for APM32F030 devices
1118 */
TMR_ClearOC3Ref(TMR_T * TMRx,TMR_OCCLER_T OCCler)1119 void TMR_ClearOC3Ref(TMR_T* TMRx, TMR_OCCLER_T OCCler)
1120 {
1121 TMRx->CCM2_OUTPUT_B.OC3CEN = OCCler;
1122 }
1123
1124 /*!
1125 * @brief Clears or safeguards the OCREF4 signal on an external event
1126 *
1127 * @param TMRx: where x can be 1, 2, 3 to select the TMR peripheral
1128 *
1129 * @param OCCler: new state of the Output Compare Clear Enable Bit
1130 * This parameter can be one of the following values:
1131 * @arg TMR_OCCLER_DISABLE
1132 * @arg TMR_OCCLER_ENABLE
1133 * @retval None
1134 *
1135 * @note TMR2 it's not for APM32F030 devices
1136 */
TMR_ClearOC4Ref(TMR_T * TMRx,TMR_OCCLER_T OCCler)1137 void TMR_ClearOC4Ref(TMR_T* TMRx, TMR_OCCLER_T OCCler)
1138 {
1139 TMRx->CCM2_OUTPUT_B.OC4CEN = OCCler;
1140 }
1141
1142 /*!
1143 * @brief Configures the channel 1 polarity
1144 *
1145 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TMR peripheral
1146 *
1147 * @param OCPolarity: specifies the OC1 Polarity
1148 * This parameter can be one of the following values:
1149 * @arg TMR_OC_POLARITY_HIGH
1150 * @arg TMR_OC_POLARITY_LOW
1151 * @retval None
1152 *
1153 * @note TMR2 it's not for APM32F030 devices
1154 */
TMR_OC1PolarityConfig(TMR_T * TMRx,TMR_OC_POLARITY_T OCPolarity)1155 void TMR_OC1PolarityConfig(TMR_T* TMRx, TMR_OC_POLARITY_T OCPolarity)
1156 {
1157 TMRx->CCEN_B.CC1POL = OCPolarity;
1158 }
1159
1160 /*!
1161 * @brief Configures the channel 1N polarity
1162 *
1163 * @param TMRx: where x can be 1, 15, 16 and 17 to select the TMR peripheral
1164 *
1165 * @param OCNPolarity: specifies the OC1 NPolarity
1166 * This parameter can be one of the following values:
1167 * @arg TMR_OC_NPOLARITY_HIGH
1168 * @arg TMR_OC_NPOLARITY_LOW
1169 * @retval None
1170 */
TMR_OC1NPolarityConfig(TMR_T * TMRx,TMR_OC_NPOLARITY_T OCNPolarity)1171 void TMR_OC1NPolarityConfig(TMR_T* TMRx, TMR_OC_NPOLARITY_T OCNPolarity)
1172 {
1173 TMRx->CCEN_B.CC1NPOL = OCNPolarity;
1174 }
1175
1176 /*!
1177 * @brief Configures the channel 2 polarity
1178 *
1179 * @param TMRx: where x can be 1, 2, 3 and 15 to select the TMR peripheral
1180 *
1181 * @param OCPolarity: specifies the OC2 Polarity
1182 * This parameter can be one of the following values:
1183 * @arg TMR_OC_POLARITY_HIGH
1184 * @arg TMR_OC_POLARITY_LOW
1185 * @retval None
1186 *
1187 * @note TMR2 it's not for APM32F030 devices
1188 */
TMR_OC2PolarityConfig(TMR_T * TMRx,TMR_OC_POLARITY_T OCPolarity)1189 void TMR_OC2PolarityConfig(TMR_T* TMRx, TMR_OC_POLARITY_T OCPolarity)
1190 {
1191 TMRx->CCEN_B.CC2POL = OCPolarity;
1192 }
1193
1194 /*!
1195 * @brief Configures the channel 2N polarity
1196 *
1197 * @param TMRx: where x can be 1 to select the TMR peripheral
1198 *
1199 * @param OCNPolarity: specifies the OC2 NPolarity
1200 * This parameter can be one of the following values:
1201 * @arg TMR_OC_NPOLARITY_HIGH
1202 * @arg TMR_OC_NPOLARITY_LOW
1203 * @retval None
1204 */
TMR_OC2NPolarityConfig(TMR_T * TMRx,TMR_OC_NPOLARITY_T OCNPolarity)1205 void TMR_OC2NPolarityConfig(TMR_T* TMRx, TMR_OC_NPOLARITY_T OCNPolarity)
1206 {
1207 TMRx->CCEN_B.CC2NPOL = OCNPolarity;
1208 }
1209
1210 /*!
1211 * @brief Configures the channel 3 polarity
1212 *
1213 * @param TMRx: where x can be 1, 2, 3 to select the TMR peripheral
1214 *
1215 * @param OCPolarity: specifies the OC3 Polarity
1216 * This parameter can be one of the following values:
1217 * @arg TMR_OC_POLARITY_HIGH
1218 * @arg TMR_OC_POLARITY_LOW
1219 * @retval None
1220 *
1221 * @note TMR2 it's not for APM32F030 devices
1222 */
TMR_OC3PolarityConfig(TMR_T * TMRx,TMR_OC_POLARITY_T OCPolarity)1223 void TMR_OC3PolarityConfig(TMR_T* TMRx, TMR_OC_POLARITY_T OCPolarity)
1224 {
1225 TMRx->CCEN_B.CC3POL = OCPolarity;
1226 }
1227
1228 /*!
1229 * @brief Configures the channel 3N polarity
1230 *
1231 * @param TMRx: where x can be 1 to select the TMR peripheral
1232 *
1233 * @param OCNPolarity: specifies the OC3 NPolarity
1234 * This parameter can be one of the following values:
1235 * @arg TMR_OC_NPOLARITY_HIGH
1236 * @arg TMR_OC_NPOLARITY_LOW
1237 * @retval None
1238 */
TMR_OC3NPolarityConfig(TMR_T * TMRx,TMR_OC_NPOLARITY_T OCNPolarity)1239 void TMR_OC3NPolarityConfig(TMR_T* TMRx, TMR_OC_NPOLARITY_T OCNPolarity)
1240 {
1241 TMRx->CCEN_B.CC3NPOL = OCNPolarity;
1242 }
1243
1244 /*!
1245 * @brief Configures the channel 4 polarity
1246 *
1247 * @param TMRx: where x can be 1, 2, 3 to select the TMR peripheral
1248 *
1249 * @param OCPolarity: specifies the OC4 Polarity
1250 * This parameter can be one of the following values:
1251 * @arg TMR_OC_POLARITY_HIGH
1252 * @arg TMR_OC_POLARITY_LOW
1253 * @retval None
1254 *
1255 * @note TMR2 it's not for APM32F030 devices
1256 */
TMR_OC4PolarityConfig(TMR_T * TMRx,TMR_OC_POLARITY_T OCPolarity)1257 void TMR_OC4PolarityConfig(TMR_T* TMRx, TMR_OC_POLARITY_T OCPolarity)
1258 {
1259 TMRx->CCEN_B.CC4POL = OCPolarity;
1260 }
1261
1262 /*!
1263 * @brief Selects the OCReference Clear source
1264 *
1265 * @param TMRx: x can be 1, 2, 3 to select Timer.
1266 *
1267 * @param OCReferenceClear: specifies the OCReference Clear source
1268 * This parameter can be one of the following values:
1269 * @arg TMR_OCCS_ETRF
1270 * @arg TMR_OCCS_OCREFCLR
1271 * @retval None
1272 *
1273 * @note TMR2 it's not for APM32F030 devices
1274 */
TMR_SelectOCREFClear(TMR_T * TMRx,TMR_OCCSEL_T OCReferenceClear)1275 void TMR_SelectOCREFClear(TMR_T* TMRx, TMR_OCCSEL_T OCReferenceClear)
1276 {
1277 TMRx->SMCTRL_B.OCCSEL = OCReferenceClear;
1278 }
1279
1280 /*!
1281 * @brief Enables the Capture Compare Channel x
1282 *
1283 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TMR peripheral
1284 *
1285 * @param channel: TMR channel
1286 *
1287 * @retval None
1288 *
1289 * @note TMR2 it's not for APM32F030 devices
1290 */
TMR_EnableCCxChannel(TMR_T * TMRx,TMR_CHANNEL_T channel)1291 void TMR_EnableCCxChannel(TMR_T* TMRx, TMR_CHANNEL_T channel)
1292 {
1293 TMRx->CCEN |= BIT_SET << channel;
1294 }
1295
1296 /*!
1297 * @brief Disables the Capture Compare Channel x
1298 *
1299 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TMR peripheral
1300 *
1301 * @param channel: TMR channel
1302 *
1303 * @retval None
1304 *
1305 * @note TMR2 it's not for APM32F030 devices
1306 */
TMR_DisableCCxChannel(TMR_T * TMRx,TMR_CHANNEL_T channel)1307 void TMR_DisableCCxChannel(TMR_T* TMRx, TMR_CHANNEL_T channel)
1308 {
1309 TMRx->CCEN &= ~(BIT_SET << channel);
1310 }
1311
1312 /*!
1313 * @brief Enables the Capture Compare Channel xN.
1314 *
1315 * @param TMRx: where x can be 1, 15, 16 and 17 to select the TMR peripheral
1316 *
1317 * @param channel: TMR channel
1318 *
1319 * @retval None
1320 */
TMR_EnableCCxNChannel(TMR_T * TMRx,TMR_CHANNEL_T channel)1321 void TMR_EnableCCxNChannel(TMR_T* TMRx, TMR_CHANNEL_T channel)
1322 {
1323 TMRx->CCEN |= 0x04 << channel;
1324 }
1325
1326 /*!
1327 * @brief Disables the Capture Compare Channel xN
1328 *
1329 * @param TMRx: where x can be 1, 15, 16 and 17 to select the TMR peripheral
1330 *
1331 * @param channel: TMR channel
1332 *
1333 * @retval None
1334 */
TMR_DisableCCxNChannel(TMR_T * TMRx,TMR_CHANNEL_T channel)1335 void TMR_DisableCCxNChannel(TMR_T* TMRx, TMR_CHANNEL_T channel)
1336 {
1337 TMRx->CCEN &= ~(0x04 << channel);
1338 }
1339
1340 /*!
1341 * @brief Enable Selects the TMR peripheral Commutation event
1342 *
1343 * @param TMRx: where x can be 1, 15, 16 and 17 to select the TMR peripheral
1344 *
1345 * @retval None
1346 */
1347
TMR_EnableSelectCOM(TMR_T * TMRx)1348 void TMR_EnableSelectCOM(TMR_T* TMRx)
1349 {
1350 TMRx->CTRL2_B.CCUSEL = ENABLE;
1351 }
1352 /*!
1353 * @brief Disable Selects the TMR peripheral Commutation event
1354 *
1355 * @param TMRx: where x can be 1, 15, 16 and 17 to select the TMR peripheral
1356 *
1357 * @retval None
1358 */
TMR_DisableSelectCOM(TMR_T * TMRx)1359 void TMR_DisableSelectCOM(TMR_T* TMRx)
1360 {
1361 TMRx->CTRL2_B.CCUSEL = DISABLE;
1362 }
1363
1364 /*!
1365 * @brief Configure the TI1 as Input.
1366 *
1367 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TMR peripheral
1368 *
1369 * @param ICpolarity: The Input Polarity.
1370 *
1371 * @param ICselection: specifies the input to be used.
1372 *
1373 * @param ICfilter: Specifies the Input Capture Filter
1374 *
1375 * @retval None
1376 *
1377 * @note TMR2 it's not for APM32F030 devices
1378 */
TI1Config(TMR_T * TMRx,uint16_t ICpolarity,uint16_t ICselection,uint16_t ICfilter)1379 static void TI1Config(TMR_T* TMRx, uint16_t ICpolarity, uint16_t ICselection, uint16_t ICfilter)
1380 {
1381 uint16_t tmpchctrl = 0;
1382
1383 /** Disable the Channel 1: Reset the CC1EN Bit */
1384 TMRx->CCEN_B.CC1EN = BIT_RESET;
1385
1386 /** Select the Input and set the filter */
1387 TMRx->CCM1_INPUT_B.CC1SEL = BIT_RESET;
1388 TMRx->CCM1_INPUT_B.IC1F = BIT_RESET;
1389 TMRx->CCM1_INPUT_B.CC1SEL = ICselection;
1390 TMRx->CCM1_INPUT_B.IC1F = ICfilter;
1391
1392 /** Select the Polarity */
1393 tmpchctrl = TMRx->CCEN;
1394 tmpchctrl &= (uint16_t)~((uint16_t)TMR_IC_POLARITY_BOTHEDGE);
1395 tmpchctrl |= ICpolarity;
1396 TMRx->CCEN = tmpchctrl;
1397
1398 /** Set the CC1EN Bit */
1399 TMRx->CCEN_B.CC1EN = BIT_SET;
1400 }
1401
1402 /*!
1403 * @brief Configure the TI2 as Input
1404 *
1405 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TMR periphera
1406 *
1407 * @param ICpolarity: The Input Polarity.
1408 *
1409 * @param ICselection: specifies the input to be used.
1410 *
1411 * @param ICfilter: Specifies the Input Capture Filter
1412 *
1413 * @retval None
1414 *
1415 * @note TMR2 it's not for APM32F030 devices
1416 */
TI2Config(TMR_T * TMRx,uint16_t ICpolarity,uint16_t ICselection,uint16_t ICfilter)1417 static void TI2Config(TMR_T* TMRx, uint16_t ICpolarity, uint16_t ICselection, uint16_t ICfilter)
1418 {
1419 uint16_t tmpchctrl = 0;
1420
1421 /** Disable the Channel 2: Reset the CC2EN Bit */
1422 TMRx->CCEN_B.CC2EN = BIT_RESET;
1423
1424 /** Select the Input and set the filter */
1425 TMRx->CCM1_INPUT_B.CC2SEL = BIT_RESET;
1426 TMRx->CCM1_INPUT_B.IC2F = BIT_RESET;
1427 TMRx->CCM1_INPUT_B.CC2SEL = ICselection;
1428 TMRx->CCM1_INPUT_B.IC2F = ICfilter;
1429
1430 /** Select the Polarity */
1431 tmpchctrl = TMRx->CCEN;
1432 tmpchctrl &= (uint16_t)~((uint16_t)TMR_IC_POLARITY_BOTHEDGE << 4);
1433 tmpchctrl |= (uint16_t)(ICpolarity << 4);
1434 TMRx->CCEN = tmpchctrl;
1435
1436 /** Set the CC2EN Bit */
1437 TMRx->CCEN_B.CC2EN = BIT_SET;
1438 }
1439
1440 /*!
1441 * @brief Configure the TI3 as Input.
1442 *
1443 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TMR peripheral
1444 *
1445 * @param ICpolarity: The Input Polarity.
1446 *
1447 * @param ICselection: specifies the input to be used.
1448 *
1449 * @param ICfilter: Specifies the Input Capture Filter
1450 *
1451 * @retval None
1452 *
1453 * @note TMR2 it's not for APM32F030 devices
1454 */
TI3Config(TMR_T * TMRx,uint16_t ICpolarity,uint16_t ICselection,uint16_t ICfilter)1455 static void TI3Config(TMR_T* TMRx, uint16_t ICpolarity, uint16_t ICselection, uint16_t ICfilter)
1456 {
1457 uint16_t tmpchctrl = 0;
1458
1459 /** Disable the Channel 3: Reset the CC3EN Bit */
1460 TMRx->CCEN_B.CC3EN = BIT_RESET;
1461
1462 /** Select the Input and set the filter */
1463 TMRx->CCM2_INPUT_B.CC3SEL = BIT_RESET;
1464 TMRx->CCM2_INPUT_B.IC3F = BIT_RESET;
1465 TMRx->CCM2_INPUT_B.CC3SEL = ICselection;
1466 TMRx->CCM2_INPUT_B.IC3F = ICfilter;
1467
1468 /** Select the Polarity */
1469 tmpchctrl = TMRx->CCEN;
1470 tmpchctrl &= (uint16_t)~((uint16_t)TMR_IC_POLARITY_BOTHEDGE << 8);
1471 tmpchctrl |= (uint16_t)(ICpolarity << 8);
1472 TMRx->CCEN = tmpchctrl;
1473
1474 /** Set the CC3EN Bit */
1475 TMRx->CCEN_B.CC3EN = BIT_SET;
1476 }
1477
1478 /*!
1479 * @brief Configure the TI4 as Input
1480 *
1481 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TMR peripheral
1482 *
1483 * @param ICpolarity: The Input Polarity.
1484 *
1485 * @param ICselection: specifies the input to be used.
1486 *
1487 * @param ICfilter: Specifies the Input Capture Filter
1488 *
1489 * @retval None
1490 *
1491 * @note TMR2 it's not for APM32F030 devices
1492 */
TI4Config(TMR_T * TMRx,uint16_t ICpolarity,uint16_t ICselection,uint16_t ICfilter)1493 static void TI4Config(TMR_T* TMRx, uint16_t ICpolarity, uint16_t ICselection, uint16_t ICfilter)
1494 {
1495 uint16_t tmpchctrl = 0;
1496
1497 /** Disable the Channel 4: Reset the CC4EN Bit */
1498 TMRx->CCEN_B.CC4EN = BIT_RESET;
1499
1500 /** Select the Input and set the filter */
1501 TMRx->CCM2_INPUT_B.CC4SEL = BIT_RESET;
1502 TMRx->CCM2_INPUT_B.IC4F = BIT_RESET;
1503 TMRx->CCM2_INPUT_B.CC4SEL = ICselection;
1504 TMRx->CCM2_INPUT_B.IC4F = ICfilter;
1505
1506 /** Select the Polarity */
1507 tmpchctrl = TMRx->CCEN;
1508 tmpchctrl &= (uint16_t)~((uint16_t)TMR_IC_POLARITY_BOTHEDGE << 12);
1509 tmpchctrl |= (uint16_t)(ICpolarity << 12);
1510 TMRx->CCEN = tmpchctrl;
1511
1512 /** Set the CC4EN Bit */
1513 TMRx->CCEN_B.CC4EN = BIT_SET;
1514 }
1515
1516 /*!
1517 * @brief Configure Peripheral equipment
1518 *
1519 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TMR peripheral
1520 *
1521 * @param ICconfigstruct: pointer to a TMR_ICConfig_T structure
1522 *
1523 * @retval None
1524 *
1525 * @note TMR2 it's not for APM32F030 devices
1526 */
TMR_ICConfig(TMR_T * TMRx,TMR_ICConfig_T * ICconfigstruct)1527 void TMR_ICConfig(TMR_T* TMRx, TMR_ICConfig_T* ICconfigstruct)
1528 {
1529 if (ICconfigstruct->channel == TMR_CHANNEL_1)
1530 {
1531 /** TI1 Configuration */
1532 TI1Config(TMRx, ICconfigstruct->ICpolarity, ICconfigstruct->ICselection, ICconfigstruct->ICfilter);
1533 TMR_SetIC1Prescal(TMRx, ICconfigstruct->ICprescaler);
1534 }
1535 else if (ICconfigstruct->channel == TMR_CHANNEL_2)
1536 {
1537 /** TI2 Configuration */
1538 TI2Config(TMRx, ICconfigstruct->ICpolarity, ICconfigstruct->ICselection, ICconfigstruct->ICfilter);
1539 TMR_SetIC2Prescal(TMRx, ICconfigstruct->ICprescaler);
1540 }
1541 else if (ICconfigstruct->channel == TMR_CHANNEL_3)
1542 {
1543 /** TI3 Configuration */
1544 TI3Config(TMRx, ICconfigstruct->ICpolarity, ICconfigstruct->ICselection, ICconfigstruct->ICfilter);
1545 TMR_SetIC3Prescal(TMRx, ICconfigstruct->ICprescaler);
1546 }
1547 else if (ICconfigstruct->channel == TMR_CHANNEL_4)
1548 {
1549 /** TI4 Configuration */
1550 TI4Config(TMRx, ICconfigstruct->ICpolarity, ICconfigstruct->ICselection, ICconfigstruct->ICfilter);
1551 TMR_SetIC4Prescal(TMRx, ICconfigstruct->ICprescaler);
1552 }
1553 }
1554
1555 /*!
1556 * @brief Initialize the IC timer with its default value.
1557 *
1558 * @param ICconfigstruct: pointer to a TMR_ICConfig_T structure
1559 *
1560 * @retval None
1561 */
TMR_ICConfigStructInit(TMR_ICConfig_T * ICconfigstruct)1562 void TMR_ICConfigStructInit(TMR_ICConfig_T* ICconfigstruct)
1563 {
1564 ICconfigstruct->channel = TMR_CHANNEL_1;
1565 ICconfigstruct->ICpolarity = TMR_IC_POLARITY_RISING;
1566 ICconfigstruct->ICselection = TMR_IC_SELECTION_DIRECT_TI;
1567 ICconfigstruct->ICprescaler = TMR_ICPSC_DIV1;
1568 ICconfigstruct->ICfilter = 0x00;
1569 }
1570
1571 /*!
1572 * @brief Config of PWM output
1573 *
1574 * @param TMRx: where x can be 1, 2, 3 and 15 to select the TMR peripheral
1575 *
1576 * @param ICconfigstruct: pointer to a TMR_ICConfig_T structure
1577 *
1578 * @retval None
1579 *
1580 * @note TMR2 it's not for APM32F030 devices
1581 */
TMR_PWMConfig(TMR_T * TMRx,TMR_ICConfig_T * ICconfigstruct)1582 void TMR_PWMConfig(TMR_T* TMRx, TMR_ICConfig_T* ICconfigstruct)
1583 {
1584 uint16_t icpolarity = TMR_IC_POLARITY_RISING;
1585 uint16_t icselection = TMR_IC_SELECTION_DIRECT_TI;
1586
1587 /** Select the Opposite Input Polarity */
1588 if (ICconfigstruct->ICpolarity == TMR_IC_POLARITY_RISING)
1589 {
1590 icpolarity = TMR_IC_POLARITY_FALLING;
1591 }
1592 else
1593 {
1594 icpolarity = TMR_IC_POLARITY_RISING;
1595 }
1596
1597 /** Select the Opposite Input */
1598 if (ICconfigstruct->ICselection == TMR_IC_SELECTION_DIRECT_TI)
1599 {
1600 icselection = TMR_IC_SELECTION_INDIRECT_TI;
1601 }
1602 else
1603 {
1604 icselection = TMR_IC_SELECTION_DIRECT_TI;
1605 }
1606
1607 if (ICconfigstruct->channel == TMR_CHANNEL_1)
1608 {
1609 /** TI1 Configuration */
1610 TI1Config(TMRx, ICconfigstruct->ICpolarity, ICconfigstruct->ICselection, ICconfigstruct->ICfilter);
1611 /** Set the Input Capture Prescaler value */
1612 TMR_SetIC1Prescal(TMRx, ICconfigstruct->ICprescaler);
1613 /** TI2 Configuration */
1614 TI2Config(TMRx, icpolarity, icselection, ICconfigstruct->ICfilter);
1615 /** Set the Input Capture Prescaler value */
1616 TMR_SetIC2Prescal(TMRx, ICconfigstruct->ICprescaler);
1617 }
1618 else
1619 {
1620 /** TI2 Configuration */
1621 TI2Config(TMRx, ICconfigstruct->ICpolarity, ICconfigstruct->ICselection, ICconfigstruct->ICfilter);
1622 /** Set the Input Capture Prescaler value */
1623 TMR_SetIC2Prescal(TMRx, ICconfigstruct->ICprescaler);
1624 /** TI1 Configuration */
1625 TI1Config(TMRx, icpolarity, icselection, ICconfigstruct->ICfilter);
1626 /** Set the Input Capture Prescaler value */
1627 TMR_SetIC1Prescal(TMRx, ICconfigstruct->ICprescaler);
1628 }
1629 }
1630
1631 /*!
1632 * @brief Read Input Capture 1 value
1633 *
1634 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TMR peripheral
1635 *
1636 * @retval Capture Compare 1 Register value
1637 *
1638 * @note TMR2 it's not for APM32F030 devices
1639 */
TMR_ReadCaputer1(TMR_T * TMRx)1640 uint16_t TMR_ReadCaputer1(TMR_T* TMRx)
1641 {
1642 return TMRx->CC1;
1643 }
1644
1645 /*!
1646 * @brief Read Input Capture 2 value
1647 *
1648 * @param TMRx: where x can be 1, 2, 3 and 15 to select the TMR peripheral
1649 *
1650 * @retval Capture Compare 2 Register value
1651 *
1652 * @note TMR2 it's not for APM32F030 devices
1653 */
TMR_ReadCaputer2(TMR_T * TMRx)1654 uint16_t TMR_ReadCaputer2(TMR_T* TMRx)
1655 {
1656 return TMRx->CC2;
1657 }
1658
1659 /*!
1660 * @brief Read Input Capture 3 value
1661 *
1662 * @param TMRx: where x can be 1, 2, 3 to select the TMR peripheral
1663 *
1664 * @retval Capture Compare 3 Register value
1665 *
1666 * @note TMR2 it's not for APM32F030 devices
1667 */
TMR_ReadCaputer3(TMR_T * TMRx)1668 uint16_t TMR_ReadCaputer3(TMR_T* TMRx)
1669 {
1670 return TMRx->CC3;
1671 }
1672
1673 /*!
1674 * @brief Read Input Capture 4 value
1675 *
1676 * @param TMRx: where x can be 1, 2, 3 to select the TMR peripheral
1677 *
1678 * @retval Capture Compare 4 Register value
1679 *
1680 * @note TMR2 it's not for APM32F030 devices
1681 */
TMR_ReadCaputer4(TMR_T * TMRx)1682 uint16_t TMR_ReadCaputer4(TMR_T* TMRx)
1683 {
1684 return TMRx->CC4;
1685 }
1686
1687 /*!
1688 * @brief Sets the TMRx Input Capture 1 prescaler
1689 *
1690 * @param TMRx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TMR peripheral
1691 *
1692 * @param prescaler: specifies the Input Capture 1 prescaler new value
1693 *
1694 * @retval None
1695 *
1696 * @note TMR2 it's not for APM32F030 devices
1697 */
TMR_SetIC1Prescal(TMR_T * TMRx,TMR_IC_PRESCALER_T prescaler)1698 void TMR_SetIC1Prescal(TMR_T* TMRx, TMR_IC_PRESCALER_T prescaler)
1699 {
1700 TMRx->CCM1_INPUT_B.IC1PSC = BIT_RESET;
1701 TMRx->CCM1_INPUT_B.IC1PSC = prescaler;
1702 }
1703 /*!
1704 * @brief Sets the TMRx Input Capture 2 prescaler
1705 *
1706 * @param TMRx: where x can be 1, 2, 3 and 15 to select the TMR peripheral
1707 *
1708 * @param prescaler: specifies the Input Capture 2 prescaler new value
1709 *
1710 * @retval None
1711 *
1712 * @note TMR2 it's not for APM32F030 devices
1713 */
TMR_SetIC2Prescal(TMR_T * TMRx,TMR_IC_PRESCALER_T prescaler)1714 void TMR_SetIC2Prescal(TMR_T* TMRx, TMR_IC_PRESCALER_T prescaler)
1715 {
1716 TMRx->CCM1_INPUT_B.IC2PSC = BIT_RESET;
1717 TMRx->CCM1_INPUT_B.IC2PSC = prescaler;
1718 }
1719
1720 /*!
1721 * @brief Sets the TMRx Input Capture 3 prescaler
1722 *
1723 * @param TMRx: where x can be 1, 2, 3 to select the TMR peripheral
1724 *
1725 * @param prescaler: specifies the Input Capture 3 prescaler new value
1726 *
1727 * @retval None
1728 *
1729 * @note TMR2 it's not for APM32F030 devices
1730 */
TMR_SetIC3Prescal(TMR_T * TMRx,TMR_IC_PRESCALER_T prescaler)1731 void TMR_SetIC3Prescal(TMR_T* TMRx, TMR_IC_PRESCALER_T prescaler)
1732 {
1733 TMRx->CCM2_INPUT_B.IC3PSC = BIT_RESET;
1734 TMRx->CCM2_INPUT_B.IC3PSC = prescaler;
1735 }
1736
1737 /*!
1738 * @brief Sets the TMRx Input Capture 4 prescaler
1739 *
1740 * @param TMRx: where x can be 1, 2, 3 to select the TMR peripheral
1741 *
1742 * @param prescaler: specifies the Input Capture 4 prescaler new value
1743 *
1744 * @retval None
1745 *
1746 * @note TMR2 it's not for APM32F030 devices
1747 */
TMR_SetIC4Prescal(TMR_T * TMRx,TMR_IC_PRESCALER_T prescaler)1748 void TMR_SetIC4Prescal(TMR_T* TMRx, TMR_IC_PRESCALER_T prescaler)
1749 {
1750 TMRx->CCM2_INPUT_B.IC4PSC = BIT_RESET;
1751 TMRx->CCM2_INPUT_B.IC4PSC = prescaler;
1752 }
1753
1754 /*!
1755 * @brief Enable intterupts
1756 *
1757 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
1758 *
1759 * @param interrupt: specifies the TMR interrupts sources
1760 * The parameter can be any combination of following values:
1761 * @arg TMR_INT_UPDATE: TMR update Interrupt source
1762 * @arg TMR_INT_CH1: TMR Capture Compare 1 Interrupt source
1763 * @arg TMR_INT_CH2: TMR Capture Compare 2 Interrupt source
1764 * @arg TMR_INT_CH3: TMR Capture Compare 3 Interrupt source
1765 * @arg TMR_INT_CH4: TMR Capture Compare 4 Interrupt source
1766 * @arg TMR_INT_CCU: TMR Commutation Interrupt source
1767 * @arg TMR_INT_TRG: TMR Trigger Interrupt source
1768 * @arg TMR_INT_BRK: TMR Break Interrupt source
1769 *
1770 * @retval None
1771 *
1772 * @note TMR2 it's not for APM32F030 devices
1773 * TMR7 it's only for APM32F072 and APM32F091 devices
1774 */
TMR_EnableInterrupt(TMR_T * TMRx,uint16_t interrupt)1775 void TMR_EnableInterrupt(TMR_T* TMRx, uint16_t interrupt)
1776 {
1777 TMRx->DIEN |= interrupt;
1778 }
1779
1780 /*!
1781 * @brief Disable intterupts
1782 *
1783 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
1784 *
1785 * @param interrupt: specifies the TMR interrupts sources
1786 * The parameter can be any combination of following values:
1787 * @arg TMR_INT_UPDATE: TMR update Interrupt source
1788 * @arg TMR_INT_CH1: TMR Capture Compare 1 Interrupt source
1789 * @arg TMR_INT_CH2: TMR Capture Compare 2 Interrupt source
1790 * @arg TMR_INT_CH3: TMR Capture Compare 3 Interrupt source
1791 * @arg TMR_INT_CH4: TMR Capture Compare 4 Interrupt source
1792 * @arg TMR_INT_CCU: TMR Commutation Interrupt source
1793 * @arg TMR_INT_TRG: TMR Trigger Interrupt source
1794 * @arg TMR_INT_BRK: TMR Break Interrupt source
1795 *
1796 * @retval None
1797 *
1798 * @note TMR2 it's not for APM32F030 devices
1799 * TMR7 it's only for APM32F072 and APM32F091 devices
1800 */
TMR_DisableInterrupt(TMR_T * TMRx,uint16_t interrupt)1801 void TMR_DisableInterrupt(TMR_T* TMRx, uint16_t interrupt)
1802 {
1803 TMRx->DIEN &= ~interrupt;
1804 }
1805
1806 /*!
1807 * @brief Configures the TMRx event to be generate by software
1808 *
1809 * @param TMRx: where x can be 1��2��3, 14, 15, 16 and 17 to select the TMR peripheral
1810 *
1811 * @param event: specifies the TMR generate event
1812 * The parameter can be any combination of following values:
1813 * @arg TMR_EVENT_UPDATE: TMR update Interrupt source
1814 * @arg TMR_EVENT_CH1: TMR Capture Compare 1 Interrupt source
1815 * @arg TMR_EVENT_CH2: TMR Capture Compare 2 Interrupt source
1816 * @arg TMR_EVENT_CH3: TMR Capture Compare 3 Interrupt source
1817 * @arg TMR_EVENT_CH4: TMR Capture Compare 4 Interrupt source
1818 * @arg TMR_EVENT_CCU: TMR Commutation Interrupt source
1819 * @arg TMR_EVENT_TRG: TMR Trigger Interrupt source
1820 * @arg TMR_EVENT_BRK: TMR Break Interrupt source
1821 *
1822 * @retval None
1823 *
1824 * @note TMR2 it's not for APM32F030 devices
1825 * TMR7 it's only for APM32F072 and APM32F091 devices
1826 * TMR6 and TMR7 only TMR_EVENT_UPDATE
1827 * TMR_EVENT_CCU and TMR_EVENT_BRK are used only with TMR1
1828 */
TMR_GenerateEvent(TMR_T * TMRx,uint16_t event)1829 void TMR_GenerateEvent(TMR_T* TMRx, uint16_t event)
1830 {
1831 TMRx->CEG |= event;
1832 }
1833
1834 /*!
1835 * @brief Check whether the flag is set or reset
1836 *
1837 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
1838 *
1839 * @note TMR2 it's not for APM32F030 devices
1840 * TMR7 it's only for APM32F072 and APM32F091 devices
1841 *
1842 * @param flag: specifies the TMR flag
1843 * The parameter can be one of following values:
1844 * @arg TMR_FLAG_UPDATA: TMR update Flag
1845 * @arg TMR_FLAG_CH1: TMR Capture Compare 1 flag
1846 * @arg TMR_FLAG_CH2: TMR Capture Compare 2 flag
1847 * @arg TMR_FLAG_CH3: TMR Capture Compare 3 flag
1848 * @arg TMR_FLAG_CH4: TMR Capture Compare 4 flag
1849 * @arg TMR_FLAG_CCU: TMR Commutation flag
1850 * @arg TMR_FLAG_TRG: TMR Trigger flag
1851 * @arg TMR_FLAG_BRK: TMR Break flag
1852 * @arg TMR_FLAG_CH1OC: TMR Capture Compare 1 overcapture flag
1853 * @arg TMR_FLAG_CH2OC: TMR Capture Compare 2 overcapture flag
1854 * @arg TMR_FLAG_CH3OC: TMR Capture Compare 3 overcapture flag
1855 * @arg TMR_FLAG_CH4OC: TMR Capture Compare 4 overcapture flag
1856 *
1857 * @retval The new state of the flag is SET or RESET
1858 *
1859 * @note TMR15 can have only TMR_FLAG_UPDATA, TMR_FLAG_CH1, TMR_FLAG_CH2 and TMR_FLAG_TRG
1860 * TMR14, TMR16 and TMR17 can have TMR_FLAG_UPDATA and TMR_FLAG_CH1
1861 * TMR6, TMR7 only TMR_FLAG_UPDATA
1862 * TMR_FLAG_BRK is used only with TMR1 and TMR15.
1863 * TMR_FLAG_CCU is used only with TMR1, TMR15, TMR16 and TMR17
1864 */
TMR_ReadStatusFlag(TMR_T * TMRx,TMR_FLAG_T flag)1865 uint16_t TMR_ReadStatusFlag(TMR_T* TMRx, TMR_FLAG_T flag)
1866 {
1867 if ((TMRx->STS & flag) != RESET)
1868 {
1869 return SET;
1870 }
1871 else
1872 {
1873 return RESET;
1874 }
1875 }
1876
1877 /*!
1878 * @brief Clears the TMR's pending flags
1879 *
1880 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
1881 *
1882 * @note TMR2 it's not for APM32F030 devices
1883 * TMR7 it's only for APM32F072 and APM32F091 devices
1884 *
1885 * @param flag: specifies the TMR flag
1886 * The parameter can be any combination of following values:
1887 * @arg TMR_FLAG_UPDATA: TMR update Flag
1888 * @arg TMR_FLAG_CH1: TMR Capture Compare 1 flag
1889 * @arg TMR_FLAG_CH2: TMR Capture Compare 2 flag
1890 * @arg TMR_FLAG_CH3: TMR Capture Compare 3 flag
1891 * @arg TMR_FLAG_CH4: TMR Capture Compare 4 flag
1892 * @arg TMR_FLAG_CCU: TMR Commutation flag
1893 * @arg TMR_FLAG_TRG: TMR Trigger flag
1894 * @arg TMR_FLAG_BRK: TMR Break flag
1895 * @arg TMR_FLAG_CH1OC: TMR Capture Compare 1 overcapture flag
1896 * @arg TMR_FLAG_CH2OC: TMR Capture Compare 2 overcapture flag
1897 * @arg TMR_FLAG_CH3OC: TMR Capture Compare 3 overcapture flag
1898 * @arg TMR_FLAG_CH4OC: TMR Capture Compare 4 overcapture flag
1899 *
1900 * @retval None
1901 */
TMR_ClearStatusFlag(TMR_T * TMRx,uint16_t flag)1902 void TMR_ClearStatusFlag(TMR_T* TMRx, uint16_t flag)
1903 {
1904 TMRx->STS = ~flag;
1905 }
1906
1907 /*!
1908 * @brief Check whether the TMR Interrupt flag is set or reset
1909 *
1910 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
1911 *
1912 * @note TMR2 it's not for APM32F030 devices
1913 * TMR7 it's only for APM32F072 and APM32F091 devices
1914 *
1915 * @param flag: specifies the TMR interrupts flag
1916 * The parameter can be one of following values:
1917 * @arg TMR_INT_FLAG_UPDATE: TMR update Interrupt flag
1918 * @arg TMR_INT_FLAG_CH1: TMR Capture Compare 1 Interrupt flag
1919 * @arg TMR_INT_FLAG_CH2: TMR Capture Compare 2 Interrupt flag
1920 * @arg TMR_INT_FLAG_CH3: TMR Capture Compare 3 Interrupt flag
1921 * @arg TMR_INT_FLAG_CH4: TMR Capture Compare 4 Interrupt flag
1922 * @arg TMR_INT_FLAG_CCU: TMR Commutation Interrupt flag
1923 * @arg TMR_INT_FLAG_TRG: TMR Trigger Interrupt flag
1924 * @arg TMR_INT_FLAG_BRK: TMR Break Interrupt flag
1925 *
1926 * @retval The new state of the INT flag is SET or RESET
1927 *
1928 * @note TMR15 can have only TMR_INT_FLAG_UPDATE, TMR_INT_FLAG_CH1, TMR_INT_FLAG_CH2 and TMR_INT_FLAG_TRG
1929 * TMR14, TMR16 and TMR17 can have TMR_INT_FLAG_UPDATE and TMR_INT_FLAG_CH1
1930 * TMR6, TMR7 only TMR_INT_FLAG_UPDATE
1931 * TMR_INT_FLAG_BRK is used only with TMR1 and TMR15.
1932 * TMR_INT_FLAG_CCU is used only with TMR1, TMR15, TMR16 and TMR17
1933 */
TMR_ReadIntFlag(TMR_T * TMRx,TMR_INT_FLAG_T flag)1934 uint16_t TMR_ReadIntFlag(TMR_T* TMRx, TMR_INT_FLAG_T flag)
1935 {
1936 if (((TMRx->STS & flag) != RESET) && ((TMRx->DIEN & flag) != RESET))
1937 {
1938 return SET;
1939 }
1940 else
1941 {
1942 return RESET;
1943 }
1944 }
1945
1946 /*!
1947 * @brief Clears the TMR's interrupt pending bits
1948 *
1949 * @param TMRx: x can be can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select Timer
1950 *
1951 * @note TMR2 it's not for APM32F030 devices
1952 * TMR7 it's only for APM32F072 and APM32F091 devices
1953 *
1954 * @param flag: specifies the TMR interrupts flag
1955 * The parameter can be any combination of following values:
1956 * @arg TMR_INT_FLAG_UPDATE: TMR update Interrupt flag
1957 * @arg TMR_INT_FLAG_CH1: TMR Capture Compare 1 Interrupt flag
1958 * @arg TMR_INT_FLAG_CH2: TMR Capture Compare 2 Interrupt flag
1959 * @arg TMR_INT_FLAG_CH3: TMR Capture Compare 3 Interrupt flag
1960 * @arg TMR_INT_FLAG_CH4: TMR Capture Compare 4 Interrupt flag
1961 * @arg TMR_INT_FLAG_CCU: TMR Commutation Interrupt flag
1962 * @arg TMR_INT_FLAG_TRG: TMR Trigger Interrupt flag
1963 * @arg TMR_INT_FLAG_BRK: TMR Break Interrupt flag
1964 *
1965 * @retval None
1966 */
TMR_ClearIntFlag(TMR_T * TMRx,uint16_t flag)1967 void TMR_ClearIntFlag(TMR_T* TMRx, uint16_t flag)
1968 {
1969 TMRx->STS = ~flag;
1970 }
1971
1972 /*!
1973 * @brief Configures the TMRx's DMA interface.
1974 *
1975 * @param TMRx: where x can be 1, 2, 3, 15, 16 and 17 to select the TMR peripheral
1976 *
1977 * @param address: DMA Base address
1978 *
1979 * @param lenght: DMA Burst length
1980 *
1981 * @retval None
1982 *
1983 * @note TMR2 it's not for APM32F030 devices
1984 */
TMR_ConfigDMA(TMR_T * TMRx,TMR_DMA_BASE_ADDERSS_T address,TMR_DMA_BURST_LENGHT_T lenght)1985 void TMR_ConfigDMA(TMR_T* TMRx, TMR_DMA_BASE_ADDERSS_T address, TMR_DMA_BURST_LENGHT_T lenght)
1986 {
1987 TMRx->DCTRL = (uint32_t)address | (uint32_t)lenght;
1988 }
1989
1990 /*!
1991 * @brief Enable TMRx Requests
1992 *
1993 * @param TMRx: where x can be 1, 2, 3, 6, 7, 15, 16 and 17 to select the TMR peripheral
1994 *
1995 * @param souces: specifies the TMR DMA souces
1996 * The parameter can be any combination of following values:
1997 * @arg TMR_DMA_UPDATE: TMR update DMA souces
1998 * @arg TMR_DMA_CH1: TMR Capture Compare 1 DMA souces
1999 * @arg TMR_DMA_CH2: TMR Capture Compare 2 DMA souces
2000 * @arg TMR_DMA_CH3: TMR Capture Compare 3 DMA souces
2001 * @arg TMR_DMA_CH4: TMR Capture Compare 4 DMA souces
2002 * @arg TMR_DMA_CCU: TMR Commutation DMA souces
2003 * @arg TMR_DMA_TRG: TMR Trigger DMA souces
2004 *
2005 * @retval None
2006 *
2007 * @note TMR2 it's not for APM32F030 devices
2008 * TMR7 it's only for APM32F072 and APM32F091 devices
2009 */
TMR_EnableDMASoure(TMR_T * TMRx,uint16_t souces)2010 void TMR_EnableDMASoure(TMR_T* TMRx, uint16_t souces)
2011 {
2012 TMRx->DIEN |= souces;
2013 }
2014
2015 /*!
2016 * @brief Disable TMRx Requests
2017 *
2018 * @param TMRx: where x can be 1, 2, 3, 6, 7, 15, 16 and 17 to select the TMR peripheral
2019 *
2020 * @param souces: specifies the TMR DMA souces
2021 * The parameter can be any combination of following values:
2022 * @arg TMR_DMA_UPDATE: TMR update DMA souces
2023 * @arg TMR_DMA_CH1: TMR Capture Compare 1 DMA souces
2024 * @arg TMR_DMA_CH2: TMR Capture Compare 2 DMA souces
2025 * @arg TMR_DMA_CH3: TMR Capture Compare 3 DMA souces
2026 * @arg TMR_DMA_CH4: TMR Capture Compare 4 DMA souces
2027 * @arg TMR_DMA_CCU: TMR Commutation DMA souces
2028 * @arg TMR_DMA_TRG: TMR Trigger DMA souces
2029 *
2030 * @retval None
2031 *
2032 * @note TMR2 it's not for APM32F030 devices
2033 * TMR7 it's only for APM32F072 and APM32F091 devices
2034 */
TMR_DisableDMASoure(TMR_T * TMRx,uint16_t souces)2035 void TMR_DisableDMASoure(TMR_T* TMRx, uint16_t souces)
2036 {
2037 TMRx->DIEN &= ~souces;
2038 }
2039
2040 /*!
2041 * @brief Enable Capture Compare DMA source
2042 *
2043 * @param TMRx: where x can be 1, 2, 3, 15, 16 and 17 to select the TMR peripheral
2044 *
2045 * @retval None
2046 *
2047 * @note TMR2 it's not for APM32F030 devices
2048 */
TMR_EnableCCDMA(TMR_T * TMRx)2049 void TMR_EnableCCDMA(TMR_T* TMRx)
2050 {
2051 TMRx->CTRL2_B.CCDSEL = ENABLE;
2052 }
2053
2054 /*!
2055 * @brief Disable Capture Compare DMA source
2056 *
2057 * @param TMRx: where x can be 1, 2, 3, 15, 16 and 17 to select the TMR peripheral
2058 *
2059 * @retval None
2060 *
2061 * @note TMR2 it's not for APM32F030 devices
2062 */
TMR_DisableCCDMA(TMR_T * TMRx)2063 void TMR_DisableCCDMA(TMR_T* TMRx)
2064 {
2065 TMRx->CTRL2_B.CCDSEL = DISABLE;
2066 }
2067
2068 /*!
2069 * @brief Configures the TMRx internal Clock
2070 *
2071 * @param TMRx: where x can be 1, 2, 3, and 15 select the TMR peripheral
2072 *
2073 * @retval None
2074 *
2075 * @note TMR2 it's not for APM32F030 devices
2076 */
TMR_ConfigInternalClock(TMR_T * TMRx)2077 void TMR_ConfigInternalClock(TMR_T* TMRx)
2078 {
2079 TMRx->SMCTRL_B.SMFSEL = DISABLE;
2080 }
2081
2082 /*!
2083 * @brief Configures the TMRx Internal Trigger as External Clock
2084 *
2085 * @param TMRx: where x can be 1, 2, 3, and 15 select the TMR peripheral
2086 *
2087 * @param input: specifies the TMR trigger souces
2088 * The parameter can be one of following values:
2089 * @arg TMR_TS_ITR0: TMR Internal Trigger 0
2090 * @arg TMR_TS_ITR1: TMR Internal Trigger 1
2091 * @arg TMR_TS_ITR2: TMR Internal Trigger 2
2092 * @arg TMR_TS_ITR3: TMR Internal Trigger 3
2093 *
2094 * @retval None
2095 *
2096 * @note TMR2 it's not for APM32F030 devices
2097 */
TMR_ConfigITRxExternalClock(TMR_T * TMRx,TMR_INPUT_TRIGGER_SOURCE_T input)2098 void TMR_ConfigITRxExternalClock(TMR_T* TMRx, TMR_INPUT_TRIGGER_SOURCE_T input)
2099 {
2100 TMR_SelectInputTrigger(TMRx, input);
2101 TMRx->SMCTRL_B.SMFSEL = 0x07;
2102 }
2103
2104 /*!
2105 * @brief Configures the TMRx Trigger as External Clock
2106 *
2107 * @param TMRx: where x can be 1, 2, 3, and 15 select the TMR peripheral
2108 *
2109 * @param input: specifies the TMR trigger souces
2110 * The parameter can be one of following values:
2111 * @arg TMR_TS_TI1F_ED: TI1 Edge Detector
2112 * @arg TMR_TS_TI1FP1: Filtered Timer Input 1
2113 * @arg TMR_TS_TI2FP2: Filtered Timer Input 2
2114 *
2115 * @param ICpolarity: specifies the TMR IC polarity
2116 * The parameter can be one of following values:
2117 * @arg TMR_IC_POLARITY_RISING: TMR IC polarity rising
2118 * @arg TMR_IC_POLARITY_FALLING: TMR IC polarity falling
2119 *
2120 * @param ICfilter:specifies the filter value.This parameter must be a value between 0x00 and 0x0F.
2121 *
2122 * @retval None
2123 *
2124 * @note TMR2 it's not for APM32F030 devices
2125 */
TMR_ConfigTIxExternalClock(TMR_T * TMRx,TMR_INPUT_TRIGGER_SOURCE_T input,TMR_IC_POLARITY_T ICpolarity,uint16_t ICfilter)2126 void TMR_ConfigTIxExternalClock(TMR_T* TMRx, TMR_INPUT_TRIGGER_SOURCE_T input,
2127 TMR_IC_POLARITY_T ICpolarity, uint16_t ICfilter)
2128 {
2129 if (input == TMR_TS_TI2FP2)
2130 {
2131 TI2Config(TMRx, ICpolarity, TMR_IC_SELECTION_DIRECT_TI, ICfilter);
2132 }
2133 else
2134 {
2135 TI1Config(TMRx, ICpolarity, TMR_IC_SELECTION_DIRECT_TI, ICfilter);
2136 }
2137
2138 TMR_SelectInputTrigger(TMRx, input);
2139 TMRx->SMCTRL_B.SMFSEL = 0x07;
2140 }
2141
2142 /*!
2143 * @brief Configures the External clock Mode1
2144 *
2145 * @param TMRx: where x can be 1, 2, 3 select the TMR peripheral
2146 *
2147 * @param prescaler: The external Trigger Prescaler.
2148 *
2149 * @param polarity: The external Trigger Polarity.
2150 *
2151 * @param filter: External Trigger Filter.
2152 *
2153 * @retval None
2154 *
2155 * @note TMR2 it's not for APM32F030 devices
2156 */
TMR_ConfigExternalClockMode1(TMR_T * TMRx,TMR_EXTTRG_PRESCALER_T prescaler,TMR_EXTTRG_POLARITY_T polarity,uint16_t filter)2157 void TMR_ConfigExternalClockMode1(TMR_T* TMRx, TMR_EXTTRG_PRESCALER_T prescaler,
2158 TMR_EXTTRG_POLARITY_T polarity, uint16_t filter)
2159 {
2160 TMR_ConfigExternalTrigger(TMRx, prescaler, polarity, filter);
2161 TMRx->SMCTRL_B.SMFSEL = BIT_RESET;
2162 TMRx->SMCTRL_B.SMFSEL = 0x07;
2163 TMRx->SMCTRL_B.TRGSEL = 0x07;
2164 }
2165
2166 /*!
2167 * @brief Configures the External clock Mode2
2168 *
2169 * @param TMRx: where x can be 1, 2, 3 select the TMR peripheral
2170 *
2171 * @param prescaler: The external Trigger Prescaler
2172 *
2173 * @param polarity: The external Trigger Polarity
2174 *
2175 * @param filter: External Trigger Filter
2176 *
2177 * @retval None
2178 *
2179 * @note TMR2 it's not for APM32F030 devices
2180 */
TMR_ConfigExternalClockMode2(TMR_T * TMRx,TMR_EXTTRG_PRESCALER_T prescaler,TMR_EXTTRG_POLARITY_T polarity,uint16_t filter)2181 void TMR_ConfigExternalClockMode2(TMR_T* TMRx, TMR_EXTTRG_PRESCALER_T prescaler,
2182 TMR_EXTTRG_POLARITY_T polarity, uint16_t filter)
2183 {
2184 TMR_ConfigExternalTrigger(TMRx, prescaler, polarity, filter);
2185 TMRx->SMCTRL_B.ECEN = ENABLE;
2186 }
2187
2188 /*!
2189 * @brief Selects the Input Trigger source
2190 *
2191 * @param TMRx: where x can be 1, 2, 3 and 15 select the TMR peripheral
2192 *
2193 * @param input: specifies the TMR trigger souces
2194 * The parameter can be one of following values:
2195 * @arg TMR_TS_ITR0: TMR Internal Trigger 0
2196 * @arg TMR_TS_ITR1: TMR Internal Trigger 1
2197 * @arg TMR_TS_ITR2: TMR Internal Trigger 2
2198 * @arg TMR_TS_ITR3: TMR Internal Trigger 3
2199 * @arg TMR_TS_TI1F_ED: TI1 Edge Detector
2200 * @arg TMR_TS_TI1FP1: Filtered Timer Input 1
2201 * @arg TMR_TS_TI2FP2: Filtered Timer Input 2
2202 * @arg TMR_TS_ETRF: External Trigger input
2203 *
2204 * @retval None
2205 *
2206 * @note TMR2 it's not for APM32F030 devices
2207 */
TMR_SelectInputTrigger(TMR_T * TMRx,TMR_INPUT_TRIGGER_SOURCE_T input)2208 void TMR_SelectInputTrigger(TMR_T* TMRx, TMR_INPUT_TRIGGER_SOURCE_T input)
2209 {
2210 TMRx->SMCTRL_B.TRGSEL = BIT_RESET;
2211 TMRx->SMCTRL_B.TRGSEL = input;
2212 }
2213
2214 /*!
2215 * @brief Selects the Trigger Output Mode.
2216 *
2217 * @param TMRx: where x can be 1, 2, 3, 6, 7 and 15 select the TMR peripheral
2218 *
2219 * @param source: specifies the TMR trigger souces
2220 * The parameter can be one of following values:
2221 * For all TMR:
2222 * @arg TMR_TRGOSOURCE_RESET
2223 * @arg TMR_TRGOSOURCE_ENABLE
2224 * @arg TMR_TRGOSOURCE_UPDATE
2225 For all TMR except TMR6 and TMR7
2226 * @arg TMR_TRGOSOURCE_OC1,
2227 * @arg TMR_TRGOSOURCE_OC1REF
2228 * @arg TMR_TRGOSOURCE_OC2REF
2229 * @arg TMR_TRGOSOURCE_OC3REF
2230 * @arg TMR_TRGOSOURCE_OC4REF
2231 *
2232 * @retval None
2233 *
2234 * @note TMR2 it's not for APM32F030 devices
2235 * TMR7 it's only for APM32F072 and APM32F091 devices
2236 */
TMR_SelectOutputTrigger(TMR_T * TMRx,TMR_TRGOSOURCE_T source)2237 void TMR_SelectOutputTrigger(TMR_T* TMRx, TMR_TRGOSOURCE_T source)
2238 {
2239 TMRx->CTRL2_B.MMSEL = source;
2240 }
2241
2242 /*!
2243 * @brief Selects the Slave Mode.
2244 *
2245 * @param TMRx: where x can be 1, 2, 3 and 15 select the TMR peripheral
2246 *
2247 * @param mode: TMR_SLAVEMODE_T
2248 *
2249 * @retval None
2250 *
2251 * @note TMR2 it's not for APM32F030 devices
2252 */
TMR_SelectSlaveMode(TMR_T * TMRx,TMR_SLAVEMODE_T mode)2253 void TMR_SelectSlaveMode(TMR_T* TMRx, TMR_SLAVEMODE_T mode)
2254 {
2255 TMRx->SMCTRL_B.SMFSEL = mode;
2256 }
2257
2258 /*!
2259 * @brief Enable the Master Slave Mode
2260 *
2261 * @param TMRx: where x can be 1, 2, 3 and 15 select the TMR peripheral
2262 *
2263 * @retval None
2264 *
2265 * @note TMR2 it's not for APM32F030 devices
2266 */
TMR_EnableMasterSlaveMode(TMR_T * TMRx)2267 void TMR_EnableMasterSlaveMode(TMR_T* TMRx)
2268 {
2269 TMRx->SMCTRL_B.MSMEN = ENABLE ;
2270 }
2271
2272 /*!
2273 * @brief Disable the Master Slave Mode
2274 *
2275 * @param TMRx: where x can be 1, 2, 3 and 15 select the TMR peripheral
2276 *
2277 * @retval None
2278 *
2279 * @note TMR2 it's not for APM32F030 devices
2280 */
TMR_DisableMasterSlaveMode(TMR_T * TMRx)2281 void TMR_DisableMasterSlaveMode(TMR_T* TMRx)
2282 {
2283 TMRx->SMCTRL_B.MSMEN = DISABLE ;
2284 }
2285
2286 /*!
2287 * @brief Configures the TMRx External Trigger (ETR)
2288 *
2289 * @param TMRx: where x can be 1, 2, 3 select the TMR peripheral
2290 *
2291 * @param prescaler: The external Trigger Prescaler
2292 *
2293 * @param polarity: The external Trigger Polarity
2294 *
2295 * @param filter: External Trigger Filter
2296 *
2297 * @retval None
2298 *
2299 * @note TMR2 it's not for APM32F030 devices
2300 */
TMR_ConfigExternalTrigger(TMR_T * TMRx,TMR_EXTTRG_PRESCALER_T prescaler,TMR_EXTTRG_POLARITY_T polarity,uint16_t filter)2301 void TMR_ConfigExternalTrigger(TMR_T* TMRx, TMR_EXTTRG_PRESCALER_T prescaler,
2302 TMR_EXTTRG_POLARITY_T polarity, uint16_t filter)
2303 {
2304 TMRx->SMCTRL &= 0x00FF;
2305 TMRx->SMCTRL_B.ETPCFG = prescaler;
2306 TMRx->SMCTRL_B.ETPOL = polarity;
2307 TMRx->SMCTRL_B.ETFCFG = filter;
2308 }
2309
2310 /*!
2311 * @brief Configures the Encoder Interface
2312 *
2313 * @param TMRx: where x can be 1, 2, 3 select the TMR peripheral
2314 *
2315 * @param encodeMode: specifies the Encoder Mode
2316 *
2317 * @param IC1Polarity: specifies the IC1 Polarity
2318 *
2319 * @param IC2Polarity: specifies the IC2 Polarity
2320 *
2321 * @retval None
2322 *
2323 * @note TMR2 it's not for APM32F030 devices
2324 */
TMR_ConfigEncodeInterface(TMR_T * TMRx,TMR_ENCODER_MODE_T encodeMode,TMR_IC_POLARITY_T IC1Polarity,TMR_IC_POLARITY_T IC2Polarity)2325 void TMR_ConfigEncodeInterface(TMR_T* TMRx, TMR_ENCODER_MODE_T encodeMode, TMR_IC_POLARITY_T IC1Polarity,
2326 TMR_IC_POLARITY_T IC2Polarity)
2327 {
2328 /** Set the encoder Mode */
2329 TMRx->SMCTRL_B.SMFSEL = BIT_RESET;
2330 TMRx->SMCTRL_B.SMFSEL = encodeMode;
2331
2332 /** Select the Capture Compare 1 and the Capture Compare 2 as input */
2333 TMRx->CCM1_INPUT_B.CC1SEL = BIT_RESET ;
2334 TMRx->CCM1_INPUT_B.CC2SEL = BIT_RESET ;
2335 TMRx->CCM1_INPUT_B.CC1SEL = BIT_SET ;
2336 TMRx->CCM1_INPUT_B.CC2SEL = BIT_SET ;
2337
2338 /** Set the TI1 and the TI2 Polarities */
2339 TMRx->CCEN &= ~(TMR_IC_POLARITY_BOTHEDGE) & ~(TMR_IC_POLARITY_BOTHEDGE << 4);
2340 TMRx->CCEN |= (IC1Polarity | IC2Polarity << 4);
2341 }
2342
2343 /*!
2344 * @brief Enables Hall sensor interface.
2345 *
2346 * @param TMRx: where x can be 1, 2, 3 select the TMR peripheral
2347 *
2348 * @retval None
2349 *
2350 * @note TMR2 it's not for APM32F030 devices
2351 */
TMR_EnableHallSensor(TMR_T * TMRx)2352 void TMR_EnableHallSensor(TMR_T* TMRx)
2353 {
2354 TMRx->CTRL2_B.TI1SEL = ENABLE;
2355 }
2356
2357 /*!
2358 * @brief Disable Hall sensor interface.
2359 *
2360 * @param TMRx: where x can be 1, 2, 3 select the TMR peripheral
2361 *
2362 * @retval None
2363 *
2364 * @note TMR2 it's not for APM32F030 devices
2365 */
TMR_DisableHallSensor(TMR_T * TMRx)2366 void TMR_DisableHallSensor(TMR_T* TMRx)
2367 {
2368 TMRx->CTRL2_B.TI1SEL = DISABLE;
2369 }
2370
2371 /*!
2372 * @brief Configures the TMR14 Remapping input Capabilities.
2373 *
2374 * @param TMRx: where x can only for 14 select the TMR peripheral
2375 *
2376 * @param remap: specifies the TMR input reampping source
2377 * The parameter can be one of following values:
2378 * @arg TMR_REMAP_GPIO
2379 * @arg TMR_REMAP_RTC_CLK
2380 * @arg TMR_REMAP_HSEDiv32
2381 * @arg TMR_REMAP_MCO
2382 *
2383 * @retval None
2384 *
2385 * @note TMR2 it's not for APM32F030 devices
2386 */
TMR_ConfigRemap(TMR_T * TMRx,TMR_REMAP_T remap)2387 void TMR_ConfigRemap(TMR_T* TMRx, TMR_REMAP_T remap)
2388 {
2389 TMRx->OPT_B.RMPSEL = remap;
2390 }
2391
2392 /**@} end of group TMR_Functions*/
2393 /**@} end of group TMR_Driver */
2394 /**@} end of group APM32F0xx_StdPeriphDriver*/
2395