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/bsp/renesas/rzn2l_rsk/rzn/arm/CMSIS_5/CMSIS/Core_R/Include/
A Dcmsis_iccarm.h276 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
279 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", (VALUE))) argument
282 #define __set_FPSCR(VALUE) ((void) VALUE) argument
285 #define __set_FPEXC(VALUE) ((void) VALUE) argument
314 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
319 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
324 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
328 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
352 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
556 #define __set_FPSCR(VALUE) ((void)VALUE) argument
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/bsp/renesas/rzt2m_rsk/rzt/arm/CMSIS_5/CMSIS/Core_R/Include/
A Dcmsis_iccarm.h276 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
279 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", (VALUE))) argument
282 #define __set_FPSCR(VALUE) ((void) VALUE) argument
285 #define __set_FPEXC(VALUE) ((void) VALUE) argument
314 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
319 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
324 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
328 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
352 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
556 #define __set_FPSCR(VALUE) ((void)VALUE) argument
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/bsp/renesas/rzn2l_etherkit/rzn/arm/CMSIS_5/CMSIS/Core_R/Include/
A Dcmsis_iccarm.h276 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
279 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", (VALUE))) argument
282 #define __set_FPSCR(VALUE) ((void) VALUE) argument
285 #define __set_FPEXC(VALUE) ((void) VALUE) argument
314 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
319 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
324 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
328 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
352 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
556 #define __set_FPSCR(VALUE) ((void)VALUE) argument
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/bsp/synwit/libraries/SWM341_CSL/CMSIS/CoreSupport/
A Dcmsis_iccarm.h309 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
312 #define __set_FPSCR(VALUE) ((void)VALUE) argument
341 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
346 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
348 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
351 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
355 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
357 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
367 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
379 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/acm32/acm32f4xx-nucleo/libraries/CMSIS/
A Dcmsis_iccarm.h309 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
312 #define __set_FPSCR(VALUE) ((void)VALUE) argument
341 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
346 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
348 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
351 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
355 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
357 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
367 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
379 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
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/bsp/hc32l136/Libraries/CMSIS/Include/
A Dcmsis_iccarm.h307 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
310 #define __set_FPSCR(VALUE) ((void)VALUE) argument
339 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
344 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
346 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
349 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
353 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
355 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
365 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
377 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/microchip/samd51-adafruit-metro-m4/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/microchip/samc21/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/msp432e401y-LaunchPad/libraries/Drivers/CMSIS/Include/
A Dcmsis_iccarm.h286 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
289 #define __set_FPSCR(VALUE) ((void)VALUE) argument
318 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
323 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
325 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
328 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
332 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
334 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
344 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
356 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32/libraries/N32L43x_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32/libraries/N32WB452_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32/libraries/N32G4FR_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32/libraries/N32L40x_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32/libraries/N32G43x_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32/libraries/N32G45x_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/tae32f5300/Libraries/CMSIS/Include/
A Dcmsis_iccarm.h309 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
312 #define __set_FPSCR(VALUE) ((void)VALUE) argument
341 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
346 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
348 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
351 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
355 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
357 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
367 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
379 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/hc32l196/Libraries/CMSIS/Include/
A Dcmsis_iccarm.h307 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
310 #define __set_FPSCR(VALUE) ((void)VALUE) argument
339 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
344 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
346 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
349 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
353 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
355 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
365 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
377 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/microchip/saml10/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/
A Dcmsis_iccarm.h307 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
310 #define __set_FPSCR(VALUE) ((void)VALUE) argument
339 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
344 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
346 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
349 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
353 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
355 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
365 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
377 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/microchip/same70/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32g452xx/Libraries/N32_Std_Driver/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/nrf5x/libraries/cmsis/include/
A Dcmsis_iccarm.h307 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
310 #define __set_FPSCR(VALUE) ((void)VALUE) argument
339 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
344 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
346 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
349 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
353 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
355 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
365 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
377 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/microchip/samd51-seeed-wio-terminal/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
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