1 //########################################################################### 2 // 3 // FILE: F2837xD_dcsm.h 4 // 5 // TITLE: DCSM Register Definitions. 6 // 7 //########################################################################### 8 // $TI Release: F2837xD Support Library v3.05.00.00 $ 9 // $Release Date: Tue Jun 26 03:15:23 CDT 2018 $ 10 // $Copyright: 11 // Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/ 12 // 13 // Redistribution and use in source and binary forms, with or without 14 // modification, are permitted provided that the following conditions 15 // are met: 16 // 17 // Redistributions of source code must retain the above copyright 18 // notice, this list of conditions and the following disclaimer. 19 // 20 // Redistributions in binary form must reproduce the above copyright 21 // notice, this list of conditions and the following disclaimer in the 22 // documentation and/or other materials provided with the 23 // distribution. 24 // 25 // Neither the name of Texas Instruments Incorporated nor the names of 26 // its contributors may be used to endorse or promote products derived 27 // from this software without specific prior written permission. 28 // 29 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 // $ 41 //########################################################################### 42 43 #ifndef __F2837xD_DCSM_H__ 44 #define __F2837xD_DCSM_H__ 45 46 #ifdef __cplusplus 47 extern "C" { 48 #endif 49 50 51 //--------------------------------------------------------------------------- 52 // DCSM Individual Register Bit Definitions: 53 54 struct Z1_LINKPOINTER_BITS { // bits description 55 Uint32 LINKPOINTER:29; // 28:0 Zone1 LINK Pointer. 56 Uint16 rsvd1:3; // 31:29 Reserved 57 }; 58 59 union Z1_LINKPOINTER_REG { 60 Uint32 all; 61 struct Z1_LINKPOINTER_BITS bit; 62 }; 63 64 struct Z1_OTPSECLOCK_BITS { // bits description 65 Uint16 rsvd1:4; // 3:0 Reserved 66 Uint16 PSWDLOCK:4; // 7:4 Zone1 Password Lock. 67 Uint16 CRCLOCK:4; // 11:8 Zone1 CRC Lock. 68 Uint16 rsvd2:4; // 15:12 Reserved 69 Uint16 rsvd3:16; // 31:16 Reserved 70 }; 71 72 union Z1_OTPSECLOCK_REG { 73 Uint32 all; 74 struct Z1_OTPSECLOCK_BITS bit; 75 }; 76 77 struct Z1_BOOTCTRL_BITS { // bits description 78 Uint16 KEY:8; // 7:0 OTP Boot Key 79 Uint16 BMODE:8; // 15:8 OTP Boot Mode 80 Uint16 BOOTPIN0:8; // 23:16 OTP Boot Pin 0 Mapping 81 Uint16 BOOTPIN1:8; // 31:24 OTP Boot Pin 1 Mapping 82 }; 83 84 union Z1_BOOTCTRL_REG { 85 Uint32 all; 86 struct Z1_BOOTCTRL_BITS bit; 87 }; 88 89 struct Z1_CR_BITS { // bits description 90 Uint16 rsvd1:3; // 2:0 Reserved 91 Uint16 ALLZERO:1; // 3 CSMPSWD All Zeros 92 Uint16 ALLONE:1; // 4 CSMPSWD All Ones 93 Uint16 UNSECURE:1; // 5 CSMPSWD Match CSMKEY 94 Uint16 ARMED:1; // 6 CSM Armed 95 Uint16 rsvd2:1; // 7 Reserved 96 Uint16 rsvd3:7; // 14:8 Reserved 97 Uint16 FORCESEC:1; // 15 Force Secure 98 }; 99 100 union Z1_CR_REG { 101 Uint16 all; 102 struct Z1_CR_BITS bit; 103 }; 104 105 struct Z1_GRABSECTR_BITS { // bits description 106 Uint16 GRAB_SECTA:2; // 1:0 Grab Flash Sector A 107 Uint16 GRAB_SECTB:2; // 3:2 Grab Flash Sector B 108 Uint16 GRAB_SECTC:2; // 5:4 Grab Flash Sector C 109 Uint16 GRAB_SECTD:2; // 7:6 Grab Flash Sector D 110 Uint16 GRAB_SECTE:2; // 9:8 Grab Flash Sector E 111 Uint16 GRAB_SECTF:2; // 11:10 Grab Flash Sector F 112 Uint16 GRAB_SECTG:2; // 13:12 Grab Flash Sector G 113 Uint16 GRAB_SECTH:2; // 15:14 Grab Flash Sector H 114 Uint16 GRAB_SECTI:2; // 17:16 Grab Flash Sector I 115 Uint16 GRAB_SECTJ:2; // 19:18 Grab Flash Sector J 116 Uint16 GRAB_SECTK:2; // 21:20 Grab Flash Sector K 117 Uint16 GRAB_SECTL:2; // 23:22 Grab Flash Sector L 118 Uint16 GRAB_SECTM:2; // 25:24 Grab Flash Sector M 119 Uint16 GRAB_SECTN:2; // 27:26 Grab Flash Sector N 120 Uint16 rsvd1:2; // 29:28 Reserved 121 Uint16 rsvd2:2; // 31:30 Reserved 122 }; 123 124 union Z1_GRABSECTR_REG { 125 Uint32 all; 126 struct Z1_GRABSECTR_BITS bit; 127 }; 128 129 struct Z1_GRABRAMR_BITS { // bits description 130 Uint16 GRAB_RAM0:2; // 1:0 Grab RAM LS0 131 Uint16 GRAB_RAM1:2; // 3:2 Grab RAM LS1 132 Uint16 GRAB_RAM2:2; // 5:4 Grab RAM LS2 133 Uint16 GRAB_RAM3:2; // 7:6 Grab RAM LS3 134 Uint16 GRAB_RAM4:2; // 9:8 Grab RAM LS4 135 Uint16 GRAB_RAM5:2; // 11:10 Grab RAM LS5 136 Uint16 GRAB_RAM6:2; // 13:12 Grab RAM D0 137 Uint16 GRAB_RAM7:2; // 15:14 Grab RAM D1 138 Uint16 rsvd1:12; // 27:16 Reserved 139 Uint16 GRAB_CLA1:2; // 29:28 Grab CLA1 140 Uint16 rsvd2:2; // 31:30 Reserved 141 }; 142 143 union Z1_GRABRAMR_REG { 144 Uint32 all; 145 struct Z1_GRABRAMR_BITS bit; 146 }; 147 148 struct Z1_EXEONLYSECTR_BITS { // bits description 149 Uint16 EXEONLY_SECTA:1; // 0 Execute-Only Flash Sector A 150 Uint16 EXEONLY_SECTB:1; // 1 Execute-Only Flash Sector B 151 Uint16 EXEONLY_SECTC:1; // 2 Execute-Only Flash Sector C 152 Uint16 EXEONLY_SECTD:1; // 3 Execute-Only Flash Sector D 153 Uint16 EXEONLY_SECTE:1; // 4 Execute-Only Flash Sector E 154 Uint16 EXEONLY_SECTF:1; // 5 Execute-Only Flash Sector F 155 Uint16 EXEONLY_SECTG:1; // 6 Execute-Only Flash Sector G 156 Uint16 EXEONLY_SECTH:1; // 7 Execute-Only Flash Sector H 157 Uint16 EXEONLY_SECTI:1; // 8 Execute-Only Flash Sector I 158 Uint16 EXEONLY_SECTJ:1; // 9 Execute-Only Flash Sector J 159 Uint16 EXEONLY_SECTK:1; // 10 Execute-Only Flash Sector K 160 Uint16 EXEONLY_SECTL:1; // 11 Execute-Only Flash Sector L 161 Uint16 EXEONLY_SECTM:1; // 12 Execute-Only Flash Sector M 162 Uint16 EXEONLY_SECTN:1; // 13 Execute-Only Flash Sector N 163 Uint16 rsvd1:1; // 14 Reserved 164 Uint16 rsvd2:1; // 15 Reserved 165 Uint16 rsvd3:16; // 31:16 Reserved 166 }; 167 168 union Z1_EXEONLYSECTR_REG { 169 Uint32 all; 170 struct Z1_EXEONLYSECTR_BITS bit; 171 }; 172 173 struct Z1_EXEONLYRAMR_BITS { // bits description 174 Uint16 EXEONLY_RAM0:1; // 0 Execute-Only RAM LS0 175 Uint16 EXEONLY_RAM1:1; // 1 Execute-Only RAM LS1 176 Uint16 EXEONLY_RAM2:1; // 2 Execute-Only RAM LS2 177 Uint16 EXEONLY_RAM3:1; // 3 Execute-Only RAM LS3 178 Uint16 EXEONLY_RAM4:1; // 4 Execute-Only RAM LS4 179 Uint16 EXEONLY_RAM5:1; // 5 Execute-Only RAM LS5 180 Uint16 EXEONLY_RAM6:1; // 6 Execute-Only RAM D0 181 Uint16 EXEONLY_RAM7:1; // 7 Execute-Only RAM D1 182 Uint16 rsvd1:8; // 15:8 Reserved 183 Uint16 rsvd2:16; // 31:16 Reserved 184 }; 185 186 union Z1_EXEONLYRAMR_REG { 187 Uint32 all; 188 struct Z1_EXEONLYRAMR_BITS bit; 189 }; 190 191 struct DCSM_Z1_REGS { 192 union Z1_LINKPOINTER_REG Z1_LINKPOINTER; // Zone 1 Link Pointer 193 union Z1_OTPSECLOCK_REG Z1_OTPSECLOCK; // Zone 1 OTP Secure JTAG lock 194 union Z1_BOOTCTRL_REG Z1_BOOTCTRL; // Boot Mode 195 Uint32 Z1_LINKPOINTERERR; // Link Pointer Error 196 Uint16 rsvd1[8]; // Reserved 197 Uint32 Z1_CSMKEY0; // Zone 1 CSM Key 0 198 Uint32 Z1_CSMKEY1; // Zone 1 CSM Key 1 199 Uint32 Z1_CSMKEY2; // Zone 1 CSM Key 2 200 Uint32 Z1_CSMKEY3; // Zone 1 CSM Key 3 201 Uint16 rsvd2; // Reserved 202 union Z1_CR_REG Z1_CR; // Zone 1 CSM Control Register 203 union Z1_GRABSECTR_REG Z1_GRABSECTR; // Zone 1 Grab Flash Sectors Register 204 union Z1_GRABRAMR_REG Z1_GRABRAMR; // Zone 1 Grab RAM Blocks Register 205 union Z1_EXEONLYSECTR_REG Z1_EXEONLYSECTR; // Zone 1 Flash Execute_Only Sector Register 206 union Z1_EXEONLYRAMR_REG Z1_EXEONLYRAMR; // Zone 1 RAM Execute_Only Block Register 207 Uint16 rsvd3; // Reserved 208 }; 209 210 struct Z2_LINKPOINTER_BITS { // bits description 211 Uint32 LINKPOINTER:29; // 28:0 Zone2 LINK Pointer. 212 Uint16 rsvd1:3; // 31:29 Reserved 213 }; 214 215 union Z2_LINKPOINTER_REG { 216 Uint32 all; 217 struct Z2_LINKPOINTER_BITS bit; 218 }; 219 220 struct Z2_OTPSECLOCK_BITS { // bits description 221 Uint16 rsvd1:4; // 3:0 Reserved 222 Uint16 PSWDLOCK:4; // 7:4 Zone2 Password Lock. 223 Uint16 CRCLOCK:4; // 11:8 Zone2 CRC Lock. 224 Uint16 rsvd2:4; // 15:12 Reserved 225 Uint16 rsvd3:16; // 31:16 Reserved 226 }; 227 228 union Z2_OTPSECLOCK_REG { 229 Uint32 all; 230 struct Z2_OTPSECLOCK_BITS bit; 231 }; 232 233 struct Z2_BOOTCTRL_BITS { // bits description 234 Uint16 KEY:8; // 7:0 OTP Boot Key 235 Uint16 BMODE:8; // 15:8 OTP Boot Mode 236 Uint16 BOOTPIN0:8; // 23:16 OTP Boot Pin 0 Mapping 237 Uint16 BOOTPIN1:8; // 31:24 OTP Boot Pin 1 Mapping 238 }; 239 240 union Z2_BOOTCTRL_REG { 241 Uint32 all; 242 struct Z2_BOOTCTRL_BITS bit; 243 }; 244 245 struct Z2_CR_BITS { // bits description 246 Uint16 rsvd1:3; // 2:0 Reserved 247 Uint16 ALLZERO:1; // 3 CSMPSWD All Zeros 248 Uint16 ALLONE:1; // 4 CSMPSWD All Ones 249 Uint16 UNSECURE:1; // 5 CSMPSWD Match CSMKEY 250 Uint16 ARMED:1; // 6 CSM Armed 251 Uint16 rsvd2:1; // 7 Reserved 252 Uint16 rsvd3:7; // 14:8 Reserved 253 Uint16 FORCESEC:1; // 15 Force Secure 254 }; 255 256 union Z2_CR_REG { 257 Uint16 all; 258 struct Z2_CR_BITS bit; 259 }; 260 261 struct Z2_GRABSECTR_BITS { // bits description 262 Uint16 GRAB_SECTA:2; // 1:0 Grab Flash Sector A 263 Uint16 GRAB_SECTB:2; // 3:2 Grab Flash Sector B 264 Uint16 GRAB_SECTC:2; // 5:4 Grab Flash Sector C 265 Uint16 GRAB_SECTD:2; // 7:6 Grab Flash Sector D 266 Uint16 GRAB_SECTE:2; // 9:8 Grab Flash Sector E 267 Uint16 GRAB_SECTF:2; // 11:10 Grab Flash Sector F 268 Uint16 GRAB_SECTG:2; // 13:12 Grab Flash Sector G 269 Uint16 GRAB_SECTH:2; // 15:14 Grab Flash Sector H 270 Uint16 GRAB_SECTI:2; // 17:16 Grab Flash Sector I 271 Uint16 GRAB_SECTJ:2; // 19:18 Grab Flash Sector J 272 Uint16 GRAB_SECTK:2; // 21:20 Grab Flash Sector K 273 Uint16 GRAB_SECTL:2; // 23:22 Grab Flash Sector L 274 Uint16 GRAB_SECTM:2; // 25:24 Grab Flash Sector M 275 Uint16 GRAB_SECTN:2; // 27:26 Grab Flash Sector N 276 Uint16 rsvd1:2; // 29:28 Reserved 277 Uint16 rsvd2:2; // 31:30 Reserved 278 }; 279 280 union Z2_GRABSECTR_REG { 281 Uint32 all; 282 struct Z2_GRABSECTR_BITS bit; 283 }; 284 285 struct Z2_GRABRAMR_BITS { // bits description 286 Uint16 GRAB_RAM0:2; // 1:0 Grab RAM LS0 287 Uint16 GRAB_RAM1:2; // 3:2 Grab RAM LS1 288 Uint16 GRAB_RAM2:2; // 5:4 Grab RAM LS2 289 Uint16 GRAB_RAM3:2; // 7:6 Grab RAM LS3 290 Uint16 GRAB_RAM4:2; // 9:8 Grab RAM LS4 291 Uint16 GRAB_RAM5:2; // 11:10 Grab RAM LS5 292 Uint16 GRAB_RAM6:2; // 13:12 Grab RAM D0 293 Uint16 GRAB_RAM7:2; // 15:14 Grab RAM D1 294 Uint16 rsvd1:12; // 27:16 Reserved 295 Uint16 GRAB_CLA1:2; // 29:28 Grab CLA1 296 Uint16 rsvd2:2; // 31:30 Reserved 297 }; 298 299 union Z2_GRABRAMR_REG { 300 Uint32 all; 301 struct Z2_GRABRAMR_BITS bit; 302 }; 303 304 struct Z2_EXEONLYSECTR_BITS { // bits description 305 Uint16 EXEONLY_SECTA:1; // 0 Execute-Only Flash Sector A 306 Uint16 EXEONLY_SECTB:1; // 1 Execute-Only Flash Sector B 307 Uint16 EXEONLY_SECTC:1; // 2 Execute-Only Flash Sector C 308 Uint16 EXEONLY_SECTD:1; // 3 Execute-Only Flash Sector D 309 Uint16 EXEONLY_SECTE:1; // 4 Execute-Only Flash Sector E 310 Uint16 EXEONLY_SECTF:1; // 5 Execute-Only Flash Sector F 311 Uint16 EXEONLY_SECTG:1; // 6 Execute-Only Flash Sector G 312 Uint16 EXEONLY_SECTH:1; // 7 Execute-Only Flash Sector H 313 Uint16 EXEONLY_SECTI:1; // 8 Execute-Only Flash Sector I 314 Uint16 EXEONLY_SECTJ:1; // 9 Execute-Only Flash Sector J 315 Uint16 EXEONLY_SECTK:1; // 10 Execute-Only Flash Sector K 316 Uint16 EXEONLY_SECTL:1; // 11 Execute-Only Flash Sector L 317 Uint16 EXEONLY_SECTM:1; // 12 Execute-Only Flash Sector M 318 Uint16 EXEONLY_SECTN:1; // 13 Execute-Only Flash Sector N 319 Uint16 rsvd1:1; // 14 Reserved 320 Uint16 rsvd2:1; // 15 Reserved 321 Uint16 rsvd3:16; // 31:16 Reserved 322 }; 323 324 union Z2_EXEONLYSECTR_REG { 325 Uint32 all; 326 struct Z2_EXEONLYSECTR_BITS bit; 327 }; 328 329 struct Z2_EXEONLYRAMR_BITS { // bits description 330 Uint16 EXEONLY_RAM0:1; // 0 Execute-Only RAM LS0 331 Uint16 EXEONLY_RAM1:1; // 1 Execute-Only RAM LS1 332 Uint16 EXEONLY_RAM2:1; // 2 Execute-Only RAM LS2 333 Uint16 EXEONLY_RAM3:1; // 3 Execute-Only RAM LS3 334 Uint16 EXEONLY_RAM4:1; // 4 Execute-Only RAM LS4 335 Uint16 EXEONLY_RAM5:1; // 5 Execute-Only RAM LS5 336 Uint16 EXEONLY_RAM6:1; // 6 Execute-Only RAM D0 337 Uint16 EXEONLY_RAM7:1; // 7 Execute-Only RAM D1 338 Uint16 rsvd1:8; // 15:8 Reserved 339 Uint16 rsvd2:16; // 31:16 Reserved 340 }; 341 342 union Z2_EXEONLYRAMR_REG { 343 Uint32 all; 344 struct Z2_EXEONLYRAMR_BITS bit; 345 }; 346 347 struct DCSM_Z2_REGS { 348 union Z2_LINKPOINTER_REG Z2_LINKPOINTER; // Zone 2 Link Pointer 349 union Z2_OTPSECLOCK_REG Z2_OTPSECLOCK; // Zone 2 OTP Secure JTAG lock 350 union Z2_BOOTCTRL_REG Z2_BOOTCTRL; // Boot Mode 351 Uint32 Z2_LINKPOINTERERR; // Link Pointer Error 352 Uint16 rsvd1[8]; // Reserved 353 Uint32 Z2_CSMKEY0; // Zone 2 CSM Key 0 354 Uint32 Z2_CSMKEY1; // Zone 2 CSM Key 1 355 Uint32 Z2_CSMKEY2; // Zone 2 CSM Key 2 356 Uint32 Z2_CSMKEY3; // Zone 2 CSM Key 3 357 Uint16 rsvd2; // Reserved 358 union Z2_CR_REG Z2_CR; // Zone 2 CSM Control Register 359 union Z2_GRABSECTR_REG Z2_GRABSECTR; // Zone 2 Grab Flash Sectors Register 360 union Z2_GRABRAMR_REG Z2_GRABRAMR; // Zone 2 Grab RAM Blocks Register 361 union Z2_EXEONLYSECTR_REG Z2_EXEONLYSECTR; // Zone 2 Flash Execute_Only Sector Register 362 union Z2_EXEONLYRAMR_REG Z2_EXEONLYRAMR; // Zone 2 RAM Execute_Only Block Register 363 Uint16 rsvd3; // Reserved 364 }; 365 366 struct FLSEM_BITS { // bits description 367 Uint16 SEM:2; // 1:0 Flash Semaphore Bit 368 Uint16 rsvd1:6; // 7:2 Reserved 369 Uint16 KEY:8; // 15:8 Semaphore Key 370 Uint16 rsvd2:16; // 31:16 Reserved 371 }; 372 373 union FLSEM_REG { 374 Uint32 all; 375 struct FLSEM_BITS bit; 376 }; 377 378 struct SECTSTAT_BITS { // bits description 379 Uint16 STATUS_SECTA:2; // 1:0 Zone Status Flash Sector A 380 Uint16 STATUS_SECTB:2; // 3:2 Zone Status Flash Sector B 381 Uint16 STATUS_SECTC:2; // 5:4 Zone Status Flash Sector C 382 Uint16 STATUS_SECTD:2; // 7:6 Zone Status Flash Sector D 383 Uint16 STATUS_SECTE:2; // 9:8 Zone Status Flash Sector E 384 Uint16 STATUS_SECTF:2; // 11:10 Zone Status Flash Sector F 385 Uint16 STATUS_SECTG:2; // 13:12 Zone Status Flash Sector G 386 Uint16 STATUS_SECTH:2; // 15:14 Zone Status Flash Sector H 387 Uint16 STATUS_SECTI:2; // 17:16 Zone Status Flash Sector I 388 Uint16 STATUS_SECTJ:2; // 19:18 Zone Status Flash Sector J 389 Uint16 STATUS_SECTK:2; // 21:20 Zone Status Flash Sector K 390 Uint16 STATUS_SECTL:2; // 23:22 Zone Status Flash Sector L 391 Uint16 STATUS_SECTM:2; // 25:24 Zone Status Flash Sector M 392 Uint16 STATUS_SECTN:2; // 27:26 Zone Status Flash Sector N 393 Uint16 rsvd1:2; // 29:28 Reserved 394 Uint16 rsvd2:2; // 31:30 Reserved 395 }; 396 397 union SECTSTAT_REG { 398 Uint32 all; 399 struct SECTSTAT_BITS bit; 400 }; 401 402 struct RAMSTAT_BITS { // bits description 403 Uint16 STATUS_RAM0:2; // 1:0 Zone Status RAM LS0 404 Uint16 STATUS_RAM1:2; // 3:2 Zone Status RAM LS1 405 Uint16 STATUS_RAM2:2; // 5:4 Zone Status RAM LS2 406 Uint16 STATUS_RAM3:2; // 7:6 Zone Status RAM LS3 407 Uint16 STATUS_RAM4:2; // 9:8 Zone Status RAM LS4 408 Uint16 STATUS_RAM5:2; // 11:10 Zone Status RAM LS5 409 Uint16 STATUS_RAM6:2; // 13:12 Zone Status RAM D0 410 Uint16 STATUS_RAM7:2; // 15:14 Zone Status RAM D1 411 Uint16 rsvd1:12; // 27:16 Reserved 412 Uint16 STATUS_CLA1:2; // 29:28 Zone Status CLA1 413 Uint16 rsvd2:2; // 31:30 Reserved 414 }; 415 416 union RAMSTAT_REG { 417 Uint32 all; 418 struct RAMSTAT_BITS bit; 419 }; 420 421 struct DCSM_COMMON_REGS { 422 union FLSEM_REG FLSEM; // Flash Wrapper Semaphore Register 423 union SECTSTAT_REG SECTSTAT; // Sectors Status Register 424 union RAMSTAT_REG RAMSTAT; // RAM Status Register 425 Uint16 rsvd1[2]; // Reserved 426 }; 427 428 //--------------------------------------------------------------------------- 429 // DCSM External References & Function Declarations: 430 // 431 #ifdef CPU1 432 extern volatile struct DCSM_Z1_REGS DcsmZ1Regs; 433 extern volatile struct DCSM_Z2_REGS DcsmZ2Regs; 434 extern volatile struct DCSM_COMMON_REGS DcsmCommonRegs; 435 #endif 436 #ifdef CPU2 437 extern volatile struct DCSM_Z1_REGS DcsmZ1Regs; 438 extern volatile struct DCSM_Z2_REGS DcsmZ2Regs; 439 extern volatile struct DCSM_COMMON_REGS DcsmCommonRegs; 440 #endif 441 #ifdef __cplusplus 442 } 443 #endif /* extern "C" */ 444 445 #endif 446 447 //=========================================================================== 448 // End of file. 449 //=========================================================================== 450