1 /** 2 ****************************************************************************** 3 * @file stm32l1xx_hal_lcd.h 4 * @author MCD Application Team 5 * @brief Header file of LCD Controller HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32L1xx_HAL_LCD_H 22 #define __STM32L1xx_HAL_LCD_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /** @addtogroup STM32L1xx_HAL_Driver 29 * @{ 30 */ 31 32 #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\ 33 defined (STM32L152xB) || defined (STM32L152xBA) || defined (STM32L152xC) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L152xE) || defined (STM32L152xDX) ||\ 34 defined (STM32L162xC) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L162xE) || defined (STM32L162xDX) 35 36 /* Includes ------------------------------------------------------------------*/ 37 #include "stm32l1xx_hal_def.h" 38 39 /** @addtogroup LCD 40 * @{ 41 */ 42 43 /* Exported types ------------------------------------------------------------*/ 44 45 /** @defgroup LCD_Exported_Types LCD Exported Types 46 * @{ 47 */ 48 49 /** 50 * @brief LCD Init structure definition 51 */ 52 53 typedef struct 54 { 55 uint32_t Prescaler; /*!< Configures the LCD Prescaler. 56 This parameter can be one value of @ref LCD_Prescaler */ 57 uint32_t Divider; /*!< Configures the LCD Divider. 58 This parameter can be one value of @ref LCD_Divider */ 59 uint32_t Duty; /*!< Configures the LCD Duty. 60 This parameter can be one value of @ref LCD_Duty */ 61 uint32_t Bias; /*!< Configures the LCD Bias. 62 This parameter can be one value of @ref LCD_Bias */ 63 uint32_t VoltageSource; /*!< Selects the LCD Voltage source. 64 This parameter can be one value of @ref LCD_Voltage_Source */ 65 uint32_t Contrast; /*!< Configures the LCD Contrast. 66 This parameter can be one value of @ref LCD_Contrast */ 67 uint32_t DeadTime; /*!< Configures the LCD Dead Time. 68 This parameter can be one value of @ref LCD_DeadTime */ 69 uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration. 70 This parameter can be one value of @ref LCD_PulseOnDuration */ 71 uint32_t HighDrive; /*!< Configures the LCD High Drive. 72 This parameter can be one value of @ref LCD_HighDrive */ 73 uint32_t BlinkMode; /*!< Configures the LCD Blink Mode. 74 This parameter can be one value of @ref LCD_BlinkMode */ 75 uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency. 76 This parameter can be one value of @ref LCD_BlinkFrequency */ 77 uint32_t MuxSegment; /*!< Enable or disable mux segment. 78 This parameter can be set to ENABLE or DISABLE. */ 79 }LCD_InitTypeDef; 80 81 /** 82 * @brief HAL LCD State structures definition 83 */ 84 typedef enum 85 { 86 HAL_LCD_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */ 87 HAL_LCD_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ 88 HAL_LCD_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ 89 HAL_LCD_STATE_TIMEOUT = 0x03, /*!< Timeout state */ 90 HAL_LCD_STATE_ERROR = 0x04 /*!< Error */ 91 }HAL_LCD_StateTypeDef; 92 93 /** 94 * @brief UART handle Structure definition 95 */ 96 typedef struct 97 { 98 LCD_TypeDef *Instance; /* LCD registers base address */ 99 100 LCD_InitTypeDef Init; /* LCD communication parameters */ 101 102 HAL_LockTypeDef Lock; /* Locking object */ 103 104 __IO HAL_LCD_StateTypeDef State; /* LCD communication state */ 105 106 __IO uint32_t ErrorCode; /* LCD Error code */ 107 108 }LCD_HandleTypeDef; 109 110 /** 111 * @} 112 */ 113 114 /* Exported constants --------------------------------------------------------*/ 115 116 /** @defgroup LCD_Exported_Constants LCD Exported Constants 117 * @{ 118 */ 119 120 /** @defgroup LCD_Error_Codes LCD Error Codes 121 * @{ 122 */ 123 124 #define HAL_LCD_ERROR_NONE (0x00U) /*!< No error */ 125 #define HAL_LCD_ERROR_FCRSF (0x01U) /*!< Synchro flag timeout error */ 126 #define HAL_LCD_ERROR_UDR (0x02U) /*!< Update display request flag timeout error */ 127 #define HAL_LCD_ERROR_UDD (0x04U) /*!< Update display done flag timeout error */ 128 #define HAL_LCD_ERROR_ENS (0x08U) /*!< LCD enabled status flag timeout error */ 129 #define HAL_LCD_ERROR_RDY (0x10U) /*!< LCD Booster ready timeout error */ 130 131 /** 132 * @} 133 */ 134 135 /** @defgroup LCD_Prescaler LCD Prescaler 136 * @{ 137 */ 138 139 #define LCD_PRESCALER_1 (0x00000000U) /*!< CLKPS = LCDCLK */ 140 #define LCD_PRESCALER_2 (0x00400000U) /*!< CLKPS = LCDCLK/2 */ 141 #define LCD_PRESCALER_4 (0x00800000U) /*!< CLKPS = LCDCLK/4 */ 142 #define LCD_PRESCALER_8 (0x00C00000U) /*!< CLKPS = LCDCLK/8 */ 143 #define LCD_PRESCALER_16 (0x01000000U) /*!< CLKPS = LCDCLK/16 */ 144 #define LCD_PRESCALER_32 (0x01400000U) /*!< CLKPS = LCDCLK/32 */ 145 #define LCD_PRESCALER_64 (0x01800000U) /*!< CLKPS = LCDCLK/64 */ 146 #define LCD_PRESCALER_128 (0x01C00000U) /*!< CLKPS = LCDCLK/128 */ 147 #define LCD_PRESCALER_256 (0x02000000U) /*!< CLKPS = LCDCLK/256 */ 148 #define LCD_PRESCALER_512 (0x02400000U) /*!< CLKPS = LCDCLK/512 */ 149 #define LCD_PRESCALER_1024 (0x02800000U) /*!< CLKPS = LCDCLK/1024 */ 150 #define LCD_PRESCALER_2048 (0x02C00000U) /*!< CLKPS = LCDCLK/2048 */ 151 #define LCD_PRESCALER_4096 (0x03000000U) /*!< CLKPS = LCDCLK/4096 */ 152 #define LCD_PRESCALER_8192 (0x03400000U) /*!< CLKPS = LCDCLK/8192 */ 153 #define LCD_PRESCALER_16384 (0x03800000U) /*!< CLKPS = LCDCLK/16384 */ 154 #define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */ 155 156 #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \ 157 ((__PRESCALER__) == LCD_PRESCALER_2) || \ 158 ((__PRESCALER__) == LCD_PRESCALER_4) || \ 159 ((__PRESCALER__) == LCD_PRESCALER_8) || \ 160 ((__PRESCALER__) == LCD_PRESCALER_16) || \ 161 ((__PRESCALER__) == LCD_PRESCALER_32) || \ 162 ((__PRESCALER__) == LCD_PRESCALER_64) || \ 163 ((__PRESCALER__) == LCD_PRESCALER_128) || \ 164 ((__PRESCALER__) == LCD_PRESCALER_256) || \ 165 ((__PRESCALER__) == LCD_PRESCALER_512) || \ 166 ((__PRESCALER__) == LCD_PRESCALER_1024) || \ 167 ((__PRESCALER__) == LCD_PRESCALER_2048) || \ 168 ((__PRESCALER__) == LCD_PRESCALER_4096) || \ 169 ((__PRESCALER__) == LCD_PRESCALER_8192) || \ 170 ((__PRESCALER__) == LCD_PRESCALER_16384) || \ 171 ((__PRESCALER__) == LCD_PRESCALER_32768)) 172 173 /** 174 * @} 175 */ 176 177 /** @defgroup LCD_Divider LCD Divider 178 * @{ 179 */ 180 181 #define LCD_DIVIDER_16 (0x00000000U) /*!< LCD frequency = CLKPS/16 */ 182 #define LCD_DIVIDER_17 (0x00040000U) /*!< LCD frequency = CLKPS/17 */ 183 #define LCD_DIVIDER_18 (0x00080000U) /*!< LCD frequency = CLKPS/18 */ 184 #define LCD_DIVIDER_19 (0x000C0000U) /*!< LCD frequency = CLKPS/19 */ 185 #define LCD_DIVIDER_20 (0x00100000U) /*!< LCD frequency = CLKPS/20 */ 186 #define LCD_DIVIDER_21 (0x00140000U) /*!< LCD frequency = CLKPS/21 */ 187 #define LCD_DIVIDER_22 (0x00180000U) /*!< LCD frequency = CLKPS/22 */ 188 #define LCD_DIVIDER_23 (0x001C0000U) /*!< LCD frequency = CLKPS/23 */ 189 #define LCD_DIVIDER_24 (0x00200000U) /*!< LCD frequency = CLKPS/24 */ 190 #define LCD_DIVIDER_25 (0x00240000U) /*!< LCD frequency = CLKPS/25 */ 191 #define LCD_DIVIDER_26 (0x00280000U) /*!< LCD frequency = CLKPS/26 */ 192 #define LCD_DIVIDER_27 (0x002C0000U) /*!< LCD frequency = CLKPS/27 */ 193 #define LCD_DIVIDER_28 (0x00300000U) /*!< LCD frequency = CLKPS/28 */ 194 #define LCD_DIVIDER_29 (0x00340000U) /*!< LCD frequency = CLKPS/29 */ 195 #define LCD_DIVIDER_30 (0x00380000U) /*!< LCD frequency = CLKPS/30 */ 196 #define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */ 197 198 #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \ 199 ((__DIVIDER__) == LCD_DIVIDER_17) || \ 200 ((__DIVIDER__) == LCD_DIVIDER_18) || \ 201 ((__DIVIDER__) == LCD_DIVIDER_19) || \ 202 ((__DIVIDER__) == LCD_DIVIDER_20) || \ 203 ((__DIVIDER__) == LCD_DIVIDER_21) || \ 204 ((__DIVIDER__) == LCD_DIVIDER_22) || \ 205 ((__DIVIDER__) == LCD_DIVIDER_23) || \ 206 ((__DIVIDER__) == LCD_DIVIDER_24) || \ 207 ((__DIVIDER__) == LCD_DIVIDER_25) || \ 208 ((__DIVIDER__) == LCD_DIVIDER_26) || \ 209 ((__DIVIDER__) == LCD_DIVIDER_27) || \ 210 ((__DIVIDER__) == LCD_DIVIDER_28) || \ 211 ((__DIVIDER__) == LCD_DIVIDER_29) || \ 212 ((__DIVIDER__) == LCD_DIVIDER_30) || \ 213 ((__DIVIDER__) == LCD_DIVIDER_31)) 214 215 /** 216 * @} 217 */ 218 219 220 /** @defgroup LCD_Duty LCD Duty 221 * @{ 222 */ 223 224 #define LCD_DUTY_STATIC (0x00000000U) /*!< Static duty */ 225 #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */ 226 #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */ 227 #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */ 228 #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */ 229 230 #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \ 231 ((__DUTY__) == LCD_DUTY_1_2) || \ 232 ((__DUTY__) == LCD_DUTY_1_3) || \ 233 ((__DUTY__) == LCD_DUTY_1_4) || \ 234 ((__DUTY__) == LCD_DUTY_1_8)) 235 236 /** 237 * @} 238 */ 239 240 241 /** @defgroup LCD_Bias LCD Bias 242 * @{ 243 */ 244 245 #define LCD_BIAS_1_4 (0x00000000U) /*!< 1/4 Bias */ 246 #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */ 247 #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */ 248 249 #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \ 250 ((__BIAS__) == LCD_BIAS_1_2) || \ 251 ((__BIAS__) == LCD_BIAS_1_3)) 252 /** 253 * @} 254 */ 255 256 /** @defgroup LCD_Voltage_Source LCD Voltage Source 257 * @{ 258 */ 259 260 #define LCD_VOLTAGESOURCE_INTERNAL (0x00000000U) /*!< Internal voltage source for the LCD */ 261 #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */ 262 263 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \ 264 ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL)) 265 266 /** 267 * @} 268 */ 269 270 /** @defgroup LCD_Interrupts LCD Interrupts 271 * @{ 272 */ 273 #define LCD_IT_SOF LCD_FCR_SOFIE 274 #define LCD_IT_UDD LCD_FCR_UDDIE 275 276 /** 277 * @} 278 */ 279 280 /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration 281 * @{ 282 */ 283 284 #define LCD_PULSEONDURATION_0 (0x00000000U) /*!< Pulse ON duration = 0 pulse */ 285 #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */ 286 #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */ 287 #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */ 288 #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */ 289 #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */ 290 #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */ 291 #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */ 292 293 #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \ 294 ((__DURATION__) == LCD_PULSEONDURATION_1) || \ 295 ((__DURATION__) == LCD_PULSEONDURATION_2) || \ 296 ((__DURATION__) == LCD_PULSEONDURATION_3) || \ 297 ((__DURATION__) == LCD_PULSEONDURATION_4) || \ 298 ((__DURATION__) == LCD_PULSEONDURATION_5) || \ 299 ((__DURATION__) == LCD_PULSEONDURATION_6) || \ 300 ((__DURATION__) == LCD_PULSEONDURATION_7)) 301 /** 302 * @} 303 */ 304 305 /** @defgroup LCD_HighDrive LCD HighDrive 306 * @{ 307 */ 308 309 #define LCD_HIGHDRIVE_0 (0x00000000U) /*!< Low resistance Drive */ 310 #define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /*!< High resistance Drive */ 311 312 #define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \ 313 ((__HIGHDRIVE__) == LCD_HIGHDRIVE_1)) 314 /** 315 * @} 316 */ 317 318 /** @defgroup LCD_DeadTime LCD Dead Time 319 * @{ 320 */ 321 322 #define LCD_DEADTIME_0 (0x00000000U) /*!< No dead Time */ 323 #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */ 324 #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */ 325 #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */ 326 #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */ 327 #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */ 328 #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */ 329 #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */ 330 331 #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \ 332 ((__TIME__) == LCD_DEADTIME_1) || \ 333 ((__TIME__) == LCD_DEADTIME_2) || \ 334 ((__TIME__) == LCD_DEADTIME_3) || \ 335 ((__TIME__) == LCD_DEADTIME_4) || \ 336 ((__TIME__) == LCD_DEADTIME_5) || \ 337 ((__TIME__) == LCD_DEADTIME_6) || \ 338 ((__TIME__) == LCD_DEADTIME_7)) 339 /** 340 * @} 341 */ 342 343 /** @defgroup LCD_BlinkMode LCD Blink Mode 344 * @{ 345 */ 346 347 #define LCD_BLINKMODE_OFF (0x00000000U) /*!< Blink disabled */ 348 #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */ 349 #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to 350 8 pixels according to the programmed duty) */ 351 #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */ 352 353 #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \ 354 ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \ 355 ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \ 356 ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM)) 357 /** 358 * @} 359 */ 360 361 /** @defgroup LCD_BlinkFrequency LCD Blink Frequency 362 * @{ 363 */ 364 365 #define LCD_BLINKFREQUENCY_DIV8 (0x00000000U) /*!< The Blink frequency = fLCD/8 */ 366 #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */ 367 #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */ 368 #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */ 369 #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */ 370 #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */ 371 #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */ 372 #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */ 373 374 #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \ 375 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \ 376 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \ 377 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \ 378 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \ 379 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \ 380 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \ 381 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024)) 382 /** 383 * @} 384 */ 385 386 /** @defgroup LCD_Contrast LCD Contrast 387 * @{ 388 */ 389 390 #define LCD_CONTRASTLEVEL_0 (0x00000000U) /*!< Maximum Voltage = 2.60V */ 391 #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */ 392 #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */ 393 #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */ 394 #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */ 395 #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */ 396 #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */ 397 #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */ 398 399 #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \ 400 ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \ 401 ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \ 402 ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \ 403 ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \ 404 ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \ 405 ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \ 406 ((__CONTRAST__) == LCD_CONTRASTLEVEL_7)) 407 /** 408 * @} 409 */ 410 411 /** @defgroup LCD_MuxSegment LCD Mux Segment 412 * @{ 413 */ 414 415 #define LCD_MUXSEGMENT_DISABLE (0x00000000U) /*!< SEG pin multiplexing disabled */ 416 #define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */ 417 418 #define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \ 419 ((__VALUE__) == LCD_MUXSEGMENT_DISABLE)) 420 /** 421 * @} 422 */ 423 424 /** @defgroup LCD_Flag LCD Flag 425 * @{ 426 */ 427 428 #define LCD_FLAG_ENS LCD_SR_ENS 429 #define LCD_FLAG_SOF LCD_SR_SOF 430 #define LCD_FLAG_UDR LCD_SR_UDR 431 #define LCD_FLAG_UDD LCD_SR_UDD 432 #define LCD_FLAG_RDY LCD_SR_RDY 433 #define LCD_FLAG_FCRSF LCD_SR_FCRSR 434 435 /** 436 * @} 437 */ 438 439 /** @defgroup LCD_RAMRegister LCD RAMRegister 440 * @{ 441 */ 442 443 #define LCD_RAM_REGISTER0 (0x00000000U) /*!< LCD RAM Register 0 */ 444 #define LCD_RAM_REGISTER1 (0x00000001U) /*!< LCD RAM Register 1 */ 445 #define LCD_RAM_REGISTER2 (0x00000002U) /*!< LCD RAM Register 2 */ 446 #define LCD_RAM_REGISTER3 (0x00000003U) /*!< LCD RAM Register 3 */ 447 #define LCD_RAM_REGISTER4 (0x00000004U) /*!< LCD RAM Register 4 */ 448 #define LCD_RAM_REGISTER5 (0x00000005U) /*!< LCD RAM Register 5 */ 449 #define LCD_RAM_REGISTER6 (0x00000006U) /*!< LCD RAM Register 6 */ 450 #define LCD_RAM_REGISTER7 (0x00000007U) /*!< LCD RAM Register 7 */ 451 #define LCD_RAM_REGISTER8 (0x00000008U) /*!< LCD RAM Register 8 */ 452 #define LCD_RAM_REGISTER9 (0x00000009U) /*!< LCD RAM Register 9 */ 453 #define LCD_RAM_REGISTER10 (0x0000000AU) /*!< LCD RAM Register 10 */ 454 #define LCD_RAM_REGISTER11 (0x0000000BU) /*!< LCD RAM Register 11 */ 455 #define LCD_RAM_REGISTER12 (0x0000000CU) /*!< LCD RAM Register 12 */ 456 #define LCD_RAM_REGISTER13 (0x0000000DU) /*!< LCD RAM Register 13 */ 457 #define LCD_RAM_REGISTER14 (0x0000000EU) /*!< LCD RAM Register 14 */ 458 #define LCD_RAM_REGISTER15 (0x0000000FU) /*!< LCD RAM Register 15 */ 459 460 #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \ 461 ((__REGISTER__) == LCD_RAM_REGISTER1) || \ 462 ((__REGISTER__) == LCD_RAM_REGISTER2) || \ 463 ((__REGISTER__) == LCD_RAM_REGISTER3) || \ 464 ((__REGISTER__) == LCD_RAM_REGISTER4) || \ 465 ((__REGISTER__) == LCD_RAM_REGISTER5) || \ 466 ((__REGISTER__) == LCD_RAM_REGISTER6) || \ 467 ((__REGISTER__) == LCD_RAM_REGISTER7) || \ 468 ((__REGISTER__) == LCD_RAM_REGISTER8) || \ 469 ((__REGISTER__) == LCD_RAM_REGISTER9) || \ 470 ((__REGISTER__) == LCD_RAM_REGISTER10) || \ 471 ((__REGISTER__) == LCD_RAM_REGISTER11) || \ 472 ((__REGISTER__) == LCD_RAM_REGISTER12) || \ 473 ((__REGISTER__) == LCD_RAM_REGISTER13) || \ 474 ((__REGISTER__) == LCD_RAM_REGISTER14) || \ 475 ((__REGISTER__) == LCD_RAM_REGISTER15)) 476 477 /** 478 * @} 479 */ 480 481 /** 482 * @} 483 */ 484 485 /* Exported macro ------------------------------------------------------------*/ 486 487 /** @defgroup LCD_Exported_Macros LCD Exported Macros 488 * @{ 489 */ 490 491 /** @brief Reset LCD handle state 492 * @param __HANDLE__ specifies the LCD Handle. 493 * @retval None 494 */ 495 #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET) 496 497 /** @brief macros to enables or disables the LCD 498 * @param __HANDLE__ specifies the LCD Handle. 499 * @retval None 500 */ 501 #define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) 502 #define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) 503 504 /** @brief Macros to enable or disable the low resistance divider. Displays with high 505 * internal resistance may need a longer drive time to achieve 506 * satisfactory contrast. This function is useful in this case if some 507 * additional power consumption can be tolerated. 508 * @param __HANDLE__ specifies the LCD Handle. 509 * @note When this mode is enabled, the PulseOn Duration (PON) have to be 510 * programmed to 1/CK_PS (LCD_PULSEONDURATION_1). 511 * @retval None 512 */ 513 #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \ 514 do{ \ 515 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \ 516 LCD_WaitForSynchro(__HANDLE__); \ 517 }while(0) 518 519 #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \ 520 do{ \ 521 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \ 522 LCD_WaitForSynchro(__HANDLE__); \ 523 }while(0) 524 525 /** 526 * @brief Macro to configure the LCD pulses on duration. 527 * @param __HANDLE__ specifies the LCD Handle. 528 * @param __DURATION__ specifies the LCD pulse on duration in terms of 529 * CK_PS (prescaled LCD clock period) pulses. 530 * This parameter can be one of the following values: 531 * @arg LCD_PULSEONDURATION_0: 0 pulse 532 * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS 533 * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS 534 * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS 535 * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS 536 * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS 537 * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS 538 * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS 539 * @retval None 540 */ 541 #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \ 542 do{ \ 543 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \ 544 LCD_WaitForSynchro(__HANDLE__); \ 545 }while(0) 546 547 /** 548 * @brief Macro to configure the LCD dead time. 549 * @param __HANDLE__ specifies the LCD Handle. 550 * @param __DEADTIME__ specifies the LCD dead time. 551 * This parameter can be one of the following values: 552 * @arg LCD_DEADTIME_0: No dead Time 553 * @arg LCD_DEADTIME_1: One Phase between different couple of Frame 554 * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame 555 * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame 556 * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame 557 * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame 558 * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame 559 * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame 560 * @retval None 561 */ 562 #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \ 563 do{ \ 564 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \ 565 LCD_WaitForSynchro(__HANDLE__); \ 566 }while(0) 567 568 /** 569 * @brief Macro to configure the LCD Contrast. 570 * @param __HANDLE__ specifies the LCD Handle. 571 * @param __CONTRAST__ specifies the LCD Contrast. 572 * This parameter can be one of the following values: 573 * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V 574 * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V 575 * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V 576 * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V 577 * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V 578 * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V 579 * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V 580 * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V 581 * @retval None 582 */ 583 #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \ 584 do{ \ 585 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \ 586 LCD_WaitForSynchro(__HANDLE__); \ 587 } while(0) 588 589 /** 590 * @brief Macro to configure the LCD Blink mode and Blink frequency. 591 * @param __HANDLE__ specifies the LCD Handle. 592 * @param __BLINKMODE__ specifies the LCD blink mode. 593 * This parameter can be one of the following values: 594 * @arg LCD_BLINKMODE_OFF: Blink disabled 595 * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel) 596 * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8 597 * pixels according to the programmed duty) 598 * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM 599 * (all pixels) 600 * @param __BLINKFREQUENCY__ specifies the LCD blink frequency. 601 * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8 602 * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16 603 * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32 604 * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64 605 * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128 606 * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256 607 * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512 608 * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024 609 * @retval None 610 */ 611 #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \ 612 do{ \ 613 MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \ 614 LCD_WaitForSynchro(__HANDLE__); \ 615 }while(0) 616 617 /** @brief Enables or disables the specified LCD interrupt. 618 * @param __HANDLE__ specifies the LCD Handle. 619 * @param __INTERRUPT__ specifies the LCD interrupt source to be enabled or disabled. 620 * This parameter can be one of the following values: 621 * @arg LCD_IT_SOF: Start of Frame Interrupt 622 * @arg LCD_IT_UDD: Update Display Done Interrupt 623 * @retval None 624 */ 625 #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ 626 do{ \ 627 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \ 628 LCD_WaitForSynchro(__HANDLE__); \ 629 }while(0) 630 #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ 631 do{ \ 632 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \ 633 LCD_WaitForSynchro(__HANDLE__); \ 634 }while(0) 635 636 /** @brief Checks whether the specified LCD interrupt is enabled or not. 637 * @param __HANDLE__ specifies the LCD Handle. 638 * @param __IT__ specifies the LCD interrupt source to check. 639 * This parameter can be one of the following values: 640 * @arg LCD_IT_SOF: Start of Frame Interrupt 641 * @arg LCD_IT_UDD: Update Display Done Interrupt. 642 * @note If the device is in STOP mode (PCLK not provided) UDD will not 643 * generate an interrupt even if UDDIE = 1. 644 * If the display is not enabled the UDD interrupt will never occur. 645 * @retval The state of __IT__ (TRUE or FALSE). 646 */ 647 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__)) 648 649 /** @brief Checks whether the specified LCD flag is set or not. 650 * @param __HANDLE__ specifies the LCD Handle. 651 * @param __FLAG__ specifies the flag to check. 652 * This parameter can be one of the following values: 653 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status. 654 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR 655 * goes from 0 to 1. On deactivation it reflects the real status of 656 * LCD so it becomes 0 at the end of the last displayed frame. 657 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at 658 * the beginning of a new frame, at the same time as the display data is 659 * updated. 660 * @arg LCD_FLAG_UDR: Update Display Request flag. 661 * @arg LCD_FLAG_UDD: Update Display Done flag. 662 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status 663 * of the step-up converter. 664 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag. 665 * This flag is set by hardware each time the LCD_FCR register is updated 666 * in the LCDCLK domain. 667 * @retval The new state of __FLAG__ (TRUE or FALSE). 668 */ 669 #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) 670 671 /** @brief Clears the specified LCD pending flag. 672 * @param __HANDLE__ specifies the LCD Handle. 673 * @param __FLAG__ specifies the flag to clear. 674 * This parameter can be any combination of the following values: 675 * @arg LCD_FLAG_SOF: Start of Frame Interrupt 676 * @arg LCD_FLAG_UDD: Update Display Done Interrupt 677 * @retval None 678 */ 679 #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__)) 680 681 /** 682 * @} 683 */ 684 685 /* Exported functions ------------------------------------------------------- */ 686 687 /** @addtogroup LCD_Exported_Functions 688 * @{ 689 */ 690 691 /** @addtogroup LCD_Exported_Functions_Group1 692 * @{ 693 */ 694 695 /* Initialization/de-initialization methods **********************************/ 696 HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd); 697 HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd); 698 void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd); 699 void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd); 700 701 /** 702 * @} 703 */ 704 705 /** @addtogroup LCD_Exported_Functions_Group2 706 * @{ 707 */ 708 709 /* IO operation methods *******************************************************/ 710 HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data); 711 HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd); 712 HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd); 713 714 /** 715 * @} 716 */ 717 718 /** @addtogroup LCD_Exported_Functions_Group3 719 * @{ 720 */ 721 722 /* Peripheral State methods **************************************************/ 723 HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd); 724 uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd); 725 726 /** 727 * @} 728 */ 729 730 /** 731 * @} 732 */ 733 734 /** @addtogroup LCD_Private_Functions 735 * @{ 736 */ 737 738 /* Private functions ---------------------------------------------------------*/ 739 HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd); 740 741 /** 742 * @} 743 */ 744 745 /** 746 * @} 747 */ 748 749 #endif /* STM32L100xB || STM32L100xBA || STM32L100xC ||... || STM32L162xD || STM32L162xE || STM32L162xDX */ 750 751 /** 752 * @} 753 */ 754 755 #ifdef __cplusplus 756 } 757 #endif 758 759 #endif /* __STM32L1xx_HAL_LCD_H */ 760 761 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 762