1 /** 2 ****************************************************************************** 3 * @file tae32f53xx_ll_sysctrl.h 4 * @author MCD Application Team 5 * @brief Header file for SYSCTRL LL module. 6 * 7 ****************************************************************************** 8 * @attention 9 * 10 * <h2><center>© Copyright (c) 2020 Tai-Action. 11 * All rights reserved.</center></h2> 12 * 13 * This software is licensed by Tai-Action under BSD 3-Clause license, 14 * the "License"; You may not use this file except in compliance with the 15 * License. You may obtain a copy of the License at: 16 * opensource.org/licenses/BSD-3-Clause 17 * 18 ****************************************************************************** 19 */ 20 21 /* Define to prevent recursive inclusion -------------------------------------*/ 22 #ifndef _TAE32F53XX_LL_SYSCTRL_H_ 23 #define _TAE32F53XX_LL_SYSCTRL_H_ 24 25 #ifdef __cplusplus 26 extern "C" { 27 #endif /* __cplusplus */ 28 29 /* Includes ------------------------------------------------------------------*/ 30 #include "tae32f53xx_ll_def.h" 31 32 33 /** @addtogroup TAE32F53xx_LL_Driver 34 * @{ 35 */ 36 37 /** @addtogroup SYSCTRL_LL 38 * @{ 39 */ 40 41 42 /* Exported constants --------------------------------------------------------*/ 43 /* Exported macro ------------------------------------------------------------*/ 44 /** @defgroup SYSCTRL_LL_Exported_Macros SYSCTRL LL Exported Macros 45 * @brief SYSCTRL LL Exported Macros 46 * @{ 47 */ 48 49 /** 50 * @brief PLL0 Enable 51 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 52 * @return None 53 */ 54 #define __LL_SYSCTRL_PLL0_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_EN_Msk) 55 56 /** 57 * @brief PLL0 Disable 58 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 59 * @return None 60 */ 61 #define __LL_SYSCTRL_PLL0_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_EN_Msk) 62 63 /** 64 * @brief Judge PLL0 has Locked or not 65 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 66 * @retval 0 PLL0 hasn't Locked 67 * @retval 1 PLL0 has Locked 68 */ 69 #define __LL_SYSCTRL_PLL0_IsLocked(__SYSCTRL__) \ 70 (READ_BIT((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_LOCKED_Msk) >> SYSCTRL_PLL0_LOCKED_Pos) 71 72 /** 73 * @brief PLL0 LPF Select 8M 74 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 75 * @return None 76 */ 77 #define __LL_SYSCTRL_PLL0_LPF_8M(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_LPF_Msk) 78 79 /** 80 * @brief PLL0 LPF Select 26M 81 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 82 * @return None 83 */ 84 #define __LL_SYSCTRL_PLL0_LPF_26M(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_LPF_Msk) 85 86 /** 87 * @brief PLL0 Band Set 88 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 89 * @param band PLL0 Band 90 * @return None 91 */ 92 #define __LL_SYSCTRL_PLL0_Band_Set(__SYSCTRL__, band) \ 93 MODIFY_REG((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_BAND_Msk, band) 94 95 /** 96 * @brief PLL0 GVCO Set 97 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 98 * @param vco PLL0 GVCO 99 * @return None 100 */ 101 #define __LL_SYSCTRL_PLL0_GVCO_Set(__SYSCTRL__, vco) \ 102 MODIFY_REG((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_GVCO_Msk, vco) 103 104 /** 105 * @brief PLL0 DIV Set 106 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 107 * @param div PLL0 Div 108 * @return None 109 */ 110 #define __LL_SYSCTRL_PLL0_DIV_Set(__SYSCTRL__, div) \ 111 MODIFY_REG((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_DIV_Msk, (((div-1) & 0xfUL) << SYSCTRL_PLL0_DIV_Pos)) 112 113 /** 114 * @brief PLL0 Pre Div Set to 2 115 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 116 * @return None 117 */ 118 #define __LL_SYSCTRL_PLL0_PreDiv_2(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_PREDIV_Msk) 119 120 /** 121 * @brief PLL0 Pre Div Set to 1 122 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 123 * @return None 124 */ 125 #define __LL_SYSCTRL_PLL0_PreDiv_1(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_PREDIV_Msk) 126 127 /** 128 * @brief PLL0 Ref CLK Set 129 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 130 * @param ref_clk PLL0 Ref CLK 131 * @return None 132 */ 133 #define __LL_SYSCTRL_PLL0_RefClk_Set(__SYSCTRL__, ref_clk) \ 134 MODIFY_REG((__SYSCTRL__)->PLL0CR, SYSCTRL_PLL0_REFCLK_Msk, ref_clk) 135 136 137 /** 138 * @brief PLL1 Enable 139 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 140 * @return None 141 */ 142 #define __LL_SYSCTRL_PLL1_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_EN_Msk) 143 144 /** 145 * @brief PLL1 Disable 146 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 147 * @return None 148 */ 149 #define __LL_SYSCTRL_PLL1_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_EN_Msk) 150 151 /** 152 * @brief Judge PLL1 has Locked or not 153 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 154 * @retval 0 PLL1 hasn't Locked 155 * @retval 1 PLL1 has Locked 156 */ 157 #define __LL_SYSCTRL_PLL1_IsLocked(__SYSCTRL__) \ 158 (READ_BIT((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_LOCKED_Msk) >> SYSCTRL_PLL1_LOCKED_Pos) 159 160 /** 161 * @brief PLL1 LPF Select 8M 162 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 163 * @return None 164 */ 165 #define __LL_SYSCTRL_PLL1_LPF_8M(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_LPF_Msk) 166 167 /** 168 * @brief PLL1 LPF Select 26M 169 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 170 * @return None 171 */ 172 #define __LL_SYSCTRL_PLL1_LPF_26M(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_LPF_Msk) 173 174 /** 175 * @brief PLL1 Band Set 176 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 177 * @param band PLL1 Band 178 * @return None 179 */ 180 #define __LL_SYSCTRL_PLL1_Band_Set(__SYSCTRL__, band) \ 181 MODIFY_REG((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_BAND_Msk, band) 182 183 /** 184 * @brief PLL1 GVCO Set 185 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 186 * @param vco PLL1 GVCO 187 * @return None 188 */ 189 #define __LL_SYSCTRL_PLL1_GVCO_Set(__SYSCTRL__, vco) \ 190 MODIFY_REG((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_GVCO_Msk, vco) 191 192 /** 193 * @brief PLL1 DIV Set 194 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 195 * @param div PLL1 Div 196 * @return None 197 */ 198 #define __LL_SYSCTRL_PLL1_DIV_Set(__SYSCTRL__, div) \ 199 MODIFY_REG((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_DIV_Msk, (((div-1) & 0xfUL) << SYSCTRL_PLL1_DIV_Pos)) 200 201 /** 202 * @brief PLL1 Pre Div Set to 2 203 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 204 * @return None 205 */ 206 #define __LL_SYSCTRL_PLL1_PreDiv_2(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_PREDIV_Msk) 207 208 /** 209 * @brief PLL1 Pre Div Set to None 210 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 211 * @return None 212 */ 213 #define __LL_SYSCTRL_PLL1_PreDiv_1(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_PREDIV_Msk) 214 215 /** 216 * @brief PLL1 Ref CLK Set 217 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 218 * @param ref_clk PLL1 Ref CLK 219 * @return None 220 */ 221 #define __LL_SYSCTRL_PLL1_RefClk_Set(__SYSCTRL__, ref_clk) \ 222 MODIFY_REG((__SYSCTRL__)->PLL1CR, SYSCTRL_PLL1_REFCLK_Msk, ref_clk) 223 224 225 /** 226 * @brief PLL2 Enable 227 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 228 * @return None 229 */ 230 #define __LL_SYSCTRL_PLL2_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_EN_Msk) 231 232 /** 233 * @brief PLL2 Disable 234 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 235 * @return None 236 */ 237 #define __LL_SYSCTRL_PLL2_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_EN_Msk) 238 239 /** 240 * @brief Judge PLL2 has Locked or not 241 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 242 * @retval 0 PLL2 hasn't Locked 243 * @retval 1 PLL2 has Locked 244 */ 245 #define __LL_SYSCTRL_PLL2_IsLocked(__SYSCTRL__) \ 246 (READ_BIT((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_LOCKED_Msk) >> SYSCTRL_PLL2_LOCKED_Pos) 247 248 /** 249 * @brief PLL2 LPF Select 8M 250 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 251 * @return None 252 */ 253 #define __LL_SYSCTRL_PLL2_LPF_8M(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_LPF_Msk) 254 255 /** 256 * @brief PLL2 LPF Select 26M 257 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 258 * @return None 259 */ 260 #define __LL_SYSCTRL_PLL2_LPF_26M(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_LPF_Msk) 261 262 /** 263 * @brief PLL2 Band Set 264 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 265 * @param band PLL2 Band 266 * @return None 267 */ 268 #define __LL_SYSCTRL_PLL2_Band_Set(__SYSCTRL__, band) \ 269 MODIFY_REG((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_BAND_Msk, band) 270 271 /** 272 * @brief PLL2 GVCO Set 273 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 274 * @param vco PLL2 GVCO 275 * @return None 276 */ 277 #define __LL_SYSCTRL_PLL2_GVCO_Set(__SYSCTRL__, vco) \ 278 MODIFY_REG((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_GVCO_Msk, vco) 279 280 /** 281 * @brief PLL2 DIV Set 282 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 283 * @param div PLL2 Div 284 * @return None 285 */ 286 #define __LL_SYSCTRL_PLL2_DIV_Set(__SYSCTRL__, div) \ 287 MODIFY_REG((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_DIV_Msk, (((div-1) & 0xfUL) << SYSCTRL_PLL2_DIV_Pos)) 288 289 /** 290 * @brief PLL2 Pre Div Set to 2 291 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 292 * @return None 293 */ 294 #define __LL_SYSCTRL_PLL2_PreDiv_2(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_PREDIV_Msk) 295 296 /** 297 * @brief PLL2 Pre Div Set to None 298 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 299 * @return None 300 */ 301 #define __LL_SYSCTRL_PLL2_PreDiv_1(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_PREDIV_Msk) 302 303 /** 304 * @brief PLL2 Ref CLK Set 305 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 306 * @param ref_clk PLL2 Ref CLK 307 * @return None 308 */ 309 #define __LL_SYSCTRL_PLL2_RefClk_Set(__SYSCTRL__, ref_clk) \ 310 MODIFY_REG((__SYSCTRL__)->PLL2CR, SYSCTRL_PLL2_REFCLK_Msk, ref_clk) 311 312 313 /** 314 * @brief SYSCLK Div Set 315 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 316 * @param div SYSCLK Div 317 * @return None 318 */ 319 #define __LL_SYSCTRL_SysClkDiv_Set(__SYSCTRL__, div) \ 320 MODIFY_REG((__SYSCTRL__)->SCLKCR, SYSCTRL_SYSCLK_DIV_Msk, (((div-1) & 0xffUL) << SYSCTRL_SYSCLK_DIV_Pos)) 321 322 /** 323 * @brief SYSCLK Source Set 324 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 325 * @param src SYSCLK Source 326 * @return None 327 */ 328 #define __LL_SYSCTRL_SysClkSrc_Set(__SYSCTRL__, src) \ 329 MODIFY_REG((__SYSCTRL__)->SCLKCR, SYSCTRL_SYSCLK_SRC_Msk, src) 330 331 332 /** 333 * @brief APB1 CLK Enable 334 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 335 * @return None 336 */ 337 #define __LL_SYSCTRL_APB1Clk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->BCLKCR, SYSCTRL_APB1CLK_EN_Msk) 338 339 /** 340 * @brief APB1 CLK Disable 341 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 342 * @return None 343 */ 344 #define __LL_SYSCTRL_APB1Clk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->BCLKCR, SYSCTRL_APB1CLK_EN_Msk) 345 346 /** 347 * @brief APB0 CLK Enable 348 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 349 * @return None 350 */ 351 #define __LL_SYSCTRL_APB0Clk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->BCLKCR, SYSCTRL_APB0CLK_EN_Msk) 352 353 /** 354 * @brief APB0 CLK Disable 355 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 356 * @return None 357 */ 358 #define __LL_SYSCTRL_APB0Clk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->BCLKCR, SYSCTRL_APB0CLK_EN_Msk) 359 360 /** 361 * @brief AHB CLK Enable 362 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 363 * @return None 364 */ 365 #define __LL_SYSCTRL_AHBClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->BCLKCR, SYSCTRL_AHBCLK_EN_Msk) 366 367 /** 368 * @brief AHB CLK Disable 369 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 370 * @return None 371 */ 372 #define __LL_SYSCTRL_AHBClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->BCLKCR, SYSCTRL_AHBCLK_EN_Msk) 373 374 /** 375 * @brief APB1 CLK Div SET 376 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 377 * @param div APB1 Div 378 * @return None 379 */ 380 #define __LL_SYSCTRL_APB1ClkDiv_Set(__SYSCTRL__, div) \ 381 MODIFY_REG((__SYSCTRL__)->BCLKCR, SYSCTRL_APB1CLK_DIV_Msk, (((div-1) & 0xffUL) << SYSCTRL_APB1CLK_DIV_Pos)) 382 383 /** 384 * @brief APB1 CLK Div GET 385 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 386 * @return APB1 Div 387 */ 388 #define __LL_SYSCTRL_APB1ClkDiv_Get(__SYSCTRL__) \ 389 ((READ_BIT((__SYSCTRL__)->BCLKCR, SYSCTRL_APB1CLK_DIV_Msk) >> SYSCTRL_APB1CLK_DIV_Pos) + 1) 390 391 /** 392 * @brief APB0 CLK Div SET 393 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 394 * @param div APB0 Div 395 * @return None 396 */ 397 #define __LL_SYSCTRL_APB0ClkDiv_Set(__SYSCTRL__, div) \ 398 MODIFY_REG((__SYSCTRL__)->BCLKCR, SYSCTRL_APB0CLK_DIV_Msk, (((div-1) & 0xffUL) << SYSCTRL_APB0CLK_DIV_Pos)) 399 400 /** 401 * @brief APB0 CLK Div GET 402 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 403 * @return APB0 Div 404 */ 405 #define __LL_SYSCTRL_APB0ClkDiv_Get(__SYSCTRL__) \ 406 ((READ_BIT((__SYSCTRL__)->BCLKCR, SYSCTRL_APB0CLK_DIV_Msk) >> SYSCTRL_APB0CLK_DIV_Pos) + 1) 407 408 409 /** 410 * @brief GPIOD Debounce CLK Source Set 411 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 412 * @param src GPIOD Debounce CLK Source 413 * @return None 414 */ 415 #define __LL_SYSCTRL_GPIODDbcSrc_Set(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->FSRCCR, SYSCTRL_GPIOD_DBCCLK_SRC_Msk, src) 416 417 /** 418 * @brief GPIOC Debounce CLK Source Set 419 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 420 * @param src GPIOC Debounce CLK Source 421 * @return None 422 */ 423 #define __LL_SYSCTRL_GPIOCDbcSrc_Set(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->FSRCCR, SYSCTRL_GPIOC_DBCCLK_SRC_Msk, src) 424 425 /** 426 * @brief GPIOB Debounce CLK Source Set 427 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 428 * @param src GPIOB Debounce CLK Source 429 * @return None 430 */ 431 #define __LL_SYSCTRL_GPIOBDbcSrc_Set(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->FSRCCR, SYSCTRL_GPIOB_DBCCLK_SRC_Msk, src) 432 433 /** 434 * @brief GPIOA Debounce CLK Source Set 435 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 436 * @param src GPIOA Debounce CLK Source 437 * @return None 438 */ 439 #define __LL_SYSCTRL_GPIOADbcSrc_Set(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->FSRCCR, SYSCTRL_GPIOA_DBCCLK_SRC_Msk, src) 440 441 /** 442 * @brief DFLASH Memory CLK Source Set 443 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 444 * @param src DFLASH Memory CLK Source 445 * @return None 446 */ 447 #define __LL_SYSCTRL_DFLASHMemClkSrc_Set(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->FSRCCR, SYSCTRL_DFLASH_MEMCLK_SRC_Msk, src) 448 449 /** 450 * @brief EFLASH Memory CLK Source Set 451 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 452 * @param src EFLASH Memory CLK Source 453 * @return None 454 */ 455 #define __LL_SYSCTRL_EFLASHMemClkSrc_Set(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->FSRCCR, SYSCTRL_EFLASH_MEMCLK_SRC_Msk, src) 456 457 /** 458 * @brief ADC Function CLK Source Set 459 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 460 * @param src ADC Function CLK Source 461 * @return None 462 */ 463 #define __LL_SYSCTRL_ADCFunClkSrc_Set(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->FSRCCR, SYSCTRL_ADC_FUNCLK_SRC_Msk, src) 464 465 /** 466 * @brief HRPWM Function CLK Source Set 467 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 468 * @param src HRPWM Function CLK Source 469 * @return None 470 */ 471 #define __LL_SYSCTRL_HRPWMFunClkSrc_Set(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->FSRCCR, SYSCTRL_HRPWM_FUNCLK_SRC_Msk, src) 472 473 474 /** 475 * @brief DFLASH Memory Clk Div Set 476 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 477 * @param div DFLASH Memory Clk Div 478 * @return None 479 */ 480 #define __LL_SYSCTRL_DFLASHMemClkDiv_Set(__SYSCTRL__, div) \ 481 MODIFY_REG((__SYSCTRL__)->FCD0CR, SYSCTRL_DFLASH_MEMCLK_DIV_Msk, (((div-1) & 0xfUL) << SYSCTRL_DFLASH_MEMCLK_DIV_Pos)) 482 483 /** 484 * @brief EFLASH Memory Clk Div Set 485 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 486 * @param div EFLASH Memory Clk Div 487 * @return None 488 */ 489 #define __LL_SYSCTRL_EFLASHMemClkDiv_Set(__SYSCTRL__, div) \ 490 MODIFY_REG((__SYSCTRL__)->FCD0CR, SYSCTRL_EFLASH_MEMCLK_DIV_Msk, (((div-1) & 0xfUL) << SYSCTRL_EFLASH_MEMCLK_DIV_Pos)) 491 492 /** 493 * @brief ADC Function Clk Div Set 494 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 495 * @param div ADC Function Clk Div 496 * @return None 497 */ 498 #define __LL_SYSCTRL_ADCFunClkDiv_Set(__SYSCTRL__, div) \ 499 MODIFY_REG((__SYSCTRL__)->FCD0CR, SYSCTRL_ADC_FUNCLK_DIV_Msk, (((div-1) & 0x3UL) << SYSCTRL_ADC_FUNCLK_DIV_Pos)) 500 501 /** 502 * @brief HRPWM Function Clk Div Set 503 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 504 * @param div HRPWM Function Clk Div 505 * @return None 506 */ 507 #define __LL_SYSCTRL_HRPWMFunClkDiv_Set(__SYSCTRL__, div) \ 508 MODIFY_REG((__SYSCTRL__)->FCD0CR, SYSCTRL_HRPWM_FUNCLK_DIV_Msk, (((div-1) & 0x3UL) << SYSCTRL_HRPWM_FUNCLK_DIV_Pos)) 509 510 511 /** 512 * @brief GPIOD Debounce CLK Div Set 513 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 514 * @param div GPIOD Debounce CLK Div 515 * @return None 516 */ 517 #define __LL_SYSCTRL_GPIODDbcClkDiv_Set(__SYSCTRL__, div) \ 518 MODIFY_REG((__SYSCTRL__)->FCD1CR, SYSCTRL_GPIOD_DBCCLK_DIV_Msk, (((div-1) & 0xffUL) << SYSCTRL_GPIOD_DBCCLK_DIV_Pos)) 519 /** 520 * @brief GPIOC Debounce CLK Div Set 521 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 522 * @param div GPIOC Debounce CLK Div 523 * @return None 524 */ 525 #define __LL_SYSCTRL_GPIOCDbcClkDiv_Set(__SYSCTRL__, div) \ 526 MODIFY_REG((__SYSCTRL__)->FCD1CR, SYSCTRL_GPIOC_DBCCLK_DIV_Msk, (((div-1) & 0xffUL) << SYSCTRL_GPIOC_DBCCLK_DIV_Pos)) 527 528 /** 529 * @brief GPIOB Debounce CLK Div Set 530 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 531 * @param div GPIOB Debounce CLK Div 532 * @return None 533 */ 534 #define __LL_SYSCTRL_GPIOBDbcClkDiv_Set(__SYSCTRL__, div) \ 535 MODIFY_REG((__SYSCTRL__)->FCD1CR, SYSCTRL_GPIOB_DBCCLK_DIV_Msk, (((div-1) & 0xffUL) << SYSCTRL_GPIOB_DBCCLK_DIV_Pos)) 536 537 /** 538 * @brief GPIOA Debounce CLK Div Set 539 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 540 * @param div GPIOA Debounce CLK Div 541 * @return None 542 */ 543 #define __LL_SYSCTRL_GPIOADbcClkDiv_Set(__SYSCTRL__, div) \ 544 MODIFY_REG((__SYSCTRL__)->FCD1CR, SYSCTRL_GPIOA_DBCCLK_DIV_Msk, (((div-1) & 0xffUL) << SYSCTRL_GPIOA_DBCCLK_DIV_Pos)) 545 546 547 /** 548 * @brief LSTIMER Bus CLK Enable 549 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 550 * @return None 551 */ 552 #define __LL_SYSCTRL_LSTIMERBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB0CCR, SYSCTRL_LSTIMER_BUSCLK_EN_Msk) 553 554 /** 555 * @brief LSTIMER Bus CLK Disable 556 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 557 * @return None 558 */ 559 #define __LL_SYSCTRL_LSTIMERBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB0CCR, SYSCTRL_LSTIMER_BUSCLK_EN_Msk) 560 561 /** 562 * @brief UART1 Bus CLK Enable 563 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 564 * @return None 565 */ 566 #define __LL_SYSCTRL_UART1BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB0CCR, SYSCTRL_UART1_BUSCLK_EN_Msk) 567 568 /** 569 * @brief UART1 Bus CLK Disable 570 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 571 * @return None 572 */ 573 #define __LL_SYSCTRL_UART1BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB0CCR, SYSCTRL_UART1_BUSCLK_EN_Msk) 574 575 /** 576 * @brief UART0 Bus CLK Enable 577 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 578 * @return None 579 */ 580 #define __LL_SYSCTRL_UART0BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB0CCR, SYSCTRL_UART0_BUSCLK_EN_Msk) 581 582 /** 583 * @brief UART0 Bus CLK Disable 584 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 585 * @return None 586 */ 587 #define __LL_SYSCTRL_UART0BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB0CCR, SYSCTRL_UART0_BUSCLK_EN_Msk) 588 589 /** 590 * @brief I2C1 Bus CLK Enable 591 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 592 * @return None 593 */ 594 #define __LL_SYSCTRL_I2C1BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB0CCR, SYSCTRL_I2C1_BUSCLK_EN_Msk) 595 596 /** 597 * @brief I2C1 Bus CLK Disable 598 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 599 * @return None 600 */ 601 #define __LL_SYSCTRL_I2C1BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB0CCR, SYSCTRL_I2C1_BUSCLK_EN_Msk) 602 603 /** 604 * @brief I2C0 Bus CLK Enable 605 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 606 * @return None 607 */ 608 #define __LL_SYSCTRL_I2C0BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB0CCR, SYSCTRL_I2C0_BUSCLK_EN_Msk) 609 610 /** 611 * @brief I2C0 Bus CLK Disable 612 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 613 * @return None 614 */ 615 #define __LL_SYSCTRL_I2C0BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB0CCR, SYSCTRL_I2C0_BUSCLK_EN_Msk) 616 617 618 /** 619 * @brief ECU Bus CLK Enable 620 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 621 * @return None 622 */ 623 #define __LL_SYSCTRL_ECUBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_ECU_BUSCLK_EN_Msk) 624 625 /** 626 * @brief ECU Bus CLK Disable 627 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 628 * @return None 629 */ 630 #define __LL_SYSCTRL_ECUBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_ECU_BUSCLK_EN_Msk) 631 632 /** 633 * @brief IIR4 Bus CLK Enable 634 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 635 * @return None 636 */ 637 #define __LL_SYSCTRL_IIR4BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_IIR4_BUSCLK_EN_Msk) 638 639 /** 640 * @brief IIR4 Bus CLK Disable 641 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 642 * @return None 643 */ 644 #define __LL_SYSCTRL_IIR4BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_IIR4_BUSCLK_EN_Msk) 645 646 /** 647 * @brief IIR3 Bus CLK Enable 648 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 649 * @return None 650 */ 651 #define __LL_SYSCTRL_IIR3BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_IIR3_BUSCLK_EN_Msk) 652 653 /** 654 * @brief IIR3 Bus CLK Disable 655 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 656 * @return None 657 */ 658 #define __LL_SYSCTRL_IIR3BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_IIR3_BUSCLK_EN_Msk) 659 660 /** 661 * @brief IIR2 Bus CLK Enable 662 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 663 * @return None 664 */ 665 #define __LL_SYSCTRL_IIR2BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_IIR2_BUSCLK_EN_Msk) 666 667 /** 668 * @brief IIR2 Bus CLK Disable 669 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 670 * @return None 671 */ 672 #define __LL_SYSCTRL_IIR2BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_IIR2_BUSCLK_EN_Msk) 673 674 /** 675 * @brief IIR1 Bus CLK Enable 676 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 677 * @return None 678 */ 679 #define __LL_SYSCTRL_IIR1BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_IIR1_BUSCLK_EN_Msk) 680 681 /** 682 * @brief IIR1 Bus CLK Disable 683 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 684 * @return None 685 */ 686 #define __LL_SYSCTRL_IIR1BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_IIR1_BUSCLK_EN_Msk) 687 688 /** 689 * @brief IIR0 Bus CLK Enable 690 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 691 * @return None 692 */ 693 #define __LL_SYSCTRL_IIR0BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_IIR0_BUSCLK_EN_Msk) 694 695 /** 696 * @brief IIR0 Bus CLK Disable 697 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 698 * @return None 699 */ 700 #define __LL_SYSCTRL_IIR0BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_IIR0_BUSCLK_EN_Msk) 701 702 /** 703 * @brief DALI Bus CLK Enable 704 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 705 * @return None 706 */ 707 #define __LL_SYSCTRL_DALIBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_DALI_BUSCLK_EN_Msk) 708 709 /** 710 * @brief DALI Bus CLK Disable 711 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 712 * @return None 713 */ 714 #define __LL_SYSCTRL_DALIBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1CCR, SYSCTRL_DALI_BUSCLK_EN_Msk) 715 716 717 718 /** 719 * @brief RAM2 Bus Clk Enable 720 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 721 * @return None 722 */ 723 #define __LL_SYSCTRL_RAM2BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_RAM2_BUSCLK_EN_Msk) 724 725 /** 726 * @brief RAM2 Bus Clk Disable 727 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 728 * @return None 729 */ 730 #define __LL_SYSCTRL_RAM2BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_RAM2_BUSCLK_EN_Msk) 731 732 /** 733 * @brief RAM1 Bus Clk Enable 734 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 735 * @return None 736 */ 737 #define __LL_SYSCTRL_RAM1BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_RAM1_BUSCLK_EN_Msk) 738 739 /** 740 * @brief RAM1 Bus Clk Disable 741 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 742 * @return None 743 */ 744 #define __LL_SYSCTRL_RAM1BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_RAM1_BUSCLK_EN_Msk) 745 746 /** 747 * @brief RAM0 Bus Clk Enable 748 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 749 * @return None 750 */ 751 #define __LL_SYSCTRL_RAM0BusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_RAM0_BUSCLK_EN_Msk) 752 753 /** 754 * @brief RAM0 Bus Clk Disable 755 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 756 * @return None 757 */ 758 #define __LL_SYSCTRL_RAM0BusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_RAM0_BUSCLK_EN_Msk) 759 760 /** 761 * @brief USB Bus CLK Enable 762 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 763 * @return None 764 */ 765 #define __LL_SYSCTRL_USBBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_USB_BUSCLK_EN_Msk) 766 767 /** 768 * @brief USB Bus CLK Disable 769 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 770 * @return None 771 */ 772 #define __LL_SYSCTRL_USBBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_USB_BUSCLK_EN_Msk) 773 774 /** 775 * @brief DFLASH Bus CLK Enable 776 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 777 * @return None 778 */ 779 #define __LL_SYSCTRL_DFLASHBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_DFLASH_BUSCLK_EN_Msk) 780 781 /** 782 * @brief DFLASH Bus CLK Disable 783 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 784 * @return None 785 */ 786 #define __LL_SYSCTRL_DFLASHBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_DFLASH_BUSCLK_EN_Msk) 787 788 /** 789 * @brief EFLASH Bus CLK Enable 790 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 791 * @return None 792 */ 793 #define __LL_SYSCTRL_EFLASHBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_EFLASH_BUSCLK_EN_Msk) 794 795 /** 796 * @brief EFLASH Bus CLK Disable 797 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 798 * @return None 799 */ 800 #define __LL_SYSCTRL_EFLASHBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_EFLASH_BUSCLK_EN_Msk) 801 802 /** 803 * @brief HRPWM Bus CLK Enable 804 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 805 * @return None 806 */ 807 #define __LL_SYSCTRL_HRPWMBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_HRPWM_BUSCLK_EN_Msk) 808 809 /** 810 * @brief HRPWM Bus CLK Disable 811 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 812 * @return None 813 */ 814 #define __LL_SYSCTRL_HRPWMBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_HRPWM_BUSCLK_EN_Msk) 815 816 /** 817 * @brief ADC Bus CLK Enable 818 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 819 * @return None 820 */ 821 #define __LL_SYSCTRL_ADCBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_ADC_BUSCLK_EN_Msk) 822 823 /** 824 * @brief ADC Bus CLK Disable 825 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 826 * @return None 827 */ 828 #define __LL_SYSCTRL_ADCBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_ADC_BUSCLK_EN_Msk) 829 830 /** 831 * @brief DAC Bus CLK Enable 832 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 833 * @return None 834 */ 835 #define __LL_SYSCTRL_DACBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_DAC_BUSCLK_EN_Msk) 836 837 /** 838 * @brief DAC Bus CLK Disable 839 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 840 * @return None 841 */ 842 #define __LL_SYSCTRL_DACBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_DAC_BUSCLK_EN_Msk) 843 844 /** 845 * @brief CMP Bus CLK Enable 846 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 847 * @return None 848 */ 849 #define __LL_SYSCTRL_CMPBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_CMP_BUSCLK_EN_Msk) 850 851 /** 852 * @brief CMP Bus CLK Disable 853 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 854 * @return None 855 */ 856 #define __LL_SYSCTRL_CMPBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_CMP_BUSCLK_EN_Msk) 857 858 /** 859 * @brief GPIOD Bus CLK Enable 860 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 861 * @return None 862 */ 863 #define __LL_SYSCTRL_GPIODBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_GPIOD_BUSCLK_EN_Msk) 864 865 /** 866 * @brief GPIOD Bus CLK Disable 867 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 868 * @return None 869 */ 870 #define __LL_SYSCTRL_GPIODBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_GPIOD_BUSCLK_EN_Msk) 871 872 /** 873 * @brief GPIOC Bus CLK Enable 874 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 875 * @return None 876 */ 877 #define __LL_SYSCTRL_GPIOCBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_GPIOC_BUSCLK_EN_Msk) 878 879 /** 880 * @brief GPIOC Bus CLK Disable 881 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 882 * @return None 883 */ 884 #define __LL_SYSCTRL_GPIOCBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_GPIOC_BUSCLK_EN_Msk) 885 886 /** 887 * @brief GPIOB Bus CLK Enable 888 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 889 * @return None 890 */ 891 #define __LL_SYSCTRL_GPIOBBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_GPIOB_BUSCLK_EN_Msk) 892 893 /** 894 * @brief GPIOB Bus CLK Disable 895 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 896 * @return None 897 */ 898 #define __LL_SYSCTRL_GPIOBBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_GPIOB_BUSCLK_EN_Msk) 899 900 /** 901 * @brief GPIOA Bus CLK Enable 902 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 903 * @return None 904 */ 905 #define __LL_SYSCTRL_GPIOABusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_GPIOA_BUSCLK_EN_Msk) 906 907 /** 908 * @brief GPIOA Bus CLK Disable 909 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 910 * @return None 911 */ 912 #define __LL_SYSCTRL_GPIOABusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_GPIOA_BUSCLK_EN_Msk) 913 914 /** 915 * @brief HSTIMER Bus CLK Enable 916 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 917 * @return None 918 */ 919 #define __LL_SYSCTRL_HSTIMERBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_HSTIMER_BUSCLK_EN_Msk) 920 921 /** 922 * @brief HSTIMER Bus CLK Disable 923 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 924 * @return None 925 */ 926 #define __LL_SYSCTRL_HSTIMERBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_HSTIMER_BUSCLK_EN_Msk) 927 928 /** 929 * @brief CAN Bus CLK Enable 930 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 931 * @return None 932 */ 933 #define __LL_SYSCTRL_CANBusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_CAN_BUSCLK_EN_Msk) 934 935 /** 936 * @brief CAN Bus CLK Disable 937 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 938 * @return None 939 */ 940 #define __LL_SYSCTRL_CANBusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_CAN_BUSCLK_EN_Msk) 941 942 /** 943 * @brief DMA Bus CLK Enable 944 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 945 * @return None 946 */ 947 #define __LL_SYSCTRL_DMABusClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_DMA_BUSCLK_EN_Msk) 948 949 /** 950 * @brief DMA Bus CLK Disable 951 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 952 * @return None 953 */ 954 #define __LL_SYSCTRL_DMABusClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBCCR, SYSCTRL_DMA_BUSCLK_EN_Msk) 955 956 957 /** 958 * @brief HRPWM Function Clk Enable 959 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 960 * @return None 961 */ 962 #define __LL_SYSCTRL_HRPWMFunClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_HRPWM_FUNCLK_EN_Msk) 963 964 /** 965 * @brief HRPWM Function Clk Disable 966 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 967 * @return None 968 */ 969 #define __LL_SYSCTRL_HRPWMFunClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_HRPWM_FUNCLK_EN_Msk) 970 971 /** 972 * @brief ADC Function Clk Enable 973 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 974 * @return None 975 */ 976 #define __LL_SYSCTRL_ADCFunClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_ADC_FUNCLK_EN_Msk) 977 978 /** 979 * @brief ADC Function Clk Disable 980 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 981 * @return None 982 */ 983 #define __LL_SYSCTRL_ADCFunClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_ADC_FUNCLK_EN_Msk) 984 985 /** 986 * @brief CAN Function Clk Enable 987 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 988 * @return None 989 */ 990 #define __LL_SYSCTRL_CANFunClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_CAN_FUNCLK_EN_Msk) 991 992 /** 993 * @brief CAN Function Clk Disable 994 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 995 * @return None 996 */ 997 #define __LL_SYSCTRL_CANFunClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_CAN_FUNCLK_EN_Msk) 998 999 /** 1000 * @brief ECU Function Clk Enable 1001 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1002 * @return None 1003 */ 1004 #define __LL_SYSCTRL_ECUFunClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_ECU_FUNCLK_EN_Msk) 1005 1006 /** 1007 * @brief ECU Function Clk Disable 1008 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1009 * @return None 1010 */ 1011 #define __LL_SYSCTRL_ECUFunClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_ECU_FUNCLK_EN_Msk) 1012 1013 /** 1014 * @brief IIR4 Function Clk Enable 1015 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1016 * @return None 1017 */ 1018 #define __LL_SYSCTRL_IIR4FunClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_IIR4_FUNCLK_EN_Msk) 1019 1020 /** 1021 * @brief IIR4 Function Clk Disable 1022 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1023 * @return None 1024 */ 1025 #define __LL_SYSCTRL_IIR4FunClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_IIR4_FUNCLK_EN_Msk) 1026 1027 /** 1028 * @brief IIR3 Function Clk Enable 1029 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1030 * @return None 1031 */ 1032 #define __LL_SYSCTRL_IIR3FunClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_IIR3_FUNCLK_EN_Msk) 1033 1034 /** 1035 * @brief IIR3 Function Clk Disable 1036 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1037 * @return None 1038 */ 1039 #define __LL_SYSCTRL_IIR3FunClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_IIR3_FUNCLK_EN_Msk) 1040 1041 /** 1042 * @brief IIR2 Function Clk Enable 1043 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1044 * @return None 1045 */ 1046 #define __LL_SYSCTRL_IIR2FunClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_IIR2_FUNCLK_EN_Msk) 1047 1048 /** 1049 * @brief IIR2 Function Clk Disable 1050 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1051 * @return None 1052 */ 1053 #define __LL_SYSCTRL_IIR2FunClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_IIR2_FUNCLK_EN_Msk) 1054 1055 /** 1056 * @brief IIR1 Function Clk Enable 1057 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1058 * @return None 1059 */ 1060 #define __LL_SYSCTRL_IIR1FunClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_IIR1_FUNCLK_EN_Msk) 1061 1062 /** 1063 * @brief IIR1 Function Clk Disable 1064 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1065 * @return None 1066 */ 1067 #define __LL_SYSCTRL_IIR1FunClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_IIR1_FUNCLK_EN_Msk) 1068 1069 /** 1070 * @brief IIR0 Function Clk Enable 1071 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1072 * @return None 1073 */ 1074 #define __LL_SYSCTRL_IIR0FunClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_IIR0_FUNCLK_EN_Msk) 1075 1076 /** 1077 * @brief IIR0 Function Clk Disable 1078 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1079 * @return None 1080 */ 1081 #define __LL_SYSCTRL_IIR0FunClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_IIR0_FUNCLK_EN_Msk) 1082 1083 /** 1084 * @brief USB Function Clk Enable 1085 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1086 * @return None 1087 */ 1088 #define __LL_SYSCTRL_USBFunClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_USB_FUNCLK_EN_Msk) 1089 1090 /** 1091 * @brief USB Function Clk Disable 1092 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1093 * @return None 1094 */ 1095 #define __LL_SYSCTRL_USBFunClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_USB_FUNCLK_EN_Msk) 1096 1097 /** 1098 * @brief DFLASH Memory Clk Enable 1099 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1100 * @return None 1101 */ 1102 #define __LL_SYSCTRL_DFLASHMemClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_DFLASH_MEMCLK_EN_Msk) 1103 1104 /** 1105 * @brief DFLASH Memory Clk Disable 1106 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1107 * @return None 1108 */ 1109 #define __LL_SYSCTRL_DFLASHMemClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_DFLASH_MEMCLK_EN_Msk) 1110 1111 /** 1112 * @brief EFLASH Memory Clk Enable 1113 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1114 * @return None 1115 */ 1116 #define __LL_SYSCTRL_EFLASHMemClk_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_EFLASH_MEMCLK_EN_Msk) 1117 1118 /** 1119 * @brief EFLASH Memory Clk Disable 1120 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1121 * @return None 1122 */ 1123 #define __LL_SYSCTRL_EFLASHMemClk_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->FUNCCR, SYSCTRL_EFLASH_MEMCLK_EN_Msk) 1124 1125 1126 /** 1127 * @brief GPIOD Debounce Soft Reset Assert 1128 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1129 * @return None 1130 */ 1131 #define __LL_SYSCTRL_GPIODDbcSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_GPIOD_DBC_SOFTRST_Msk) 1132 1133 /** 1134 * @brief GPIOD Debounce Soft Reset Release 1135 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1136 * @return None 1137 */ 1138 #define __LL_SYSCTRL_GPIODDbcSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_GPIOD_DBC_SOFTRST_Msk) 1139 1140 /** 1141 * @brief GPIOC Debounce Soft Reset Assert 1142 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1143 * @return None 1144 */ 1145 #define __LL_SYSCTRL_GPIOCDbcSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_GPIOC_DBC_SOFTRST_Msk) 1146 1147 /** 1148 * @brief GPIOC Debounce Soft Reset Release 1149 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1150 * @return None 1151 */ 1152 #define __LL_SYSCTRL_GPIOCDbcSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_GPIOC_DBC_SOFTRST_Msk) 1153 1154 /** 1155 * @brief GPIOB Debounce Soft Reset Assert 1156 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1157 * @return None 1158 */ 1159 #define __LL_SYSCTRL_GPIOBDbcSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_GPIOB_DBC_SOFTRST_Msk) 1160 1161 /** 1162 * @brief GPIOB Debounce Soft Reset Release 1163 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1164 * @return None 1165 */ 1166 #define __LL_SYSCTRL_GPIOBDbcSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_GPIOB_DBC_SOFTRST_Msk) 1167 1168 /** 1169 * @brief GPIOA Debounce Soft Reset Assert 1170 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1171 * @return None 1172 */ 1173 #define __LL_SYSCTRL_GPIOADbcSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_GPIOA_DBC_SOFTRST_Msk) 1174 1175 /** 1176 * @brief GPIOA Debounce Soft Reset Release 1177 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1178 * @return None 1179 */ 1180 #define __LL_SYSCTRL_GPIOADbcSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_GPIOA_DBC_SOFTRST_Msk) 1181 1182 /** 1183 * @brief APB1 Bus Soft Reset Assert 1184 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1185 * @return None 1186 */ 1187 #define __LL_SYSCTRL_APB1BusSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_APB1BUS_SOFTRST_Msk) 1188 1189 /** 1190 * @brief APB1 Bus Soft Reset Release 1191 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1192 * @return None 1193 */ 1194 #define __LL_SYSCTRL_APB1BusSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_APB1BUS_SOFTRST_Msk) 1195 1196 /** 1197 * @brief APB0 Bus Soft Reset Assert 1198 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1199 * @return None 1200 */ 1201 #define __LL_SYSCTRL_APB0BusSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_APB0BUS_SOFTRST_Msk) 1202 1203 /** 1204 * @brief APB0 Bus Soft Reset Release 1205 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1206 * @return None 1207 */ 1208 #define __LL_SYSCTRL_APB0BusSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_APB0BUS_SOFTRST_Msk) 1209 1210 /** 1211 * @brief AHB Bus Soft Reset Assert 1212 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1213 * @return None 1214 */ 1215 #define __LL_SYSCTRL_AHBBusSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_AHBBUS_SOFTRST_Msk) 1216 1217 /** 1218 * @brief AHB Bus Soft Reset Release 1219 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1220 * @return None 1221 */ 1222 #define __LL_SYSCTRL_AHBBusSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSRCR, SYSCTRL_AHBBUS_SOFTRST_Msk) 1223 1224 /** 1225 * @brief System Soft Reset all Assert 1226 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1227 * @return None 1228 */ 1229 #define __LL_SYSCTRL_SysSoftRstAll_Assert(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->SYSRCR, 0x0) 1230 1231 /** 1232 * @brief System Soft Reset all Release 1233 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1234 * @return None 1235 */ 1236 #define __LL_SYSCTRL_SysSoftRstAll_Release(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->SYSRCR, 0xffffffffUL) 1237 1238 1239 /** 1240 * @brief LSTIMER Soft Reset Assert 1241 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1242 * @return None 1243 */ 1244 #define __LL_SYSCTRL_LSTIMERSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB0RCR, SYSCTRL_LSTIMER_SOFTRST_Msk) 1245 1246 /** 1247 * @brief LSTIMER Soft Reset Release 1248 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1249 * @return None 1250 */ 1251 #define __LL_SYSCTRL_LSTIMERSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB0RCR, SYSCTRL_LSTIMER_SOFTRST_Msk) 1252 1253 /** 1254 * @brief UART1 Soft Reset Assert 1255 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1256 * @return None 1257 */ 1258 #define __LL_SYSCTRL_UART1SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB0RCR, SYSCTRL_UART1_SOFTRST_Msk) 1259 1260 /** 1261 * @brief UART1 Soft Reset Release 1262 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1263 * @return None 1264 */ 1265 #define __LL_SYSCTRL_UART1SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB0RCR, SYSCTRL_UART1_SOFTRST_Msk) 1266 1267 /** 1268 * @brief UART0 Soft Reset Assert 1269 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1270 * @return None 1271 */ 1272 #define __LL_SYSCTRL_UART0SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB0RCR, SYSCTRL_UART0_SOFTRST_Msk) 1273 1274 /** 1275 * @brief UART0 Soft Reset Release 1276 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1277 * @return None 1278 */ 1279 #define __LL_SYSCTRL_UART0SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB0RCR, SYSCTRL_UART0_SOFTRST_Msk) 1280 1281 /** 1282 * @brief I2C1 Soft Reset Assert 1283 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1284 * @return None 1285 */ 1286 #define __LL_SYSCTRL_I2C1SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB0RCR, SYSCTRL_I2C1_SOFTRST_Msk) 1287 1288 /** 1289 * @brief I2C1 Soft Reset Release 1290 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1291 * @return None 1292 */ 1293 #define __LL_SYSCTRL_I2C1SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB0RCR, SYSCTRL_I2C1_SOFTRST_Msk) 1294 1295 /** 1296 * @brief I2C0 Soft Reset Assert 1297 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1298 * @return None 1299 */ 1300 #define __LL_SYSCTRL_I2C0SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB0RCR, SYSCTRL_I2C0_SOFTRST_Msk) 1301 1302 /** 1303 * @brief I2C0 Soft Reset Release 1304 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1305 * @return None 1306 */ 1307 #define __LL_SYSCTRL_I2C0SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB0RCR, SYSCTRL_I2C0_SOFTRST_Msk) 1308 1309 /** 1310 * @brief APB0 Soft Reset all Assert 1311 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1312 * @return None 1313 */ 1314 #define __LL_SYSCTRL_APB0SoftRstAll_Assert(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->APB0RCR, 0x0) 1315 1316 /** 1317 * @brief APB0 Soft Reset all Release 1318 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1319 * @return None 1320 */ 1321 #define __LL_SYSCTRL_APB0SoftRstAll_Release(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->APB0RCR, 0xffffffffUL) 1322 1323 1324 /** 1325 * @brief ECU Soft Reset Assert 1326 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1327 * @return None 1328 */ 1329 #define __LL_SYSCTRL_ECUSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_ECU_SOFTRST_Msk) 1330 1331 /** 1332 * @brief ECU Soft Reset Release 1333 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1334 * @return None 1335 */ 1336 #define __LL_SYSCTRL_ECUSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_ECU_SOFTRST_Msk) 1337 1338 /** 1339 * @brief IIR4 Soft Reset Assert 1340 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1341 * @return None 1342 */ 1343 #define __LL_SYSCTRL_IIR4SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_IIR4_SOFTRST_Msk) 1344 1345 /** 1346 * @brief IIR4 Soft Reset Release 1347 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1348 * @return None 1349 */ 1350 #define __LL_SYSCTRL_IIR4SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_IIR4_SOFTRST_Msk) 1351 1352 /** 1353 * @brief IIR3 Soft Reset Assert 1354 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1355 * @return None 1356 */ 1357 #define __LL_SYSCTRL_IIR3SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_IIR3_SOFTRST_Msk) 1358 1359 /** 1360 * @brief IIR3 Soft Reset Release 1361 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1362 * @return None 1363 */ 1364 #define __LL_SYSCTRL_IIR3SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_IIR3_SOFTRST_Msk) 1365 1366 /** 1367 * @brief IIR2 Soft Reset Assert 1368 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1369 * @return None 1370 */ 1371 #define __LL_SYSCTRL_IIR2SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_IIR2_SOFTRST_Msk) 1372 1373 /** 1374 * @brief IIR2 Soft Reset Release 1375 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1376 * @return None 1377 */ 1378 #define __LL_SYSCTRL_IIR2SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_IIR2_SOFTRST_Msk) 1379 1380 /** 1381 * @brief IIR1 Soft Reset Assert 1382 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1383 * @return None 1384 */ 1385 #define __LL_SYSCTRL_IIR1SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_IIR1_SOFTRST_Msk) 1386 1387 /** 1388 * @brief IIR1 Soft Reset Release 1389 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1390 * @return None 1391 */ 1392 #define __LL_SYSCTRL_IIR1SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_IIR1_SOFTRST_Msk) 1393 1394 /** 1395 * @brief IIR0 Soft Reset Assert 1396 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1397 * @return None 1398 */ 1399 #define __LL_SYSCTRL_IIR0SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_IIR0_SOFTRST_Msk) 1400 1401 /** 1402 * @brief IIR0 Soft Reset Release 1403 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1404 * @return None 1405 */ 1406 #define __LL_SYSCTRL_IIR0SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_IIR0_SOFTRST_Msk) 1407 1408 /** 1409 * @brief FPLL2 Soft Reset Assert 1410 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1411 * @return None 1412 */ 1413 #define __LL_SYSCTRL_FPLL2SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_FPLL2_SOFTRST_Msk) 1414 1415 /** 1416 * @brief FPLL2 Soft Reset Release 1417 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1418 * @return None 1419 */ 1420 #define __LL_SYSCTRL_FPLL2SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_FPLL2_SOFTRST_Msk) 1421 1422 /** 1423 * @brief FPLL1 Soft Reset Assert 1424 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1425 * @return None 1426 */ 1427 #define __LL_SYSCTRL_FPLL1SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_FPLL1_SOFTRST_Msk) 1428 1429 /** 1430 * @brief FPLL1 Soft Reset Release 1431 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1432 * @return None 1433 */ 1434 #define __LL_SYSCTRL_FPLL1SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_FPLL1_SOFTRST_Msk) 1435 1436 /** 1437 * @brief FPLL0 Soft Reset Assert 1438 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1439 * @return None 1440 */ 1441 #define __LL_SYSCTRL_FPLL0SoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_FPLL0_SOFTRST_Msk) 1442 1443 /** 1444 * @brief FPLL0 Soft Reset Release 1445 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1446 * @return None 1447 */ 1448 #define __LL_SYSCTRL_FPLL0SoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_FPLL0_SOFTRST_Msk) 1449 1450 /** 1451 * @brief DALI Soft Reset Assert 1452 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1453 * @return None 1454 */ 1455 #define __LL_SYSCTRL_DALISoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_DALI_SOFTRST_Msk) 1456 1457 /** 1458 * @brief DALI Soft Reset Release 1459 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1460 * @return None 1461 */ 1462 #define __LL_SYSCTRL_DALISoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->APB1RCR, SYSCTRL_DALI_SOFTRST_Msk) 1463 1464 /** 1465 * @brief APB1 Soft Reset all Assert 1466 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1467 * @return None 1468 */ 1469 #define __LL_SYSCTRL_APB1SoftRstAll_Assert(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->APB1RCR, 0x0) 1470 1471 /** 1472 * @brief APB1 Soft Reset all Release 1473 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1474 * @return None 1475 */ 1476 #define __LL_SYSCTRL_APB1SoftRstAll_Release(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->APB1RCR, 0xffffffffUL) 1477 1478 1479 /** 1480 * @brief DFLASH Soft Reset Assert 1481 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1482 * @return None 1483 */ 1484 #define __LL_SYSCTRL_DFLASHSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_DFLASH_SOFTRST_Msk) 1485 1486 /** 1487 * @brief DFLASH Soft Reset Release 1488 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1489 * @return None 1490 */ 1491 #define __LL_SYSCTRL_DFLASHSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_DFLASH_SOFTRST_Msk) 1492 1493 /** 1494 * @brief HSTIMER Soft Reset Assert 1495 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1496 * @return None 1497 */ 1498 #define __LL_SYSCTRL_HSTIMERSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_HSTIMER_SOFTRST_Msk) 1499 1500 /** 1501 * @brief HSTIMER Soft Reset Release 1502 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1503 * @return None 1504 */ 1505 #define __LL_SYSCTRL_HSTIMERSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_HSTIMER_SOFTRST_Msk) 1506 1507 /** 1508 * @brief GPIOD Soft Reset Assert 1509 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1510 * @return None 1511 */ 1512 #define __LL_SYSCTRL_GPIODSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_GPIOD_SOFTRST_Msk) 1513 1514 /** 1515 * @brief GPIOD Soft Reset Release 1516 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1517 * @return None 1518 */ 1519 #define __LL_SYSCTRL_GPIODSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_GPIOD_SOFTRST_Msk) 1520 1521 /** 1522 * @brief GPIOC Soft Reset Assert 1523 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1524 * @return None 1525 */ 1526 #define __LL_SYSCTRL_GPIOCSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_GPIOC_SOFTRST_Msk) 1527 1528 /** 1529 * @brief GPIOC Soft Reset Release 1530 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1531 * @return None 1532 */ 1533 #define __LL_SYSCTRL_GPIOCSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_GPIOC_SOFTRST_Msk) 1534 1535 /** 1536 * @brief GPIOB Soft Reset Assert 1537 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1538 * @return None 1539 */ 1540 #define __LL_SYSCTRL_GPIOBSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_GPIOB_SOFTRST_Msk) 1541 1542 /** 1543 * @brief GPIOB Soft Reset Release 1544 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1545 * @return None 1546 */ 1547 #define __LL_SYSCTRL_GPIOBSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_GPIOB_SOFTRST_Msk) 1548 1549 /** 1550 * @brief GPIOA Soft Reset Assert 1551 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1552 * @return None 1553 */ 1554 #define __LL_SYSCTRL_GPIOASoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_GPIOA_SOFTRST_Msk) 1555 1556 /** 1557 * @brief GPIOA Soft Reset Release 1558 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1559 * @return None 1560 */ 1561 #define __LL_SYSCTRL_GPIOASoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_GPIOA_SOFTRST_Msk) 1562 1563 /** 1564 * @brief USB Soft Reset Assert 1565 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1566 * @return None 1567 */ 1568 #define __LL_SYSCTRL_USBSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_USB_SOFTRST_Msk) 1569 1570 /** 1571 * @brief USB Soft Reset Release 1572 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1573 * @return None 1574 */ 1575 #define __LL_SYSCTRL_USBSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_USB_SOFTRST_Msk) 1576 1577 /** 1578 * @brief HRPWM Soft Reset Assert 1579 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1580 * @return None 1581 */ 1582 #define __LL_SYSCTRL_HRPWMSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_HRPWM_SOFTRST_Msk) 1583 1584 /** 1585 * @brief HRPWM Soft Reset Release 1586 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1587 * @return None 1588 */ 1589 #define __LL_SYSCTRL_HRPWMSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_HRPWM_SOFTRST_Msk) 1590 1591 /** 1592 * @brief DAC Soft Reset Assert 1593 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1594 * @return None 1595 */ 1596 #define __LL_SYSCTRL_DACSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_DAC_SOFTRST_Msk) 1597 1598 /** 1599 * @brief DAC Soft Reset Release 1600 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1601 * @return None 1602 */ 1603 #define __LL_SYSCTRL_DACSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_DAC_SOFTRST_Msk) 1604 1605 /** 1606 * @brief ADC Soft Reset Assert 1607 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1608 * @return None 1609 */ 1610 #define __LL_SYSCTRL_ADCSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_ADC_SOFTRST_Msk) 1611 1612 /** 1613 * @brief ADC Soft Reset Release 1614 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1615 * @return None 1616 */ 1617 #define __LL_SYSCTRL_ADCSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_ADC_SOFTRST_Msk) 1618 1619 /** 1620 * @brief CMP Soft Reset Assert 1621 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1622 * @return None 1623 */ 1624 #define __LL_SYSCTRL_CMPSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_CMP_SOFTRST_Msk) 1625 1626 /** 1627 * @brief CMP Soft Reset Release 1628 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1629 * @return None 1630 */ 1631 #define __LL_SYSCTRL_CMPSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_CMP_SOFTRST_Msk) 1632 1633 /** 1634 * @brief EFLASH Soft Reset Assert 1635 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1636 * @return None 1637 */ 1638 #define __LL_SYSCTRL_EFLASHSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_EFLASH_SOFTRST_Msk) 1639 1640 /** 1641 * @brief EFLASH Soft Reset Release 1642 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1643 * @return None 1644 */ 1645 #define __LL_SYSCTRL_EFLASHSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_EFLASH_SOFTRST_Msk) 1646 1647 /** 1648 * @brief CAN Soft Reset Assert 1649 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1650 * @return None 1651 */ 1652 #define __LL_SYSCTRL_CANSoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_CAN_SOFTRST_Msk) 1653 1654 /** 1655 * @brief CAN Soft Reset Release 1656 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1657 * @return None 1658 */ 1659 #define __LL_SYSCTRL_CANSoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_CAN_SOFTRST_Msk) 1660 1661 /** 1662 * @brief DMA Soft Reset Assert 1663 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1664 * @return None 1665 */ 1666 #define __LL_SYSCTRL_DMASoftRst_Assert(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_DMA_SOFTRST_Msk) 1667 1668 /** 1669 * @brief DMA Soft Reset Release 1670 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1671 * @return None 1672 */ 1673 #define __LL_SYSCTRL_DMASoftRst_Release(__SYSCTRL__) SET_BIT((__SYSCTRL__)->AHBRCR, SYSCTRL_DMA_SOFTRST_Msk) 1674 1675 /** 1676 * @brief AHB Soft Reset all Assert 1677 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1678 * @return None 1679 */ 1680 #define __LL_SYSCTRL_AHBSoftRstAll_Assert(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->AHBRCR, 0x0) 1681 1682 /** 1683 * @brief AHB Soft Reset all Release 1684 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1685 * @return None 1686 */ 1687 #define __LL_SYSCTRL_AHBSoftRstAll_Release(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->AHBRCR, 0xffffffffUL) 1688 1689 1690 /** 1691 * @brief RC8M Enable 1692 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1693 * @return None 1694 */ 1695 #define __LL_SYSCTRL_RC8M_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->XOSCCR, SYSCTRL_RC8M_EN_Msk) 1696 1697 /** 1698 * @brief RC8M Disable 1699 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1700 * @return None 1701 */ 1702 #define __LL_SYSCTRL_RC8M_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->XOSCCR, SYSCTRL_RC8M_EN_Msk) 1703 1704 /** 1705 * @brief XOSC Loss IRQ Enable 1706 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1707 * @return None 1708 */ 1709 #define __LL_SYSCTRL_XOSCLossIRQ_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->XOSCCR, SYSCTRL_XOSCLOSS_IRQEN_Msk) 1710 1711 /** 1712 * @brief XOSC Loss IRQ Disable 1713 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1714 * @return None 1715 */ 1716 #define __LL_SYSCTRL_XOSCLossIRQ_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->XOSCCR, SYSCTRL_XOSCLOSS_IRQEN_Msk) 1717 1718 /** 1719 * @brief XOSC HY Enable 1720 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1721 * @return None 1722 */ 1723 #define __LL_SYSCTRL_XOSC_HY_EN(__SYSCTRL__) SET_BIT((__SYSCTRL__)->XOSCCR, SYSCTRL_XOSC_HYEN_Msk) 1724 1725 /** 1726 * @brief XOSC HY Disable 1727 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1728 * @return None 1729 */ 1730 #define __LL_SYSCTRL_XOSC_HY_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->XOSCCR, SYSCTRL_XOSC_HYEN_Msk) 1731 1732 /** 1733 * @brief XOSC DR Set 1734 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1735 * @param cur Current 1736 * @return None 1737 */ 1738 #define __LL_SYSCTRL_XOSC_DR_Set(__SYSCTRL__, cur) MODIFY_REG((__SYSCTRL__)->XOSCCR, SYSCTRL_XOSC_DR_Msk, cur) 1739 1740 /** 1741 * @brief XOSC CTO Set 1742 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1743 * @param cap capacitance Register Value 1744 * @return None 1745 */ 1746 #define __LL_SYSCTRL_XOSC_CTO_Set(__SYSCTRL__, cap) \ 1747 MODIFY_REG((__SYSCTRL__)->XOSCCR, SYSCTRL_XOSC_CTO_Msk, ((cap & 0xfUL) << SYSCTRL_XOSC_CTO_Pos)) 1748 1749 /** 1750 * @brief XOSC CTI Set 1751 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1752 * @param cap capacitance Register Value 1753 * @return None 1754 */ 1755 #define __LL_SYSCTRL_XOSC_CTI_Set(__SYSCTRL__, cap) \ 1756 MODIFY_REG((__SYSCTRL__)->XOSCCR, SYSCTRL_XOSC_CTI_Msk, ((cap & 0xfUL) << SYSCTRL_XOSC_CTI_Pos)) 1757 1758 /** 1759 * @brief XOSC CS Set 1760 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1761 * @param cap capacitance 1762 * @return None 1763 */ 1764 #define __LL_SYSCTRL_XOSC_CS_Set(__SYSCTRL__, cap) MODIFY_REG((__SYSCTRL__)->XOSCCR, SYSCTRL_XOSC_CS_Msk, cap) 1765 1766 /** 1767 * @brief XOSC Enable 1768 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1769 * @return None 1770 */ 1771 #define __LL_SYSCTRL_XOSC_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->XOSCCR, SYSCTRL_XOSC_EN_Msk) 1772 1773 /** 1774 * @brief XOSC Disable 1775 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1776 * @return None 1777 */ 1778 #define __LL_SYSCTRL_XOSC_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->XOSCCR, SYSCTRL_XOSC_EN_Msk) 1779 1780 1781 /** 1782 * @brief Judge XOSC Loss or not 1783 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1784 * @retval 0 XOSC hasn't loss 1785 * @retval 1 XOSC has loss 1786 */ 1787 #define __LL_SYSCTRL_IsXOSCLossPending(__SYSCTRL__) \ 1788 (READ_BIT((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_LOSS_PENDING_Msk) >> SYSCTRL_XOSC_LOSS_PENDING_Pos) 1789 1790 /** 1791 * @brief Clear XOSC Loss Pending 1792 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1793 * @return None 1794 */ 1795 #define __LL_SYSCTRL_XOSCLossPending_Clr(__SYSCTRL__) SET_BIT((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_LOSS_PENDING_Msk) 1796 1797 /** 1798 * @brief Enable SYSCLK Auto Switch to RC8M When XOSC Fault 1799 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1800 * @return None 1801 */ 1802 #define __LL_SYSCTRL_XOSC_SysclkSw_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_SYSCLK_SWEN_Msk) 1803 1804 /** 1805 * @brief Disable SYSCLK Auto Switch to RC8M When XOSC Fault 1806 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1807 * @return None 1808 */ 1809 #define __LL_SYSCTRL_XOSC_SysclkSw_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_SYSCLK_SWEN_Msk) 1810 1811 /** 1812 * @brief Enable PLL Ref Clk Auto Switch to RC8M When XOSC Fault 1813 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1814 * @return None 1815 */ 1816 #define __LL_SYSCTRL_XOSC_PLLRefClkSw_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_REFCLK_SWEN_Msk) 1817 1818 /** 1819 * @brief Disable PLL Ref Clk Auto Switch to RC8M When XOSC Fault 1820 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1821 * @return None 1822 */ 1823 #define __LL_SYSCTRL_XOSC_PLLRefClkSw_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_REFCLK_SWEN_Msk) 1824 1825 /** 1826 * @brief XOSC MNT Enable 1827 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1828 * @return None 1829 */ 1830 #define __LL_SYSCTRL_XOSC_MNT_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_MNTEN_Msk) 1831 1832 /** 1833 * @brief XOSC MNT Disable 1834 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1835 * @return None 1836 */ 1837 #define __LL_SYSCTRL_XOSC_MNT_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_MNTEN_Msk) 1838 1839 /** 1840 * @brief XOSC AutoSwitch Window Width Set 1841 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1842 * @param width Auto Switch Window Width Register Value 1843 * @return None 1844 */ 1845 #define __LL_SYSCTRL_XOSC_Width_Set(__SYSCTRL__, width) \ 1846 MODIFY_REG((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_WIDTH_Msk, ((width & 0xfUL) << SYSCTRL_XOSC_WIDTH_Pos)) 1847 1848 /** 1849 * @brief XOSC AutoSwitch Function High Limit Value Set 1850 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1851 * @param limit High Limit Register Value 1852 * @return None 1853 */ 1854 #define __LL_SYSCTRL_XOSC_HighLimit_Set(__SYSCTRL__, limit) \ 1855 MODIFY_REG((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_HIGH_LIMIT_Msk, ((limit & 0x3ffUL) << SYSCTRL_XOSC_HIGH_LIMIT_Pos)) 1856 1857 /** 1858 * @brief XOSC AutoSwitch Function Low Limit Value Set 1859 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1860 * @param limit Low Limit Register Value 1861 * @return None 1862 */ 1863 #define __LL_SYSCTRL_XOSC_LowLimit_Set(__SYSCTRL__, limit) \ 1864 MODIFY_REG((__SYSCTRL__)->XASWCR, SYSCTRL_XOSC_LOW_LIMIT_Msk, ((limit & 0x3ffUL) << SYSCTRL_XOSC_LOW_LIMIT_Pos)) 1865 1866 1867 /** 1868 * @brief ADC Buffer Source Select 1869 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1870 * @param src ADC Buffer Source 1871 * @return None 1872 */ 1873 #define __LL_SYSCTRL_ADCBufSrc_Sel(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->BUFCR, SYSCTRL_ADCBUF_SRCSEL_Msk, src) 1874 1875 /** 1876 * @brief ADC Buffer Bypass Enable 1877 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1878 * @return None 1879 */ 1880 #define __LL_SYSCTRL_ADCBufBypass_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->BUFCR, SYSCTRL_ADCBUF_BYPASS_Msk) 1881 1882 /** 1883 * @brief ADC Buffer Bypass Disable 1884 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1885 * @return None 1886 */ 1887 #define __LL_SYSCTRL_ADCBufBypass_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->BUFCR, SYSCTRL_ADCBUF_BYPASS_Msk) 1888 1889 /** 1890 * @brief ADC Buffer Enable 1891 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1892 * @return None 1893 */ 1894 #define __LL_SYSCTRL_ADCBuf_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->BUFCR, SYSCTRL_ADCBUF_EN_Msk) 1895 1896 /** 1897 * @brief ADC Buffer Disable 1898 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1899 * @return None 1900 */ 1901 #define __LL_SYSCTRL_ADCBuf_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->BUFCR, SYSCTRL_ADCBUF_EN_Msk) 1902 1903 /** 1904 * @brief TOUT Source Set 1905 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1906 * @param src TOUT Source 1907 * @return None 1908 */ 1909 #define __LL_SYSCTRL_TOUTSrc_Set(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->BUFCR, SYSCTRL_TOUT_SRC_Msk, src) 1910 1911 1912 /** 1913 * @brief ADC Fan Disable 1914 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1915 * @return None 1916 */ 1917 #define __LL_SYSCTRL_ADC_Fan_Dis(__SYSCTRL__) \ 1918 MODIFY_REG((__SYSCTRL__)->SYSCCR, SYSCTRL_ADCCTRL_FANOUT_EN_Msk, (0x0 << SYSCTRL_ADCCTRL_FANOUT_EN_Pos)) 1919 1920 /** 1921 * @brief ADC Fan Out Enable 1922 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1923 * @return None 1924 */ 1925 #define __LL_SYSCTRL_ADC_FanOut_En(__SYSCTRL__) \ 1926 MODIFY_REG((__SYSCTRL__)->SYSCCR, SYSCTRL_ADCCTRL_FANOUT_EN_Msk, (0x1 << SYSCTRL_ADCCTRL_FANOUT_EN_Pos)) 1927 1928 /** 1929 * @brief ADC Fan In Enable 1930 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1931 * @return None 1932 */ 1933 #define __LL_SYSCTRL_ADC_FanIn_En(__SYSCTRL__) \ 1934 MODIFY_REG((__SYSCTRL__)->SYSCCR, SYSCTRL_ADCCTRL_FANOUT_EN_Msk, (0x2 << SYSCTRL_ADCCTRL_FANOUT_EN_Pos)) 1935 1936 /** 1937 * @brief ADC Data Fan Out Source Select ADC0 1938 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1939 * @return None 1940 */ 1941 #define __LL_SYSCTRL_ADCDataFanOutSrc_ADC0(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_ADCDATA_FANOUT_SRC_Msk) 1942 1943 /** 1944 * @brief ADC Data Fan Out Source Select ADC1 1945 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1946 * @return None 1947 */ 1948 #define __LL_SYSCTRL_ADCDataFanOutSrc_ADC1(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_ADCDATA_FANOUT_SRC_Msk) 1949 1950 /** 1951 * @brief ADC Data Fan Out Enable 1952 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1953 * @return None 1954 */ 1955 #define __LL_SYSCTRL_ADCDataFanOut_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_ADCDATA_FANOUT_EN_Msk) 1956 1957 /** 1958 * @brief ADC Data Fan Out Disable 1959 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1960 * @return None 1961 */ 1962 #define __LL_SYSCTRL_ADCDataFanOut_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_ADCDATA_FANOUT_EN_Msk) 1963 1964 /** 1965 * @brief I2C1 SMBUS Output Enable 1966 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1967 * @return None 1968 */ 1969 #define __LL_SYSCTRL_I2C1_SMBUSOutput_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_I2C1_SMBUS_OE_Msk) 1970 1971 /** 1972 * @brief I2C1 SMBUS Output Disable 1973 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1974 * @return None 1975 */ 1976 #define __LL_SYSCTRL_I2C1_SMBUSOutput_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_I2C1_SMBUS_OE_Msk) 1977 1978 /** 1979 * @brief I2C0 SMBUS Output Enable 1980 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1981 * @return None 1982 */ 1983 #define __LL_SYSCTRL_I2C0_SMBUSOutput_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_I2C0_SMBUS_OE_Msk) 1984 1985 /** 1986 * @brief I2C0 SMBUS Output Disable 1987 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1988 * @return None 1989 */ 1990 #define __LL_SYSCTRL_I2C0_SMBUSOutput_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_I2C0_SMBUS_OE_Msk) 1991 1992 /** 1993 * @brief JTAG Bug Fix Enable 1994 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 1995 * @return None 1996 */ 1997 #define __LL_SYSCTRL_JTAG_BugFix_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_JTAG_BUGFIX_EN_Msk) 1998 1999 /** 2000 * @brief JTAG Bug Fix Diaable 2001 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2002 * @return None 2003 */ 2004 #define __LL_SYSCTRL_JTAG_BugFix_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_JTAG_BUGFIX_EN_Msk) 2005 2006 /** 2007 * @brief CAN FD Enable 2008 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2009 * @return None 2010 */ 2011 #define __LL_SYSCTRL_CAN_FD_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_CANFD_EN_Msk) 2012 2013 /** 2014 * @brief CAN FD Disable 2015 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2016 * @return None 2017 */ 2018 #define __LL_SYSCTRL_CAN_FD_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_CANFD_EN_Msk) 2019 2020 /** 2021 * @brief CPU Lockup Reset Enable 2022 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2023 * @return None 2024 */ 2025 #define __LL_SYSCTRL_CPU_LockupRst_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_CPU_LOCKUPRST_EN_Msk) 2026 2027 /** 2028 * @brief CPU Lockup Reset Disable 2029 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2030 * @return None 2031 */ 2032 #define __LL_SYSCTRL_CPU_LockupRst_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_CPU_LOCKUPRST_EN_Msk) 2033 2034 /** 2035 * @brief WWDG Debug Enable 2036 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2037 * @return None 2038 */ 2039 #define __LL_SYSCTRL_WWDG_Debug_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_WWDG_DEBUG_EN_Msk) 2040 2041 /** 2042 * @brief WWDG Debug Disable 2043 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2044 * @return None 2045 */ 2046 #define __LL_SYSCTRL_WWDG_Debug_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_WWDG_DEBUG_EN_Msk) 2047 2048 /** 2049 * @brief WWDG Timeout Reset Enable 2050 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2051 * @return None 2052 */ 2053 #define __LL_SYSCTRL_WWDG_TimeoutRst_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_WWDG_TIMEOUTRST_EN_Msk) 2054 2055 /** 2056 * @brief WWDG Timeout Reset Disable 2057 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2058 * @return None 2059 */ 2060 #define __LL_SYSCTRL_WWDG_TimeoutRst_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_WWDG_TIMEOUTRST_EN_Msk) 2061 2062 /** 2063 * @brief IWDG Debug Enable 2064 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2065 * @return None 2066 */ 2067 #define __LL_SYSCTRL_IWDG_Debug_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_IWDG_DEBUG_EN_Msk) 2068 2069 /** 2070 * @brief IWDG Debug Disable 2071 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2072 * @return None 2073 */ 2074 #define __LL_SYSCTRL_IWDG_Debug_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_IWDG_DEBUG_EN_Msk) 2075 2076 /** 2077 * @brief IWDG Timeout Reset Enable 2078 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2079 * @return None 2080 */ 2081 #define __LL_SYSCTRL_IWDG_TimeoutRst_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_IWDG_TIMEOUTRST_EN_Msk) 2082 2083 /** 2084 * @brief IWDG Timeout Reset Disable 2085 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2086 * @return None 2087 */ 2088 #define __LL_SYSCTRL_IWDG_TimeoutRst_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_IWDG_TIMEOUTRST_EN_Msk) 2089 2090 /** 2091 * @brief HSTMR Debug Enable 2092 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2093 * @return None 2094 */ 2095 #define __LL_SYSCTRL_HSTMR_Debug_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_HSTMR_DEBUG_EN_Msk) 2096 2097 /** 2098 * @brief HSTMR Debug Disable 2099 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2100 * @return None 2101 */ 2102 #define __LL_SYSCTRL_HSTMR_Debug_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_HSTMR_DEBUG_EN_Msk) 2103 2104 /** 2105 * @brief LSTMR Debug Enable 2106 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2107 * @return None 2108 */ 2109 #define __LL_SYSCTRL_LSTMR_Debug_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_LSTMR_DEBUG_EN_Msk) 2110 2111 /** 2112 * @brief LSTMR Debug Disable 2113 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2114 * @return None 2115 */ 2116 #define __LL_SYSCTRL_LSTMR_Debug_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_LSTMR_DEBUG_EN_Msk) 2117 2118 /** 2119 * @brief GPIO Input NMI Interrupt Enable 2120 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2121 * @return None 2122 */ 2123 #define __LL_SYSCTRL_GPIO_InputNMI_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_GPIO_NMIEN_Msk) 2124 2125 /** 2126 * @brief GPIO Input NMI Interrupt Disable 2127 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2128 * @return None 2129 */ 2130 #define __LL_SYSCTRL_GPIO_InputNMI_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_GPIO_NMIEN_Msk) 2131 2132 /** 2133 * @brief CLK Test Source Select 2134 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2135 * @param src CLK Test Source 2136 * @return None 2137 */ 2138 #define __LL_SYSCTRL_CLK_TestSrc_Sel(__SYSCTRL__, src) MODIFY_REG((__SYSCTRL__)->SYSCCR, SYSCTRL_CLK_TEST_SRC_Msk, src) 2139 2140 /** 2141 * @brief CLK Fan Out Enable 2142 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2143 * @return None 2144 */ 2145 #define __LL_SYSCTRL_CLK_FanOut_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_CLK_FANOUT_EN_Msk) 2146 2147 /** 2148 * @brief CLK Fan Out Disable 2149 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2150 * @return None 2151 */ 2152 #define __LL_SYSCTRL_CLK_FanOut_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_CLK_FANOUT_EN_Msk) 2153 2154 /** 2155 * @brief PMU Debug1 Enable 2156 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2157 * @return None 2158 */ 2159 #define __LL_SYSCTRL_PMU_Debug1_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_PMU_DEBUG1_EN_Msk) 2160 2161 /** 2162 * @brief PMU Debug1 Disable 2163 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2164 * @return None 2165 */ 2166 #define __LL_SYSCTRL_PMU_Debug1_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_PMU_DEBUG1_EN_Msk) 2167 2168 /** 2169 * @brief PMU Debug0 Enable 2170 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2171 * @return None 2172 */ 2173 #define __LL_SYSCTRL_PMU_Debug0_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_PMU_DEBUG0_EN_Msk) 2174 2175 /** 2176 * @brief PMU Debug0 Disable 2177 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2178 * @return None 2179 */ 2180 #define __LL_SYSCTRL_PMU_Debug0_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_PMU_DEBUG0_EN_Msk) 2181 2182 /** 2183 * @brief TEST CLK In Enable 2184 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2185 * @return None 2186 */ 2187 #define __LL_SYSCTRL_TESTClkIn_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_TEST_CLKIN_EN_Msk) 2188 2189 /** 2190 * @brief TEST CLK In Disable 2191 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2192 * @return None 2193 */ 2194 #define __LL_SYSCTRL_TESTClkIn_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->SYSCCR, SYSCTRL_TEST_CLKIN_EN_Msk) 2195 2196 2197 /** 2198 * @brief Judge SysReq Reset or not 2199 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2200 * @retval 0 Isn't SysReq Reset 2201 * @retval 1 Is SysReq Reset 2202 */ 2203 #define __LL_SYSCTRL_IsSysReqRst(__SYSCTRL__) \ 2204 (READ_BIT((__SYSCTRL__)->SRSTSR, SYSCTRL_SYSREQ_RST_ST_Msk) >> SYSCTRL_SYSREQ_RST_ST_Pos) 2205 2206 /** 2207 * @brief Clear SysReq Reset Pending 2208 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2209 * @return None 2210 */ 2211 #define __LL_SYSCTRL_SysReqRst_Clr(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SRSTSR, SYSCTRL_SYSREQ_RST_ST_Msk) 2212 2213 /** 2214 * @brief Judge MCLR Reset or not 2215 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2216 * @retval 0 Isn't MCLR Reset 2217 * @retval 1 Is MCLR Reset 2218 */ 2219 #define __LL_SYSCTRL_IsMCLRRst(__SYSCTRL__) \ 2220 (READ_BIT((__SYSCTRL__)->SRSTSR, SYSCTRL_MCLR_RST_ST_Msk) >> SYSCTRL_MCLR_RST_ST_Pos) 2221 2222 /** 2223 * @brief Clear MCLR Reset Pending 2224 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2225 * @return None 2226 */ 2227 #define __LL_SYSCTRL_MCLRRst_Clr(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SRSTSR, SYSCTRL_MCLR_RST_ST_Msk) 2228 2229 /** 2230 * @brief Judge LVD Reset or not 2231 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2232 * @retval 0 Isn't LVD Reset 2233 * @retval 1 Is LVD Reset 2234 */ 2235 #define __LL_SYSCTRL_IsLVDRst(__SYSCTRL__) \ 2236 (READ_BIT((__SYSCTRL__)->SRSTSR, SYSCTRL_LVD_RST_ST_Msk) >> SYSCTRL_LVD_RST_ST_Pos) 2237 2238 /** 2239 * @brief Clear LVD Reset Pending 2240 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2241 * @return None 2242 */ 2243 #define __LL_SYSCTRL_LVDRst_Clr(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SRSTSR, SYSCTRL_LVD_RST_ST_Msk) 2244 2245 /** 2246 * @brief Judge WWDG Reset or not 2247 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2248 * @retval 0 Isn't WWDG Reset 2249 * @retval 1 Is WWDG Reset 2250 */ 2251 #define __LL_SYSCTRL_IsWWDGRst(__SYSCTRL__) \ 2252 (READ_BIT((__SYSCTRL__)->SRSTSR, SYSCTRL_WWDG_RST_ST_Msk) >> SYSCTRL_WWDG_RST_ST_Pos) 2253 2254 /** 2255 * @brief Clear WWDG Reset Pending 2256 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2257 * @return None 2258 */ 2259 #define __LL_SYSCTRL_WWDGRst_Clr(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SRSTSR, SYSCTRL_WWDG_RST_ST_Msk) 2260 2261 /** 2262 * @brief Judge IWDG Reset or not 2263 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2264 * @retval 0 Isn't IWDG Reset 2265 * @retval 1 Is IWDG Reset 2266 */ 2267 #define __LL_SYSCTRL_IsIWDGRst(__SYSCTRL__) \ 2268 (READ_BIT((__SYSCTRL__)->SRSTSR, SYSCTRL_IWDG_RST_ST_Msk) >> SYSCTRL_IWDG_RST_ST_Pos) 2269 2270 /** 2271 * @brief Clear IWDG Reset Pending 2272 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2273 * @return None 2274 */ 2275 #define __LL_SYSCTRL_IWDGRst_Clr(__SYSCTRL__) SET_BIT((__SYSCTRL__)->SRSTSR, SYSCTRL_IWDG_RST_ST_Msk) 2276 2277 2278 /** 2279 * @brief SYSCTRL Control Register Unlock 2280 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2281 * @return None 2282 */ 2283 #define __LL_SYSCTRL_CTRLReg_Unlock(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->KEY, 0x3fac87e4) 2284 2285 /** 2286 * @brief SYSCTRL FLS Register Unlock 2287 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2288 * @return None 2289 */ 2290 #define __LL_SYSCTRL_FLSReg_Unlock(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->KEY, 0x1f2e3c4a) 2291 2292 /** 2293 * @brief SYSCTRL Reg Lock 2294 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2295 * @return None 2296 */ 2297 #define __LL_SYSCTRL_Reg_Lock(__SYSCTRL__) WRITE_REG((__SYSCTRL__)->KEY, 0x00) 2298 2299 /** 2300 * @brief Judge SYSCTRL CTRL Register is unlock or not 2301 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2302 * @retval 0 SYSCTRL CTRL Register is lock 2303 * @retval 1 SYSCTRL CTRL Register is unlock 2304 */ 2305 #define __LL_SYSCTRL_IsCTRLRegUnlock(__SYSCTRL__) (READ_REG((__SYSCTRL__)->KEY) == 0x3fac87e4) 2306 2307 /** 2308 * @brief Judge SYSCTRL FLS Register is unlock or not 2309 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2310 * @retval 0 SYSCTRL FLS Register is lock 2311 * @retval 1 SYSCTRL FLS Register is unlock 2312 */ 2313 #define __LL_SYSCTRL_IsFLSRegUnlock(__SYSCTRL__) (READ_REG((__SYSCTRL__)->KEY) == 0x1f2e3c4a) 2314 2315 2316 /** 2317 * @brief PMU In Set 2318 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2319 * @param val Register Value 2320 * @return None 2321 */ 2322 #define __LL_SYSCTRL_PMU_In_Set(__SYSCTRL__, val) \ 2323 MODIFY_REG((__SYSCTRL__)->PMUCR, SYSCTRL_PMU_IN_Msk, ((val & 0x3fUL) << SYSCTRL_PMU_IN_Pos)) 2324 2325 /** 2326 * @brief CUR Resistance Set 2327 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2328 * @param res Resistance Register Value 2329 * @return None 2330 */ 2331 #define __LL_SYSCTRL_CUR_RES_Set(__SYSCTRL__, res) \ 2332 MODIFY_REG((__SYSCTRL__)->PMUCR, SYSCTRL_CUR_RES_Msk, ((res & 0x3fUL) << SYSCTRL_CUR_RES_Pos)) 2333 2334 /** 2335 * @brief CUR CAL Set 2336 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2337 * @param val Register Value 2338 * @return None 2339 */ 2340 #define __LL_SYSCTRL_CUR_CAL_Set(__SYSCTRL__, val) \ 2341 MODIFY_REG((__SYSCTRL__)->PMUCR, SYSCTRL_CUR_CAL_Msk, ((val & 0x3UL) << SYSCTRL_CUR_CAL_Pos)) 2342 2343 /** 2344 * @brief AVDD DRD Enable 2345 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2346 * @return None 2347 */ 2348 #define __LL_SYSCTRL_AVDD_DRD_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_AVDD_DRD_Msk) 2349 2350 /** 2351 * @brief AVDD DRD Disable 2352 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2353 * @return None 2354 */ 2355 #define __LL_SYSCTRL_AVDD_DRD_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_AVDD_DRD_Msk) 2356 2357 /** 2358 * @brief AVDD Voltage Set 2359 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2360 * @param vol AVDD Voltage 2361 * @return None 2362 */ 2363 #define __LL_SYSCTRL_AVDD_VOL_Sel(__SYSCTRL__, vol) MODIFY_REG((__SYSCTRL__)->PMUCR, SYSCTRL_AVDD_SET_Msk, vol) 2364 2365 /** 2366 * @brief VDD Voltage Set 2367 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2368 * @param vol VDD Voltage 2369 * @return None 2370 */ 2371 #define __LL_SYSCTRL_VDD_VOL_Sel(__SYSCTRL__, vol) MODIFY_REG((__SYSCTRL__)->PMUCR, SYSCTRL_VDD_SET_Msk, vol) 2372 2373 /** 2374 * @brief CUR Enable 2375 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2376 * @return None 2377 */ 2378 #define __LL_SYSCTRL_CUR_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_CUR_ENABLE_Msk) 2379 2380 /** 2381 * @brief CUR Disable 2382 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2383 * @return None 2384 */ 2385 #define __LL_SYSCTRL_CUR_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_CUR_ENABLE_Msk) 2386 2387 /** 2388 * @brief AVDDLDO Enable 2389 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2390 * @return None 2391 */ 2392 #define __LL_SYSCTRL_AVDDLDO_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_AVDDLDO_ENABLE_Msk) 2393 2394 /** 2395 * @brief AVDDLDO Disable 2396 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2397 * @return None 2398 */ 2399 #define __LL_SYSCTRL_AVDDLDO_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_AVDDLDO_ENABLE_Msk) 2400 2401 /** 2402 * @brief Temperature Sensor Enable 2403 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2404 * @return None 2405 */ 2406 #define __LL_SYSCTRL_TempSensor_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_TEMPSENSOR_ENABLE_Msk) 2407 2408 /** 2409 * @brief Temperature Sensor Disable 2410 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2411 * @return None 2412 */ 2413 #define __LL_SYSCTRL_TempSensor_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_TEMPSENSOR_ENABLE_Msk) 2414 2415 /** 2416 * @brief Band Gap Voltage Set 2417 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2418 * @param vol Voltage Register Value 2419 * @return None 2420 */ 2421 #define __LL_SYSCTRL_BandGapVol_Set(__SYSCTRL__, vol) \ 2422 MODIFY_REG((__SYSCTRL__)->PMUCR, SYSCTRL_BGR_VOL_Msk, ((vol & 0x1fUL) << SYSCTRL_BGR_VOL_Pos)) 2423 2424 /** 2425 * @brief BGR DRD Enable 2426 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2427 * @return None 2428 */ 2429 #define __LL_SYSCTRL_BGR_DRD_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_BGR_DRD_Msk) 2430 2431 /** 2432 * @brief BGR DRD Disable 2433 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2434 * @return None 2435 */ 2436 #define __LL_SYSCTRL_BGR_DRD_Dis(__SYSCTRL__) CLEAR_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_BGR_DRD_Msk) 2437 2438 /** 2439 * @brief BGR Filter Enable 2440 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2441 * @return None 2442 */ 2443 #define __LL_SYSCTRL_BGR_Filter_En(__SYSCTRL__) SET_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_BGR_FILTER_Msk) 2444 2445 /** 2446 * @brief BGR Filter Disable 2447 * @param __SYSCTRL__ Specifies SYSCTRL peripheral 2448 * @return None 2449 */ 2450 #define __LL_SYSCTRL_BGR_Filter_Dis(__SYSCTRL__) \ 2451 __LL_SYSCTRL_CtrlREG_OPT(CLEAR_BIT((__SYSCTRL__)->PMUCR, SYSCTRL_BGR_FILTER_Msk)) 2452 2453 2454 /** 2455 * @brief SYSCTRL CTRL Register Operation 2456 * @param expression SYSCTRL CTRL Register Read/Write Operation 2457 * @note Only Write Operation need Unlock before Operation 2458 * @return None 2459 */ 2460 #define __LL_SYSCTRL_CtrlREG_OPT(expression) \ 2461 do { \ 2462 __LL_SYSCTRL_CTRLReg_Unlock(SYSCTRL); \ 2463 expression; \ 2464 __LL_SYSCTRL_Reg_Lock(SYSCTRL); \ 2465 } while(0) 2466 2467 /** 2468 * @brief SYSCTRL FLS Register Operation 2469 * @param expression SYSCTRL FLS Register Read/Write Operation 2470 * @note Only Write Operation need Unlock before Operation 2471 * @return None 2472 */ 2473 #define __LL_SYSCTRL_FlsREG_OPT(expression) \ 2474 do { \ 2475 __LL_SYSCTRL_FLSReg_Unlock(SYSCTRL); \ 2476 expression; \ 2477 __LL_SYSCTRL_Reg_Lock(SYSCTRL); \ 2478 } while(0) 2479 2480 /** 2481 * @} 2482 */ 2483 2484 2485 /* Exported types ------------------------------------------------------------*/ 2486 /** @defgroup SYSCTRL_LL_Exported_Types SYSCTRL LL Exported Types 2487 * @brief SYSCTRL LL Exported Types 2488 * @{ 2489 */ 2490 2491 /** 2492 * @brief SYSCTRL CLK Div Definition 2493 */ 2494 typedef enum { 2495 SYSCTRL_CLK_DIV_IVD = 0,/*!< SYSCTRL CLK DIV IND */ 2496 SYSCTRL_CLK_DIV_1, /*!< SYSCTRL CLK DIV 1 */ 2497 SYSCTRL_CLK_DIV_2, /*!< SYSCTRL CLK DIV 2 */ 2498 SYSCTRL_CLK_DIV_3, /*!< SYSCTRL CLK DIV 3 */ 2499 SYSCTRL_CLK_DIV_4, /*!< SYSCTRL CLK DIV 4 */ 2500 SYSCTRL_CLK_DIV_5, /*!< SYSCTRL CLK DIV 5 */ 2501 SYSCTRL_CLK_DIV_6, /*!< SYSCTRL CLK DIV 6 */ 2502 SYSCTRL_CLK_DIV_7, /*!< SYSCTRL CLK DIV 7 */ 2503 SYSCTRL_CLK_DIV_8, /*!< SYSCTRL CLK DIV 8 */ 2504 SYSCTRL_CLK_DIV_9, /*!< SYSCTRL CLK DIV 9 */ 2505 SYSCTRL_CLK_DIV_10, /*!< SYSCTRL CLK DIV 10 */ 2506 SYSCTRL_CLK_DIV_11, /*!< SYSCTRL CLK DIV 11 */ 2507 SYSCTRL_CLK_DIV_12, /*!< SYSCTRL CLK DIV 12 */ 2508 SYSCTRL_CLK_DIV_13, /*!< SYSCTRL CLK DIV 13 */ 2509 SYSCTRL_CLK_DIV_14, /*!< SYSCTRL CLK DIV 14 */ 2510 SYSCTRL_CLK_DIV_15, /*!< SYSCTRL CLK DIV 15 */ 2511 SYSCTRL_CLK_DIV_16, /*!< SYSCTRL CLK DIV 16 */ 2512 SYSCTRL_CLK_DIV_17, /*!< SYSCTRL CLK DIV 17 */ 2513 SYSCTRL_CLK_DIV_18, /*!< SYSCTRL CLK DIV 18 */ 2514 SYSCTRL_CLK_DIV_19, /*!< SYSCTRL CLK DIV 19 */ 2515 SYSCTRL_CLK_DIV_20, /*!< SYSCTRL CLK DIV 20 */ 2516 SYSCTRL_CLK_DIV_21, /*!< SYSCTRL CLK DIV 21 */ 2517 SYSCTRL_CLK_DIV_22, /*!< SYSCTRL CLK DIV 22 */ 2518 SYSCTRL_CLK_DIV_23, /*!< SYSCTRL CLK DIV 23 */ 2519 SYSCTRL_CLK_DIV_24, /*!< SYSCTRL CLK DIV 24 */ 2520 SYSCTRL_CLK_DIV_25, /*!< SYSCTRL CLK DIV 25 */ 2521 SYSCTRL_CLK_DIV_26, /*!< SYSCTRL CLK DIV 26 */ 2522 SYSCTRL_CLK_DIV_27, /*!< SYSCTRL CLK DIV 27 */ 2523 SYSCTRL_CLK_DIV_28, /*!< SYSCTRL CLK DIV 28 */ 2524 SYSCTRL_CLK_DIV_29, /*!< SYSCTRL CLK DIV 29 */ 2525 SYSCTRL_CLK_DIV_30, /*!< SYSCTRL CLK DIV 30 */ 2526 SYSCTRL_CLK_DIV_31, /*!< SYSCTRL CLK DIV 31 */ 2527 SYSCTRL_CLK_DIV_32, /*!< SYSCTRL CLK DIV 32 */ 2528 SYSCTRL_CLK_DIV_33, /*!< SYSCTRL CLK DIV 33 */ 2529 SYSCTRL_CLK_DIV_34, /*!< SYSCTRL CLK DIV 34 */ 2530 SYSCTRL_CLK_DIV_35, /*!< SYSCTRL CLK DIV 35 */ 2531 SYSCTRL_CLK_DIV_36, /*!< SYSCTRL CLK DIV 36 */ 2532 SYSCTRL_CLK_DIV_37, /*!< SYSCTRL CLK DIV 37 */ 2533 SYSCTRL_CLK_DIV_38, /*!< SYSCTRL CLK DIV 38 */ 2534 SYSCTRL_CLK_DIV_39, /*!< SYSCTRL CLK DIV 39 */ 2535 SYSCTRL_CLK_DIV_40, /*!< SYSCTRL CLK DIV 40 */ 2536 SYSCTRL_CLK_DIV_41, /*!< SYSCTRL CLK DIV 41 */ 2537 SYSCTRL_CLK_DIV_42, /*!< SYSCTRL CLK DIV 42 */ 2538 SYSCTRL_CLK_DIV_43, /*!< SYSCTRL CLK DIV 43 */ 2539 SYSCTRL_CLK_DIV_44, /*!< SYSCTRL CLK DIV 44 */ 2540 SYSCTRL_CLK_DIV_45, /*!< SYSCTRL CLK DIV 45 */ 2541 SYSCTRL_CLK_DIV_46, /*!< SYSCTRL CLK DIV 46 */ 2542 SYSCTRL_CLK_DIV_47, /*!< SYSCTRL CLK DIV 47 */ 2543 SYSCTRL_CLK_DIV_48, /*!< SYSCTRL CLK DIV 48 */ 2544 SYSCTRL_CLK_DIV_49, /*!< SYSCTRL CLK DIV 49 */ 2545 SYSCTRL_CLK_DIV_50, /*!< SYSCTRL CLK DIV 50 */ 2546 SYSCTRL_CLK_DIV_51, /*!< SYSCTRL CLK DIV 51 */ 2547 SYSCTRL_CLK_DIV_52, /*!< SYSCTRL CLK DIV 52 */ 2548 SYSCTRL_CLK_DIV_53, /*!< SYSCTRL CLK DIV 53 */ 2549 SYSCTRL_CLK_DIV_54, /*!< SYSCTRL CLK DIV 54 */ 2550 SYSCTRL_CLK_DIV_55, /*!< SYSCTRL CLK DIV 55 */ 2551 SYSCTRL_CLK_DIV_56, /*!< SYSCTRL CLK DIV 56 */ 2552 SYSCTRL_CLK_DIV_57, /*!< SYSCTRL CLK DIV 57 */ 2553 SYSCTRL_CLK_DIV_58, /*!< SYSCTRL CLK DIV 58 */ 2554 SYSCTRL_CLK_DIV_59, /*!< SYSCTRL CLK DIV 59 */ 2555 SYSCTRL_CLK_DIV_60, /*!< SYSCTRL CLK DIV 60 */ 2556 SYSCTRL_CLK_DIV_61, /*!< SYSCTRL CLK DIV 61 */ 2557 SYSCTRL_CLK_DIV_62, /*!< SYSCTRL CLK DIV 62 */ 2558 SYSCTRL_CLK_DIV_63, /*!< SYSCTRL CLK DIV 63 */ 2559 SYSCTRL_CLK_DIV_64, /*!< SYSCTRL CLK DIV 64 */ 2560 SYSCTRL_CLK_DIV_65, /*!< SYSCTRL CLK DIV 65 */ 2561 SYSCTRL_CLK_DIV_66, /*!< SYSCTRL CLK DIV 66 */ 2562 SYSCTRL_CLK_DIV_67, /*!< SYSCTRL CLK DIV 67 */ 2563 SYSCTRL_CLK_DIV_68, /*!< SYSCTRL CLK DIV 68 */ 2564 SYSCTRL_CLK_DIV_69, /*!< SYSCTRL CLK DIV 69 */ 2565 SYSCTRL_CLK_DIV_70, /*!< SYSCTRL CLK DIV 70 */ 2566 SYSCTRL_CLK_DIV_71, /*!< SYSCTRL CLK DIV 71 */ 2567 SYSCTRL_CLK_DIV_72, /*!< SYSCTRL CLK DIV 72 */ 2568 SYSCTRL_CLK_DIV_73, /*!< SYSCTRL CLK DIV 73 */ 2569 SYSCTRL_CLK_DIV_74, /*!< SYSCTRL CLK DIV 74 */ 2570 SYSCTRL_CLK_DIV_75, /*!< SYSCTRL CLK DIV 75 */ 2571 SYSCTRL_CLK_DIV_76, /*!< SYSCTRL CLK DIV 76 */ 2572 SYSCTRL_CLK_DIV_77, /*!< SYSCTRL CLK DIV 77 */ 2573 SYSCTRL_CLK_DIV_78, /*!< SYSCTRL CLK DIV 78 */ 2574 SYSCTRL_CLK_DIV_79, /*!< SYSCTRL CLK DIV 79 */ 2575 SYSCTRL_CLK_DIV_80, /*!< SYSCTRL CLK DIV 80 */ 2576 SYSCTRL_CLK_DIV_81, /*!< SYSCTRL CLK DIV 81 */ 2577 SYSCTRL_CLK_DIV_82, /*!< SYSCTRL CLK DIV 82 */ 2578 SYSCTRL_CLK_DIV_83, /*!< SYSCTRL CLK DIV 83 */ 2579 SYSCTRL_CLK_DIV_84, /*!< SYSCTRL CLK DIV 84 */ 2580 SYSCTRL_CLK_DIV_85, /*!< SYSCTRL CLK DIV 85 */ 2581 SYSCTRL_CLK_DIV_86, /*!< SYSCTRL CLK DIV 86 */ 2582 SYSCTRL_CLK_DIV_87, /*!< SYSCTRL CLK DIV 87 */ 2583 SYSCTRL_CLK_DIV_88, /*!< SYSCTRL CLK DIV 88 */ 2584 SYSCTRL_CLK_DIV_89, /*!< SYSCTRL CLK DIV 89 */ 2585 SYSCTRL_CLK_DIV_90, /*!< SYSCTRL CLK DIV 90 */ 2586 SYSCTRL_CLK_DIV_91, /*!< SYSCTRL CLK DIV 91 */ 2587 SYSCTRL_CLK_DIV_92, /*!< SYSCTRL CLK DIV 92 */ 2588 SYSCTRL_CLK_DIV_93, /*!< SYSCTRL CLK DIV 93 */ 2589 SYSCTRL_CLK_DIV_94, /*!< SYSCTRL CLK DIV 94 */ 2590 SYSCTRL_CLK_DIV_95, /*!< SYSCTRL CLK DIV 95 */ 2591 SYSCTRL_CLK_DIV_96, /*!< SYSCTRL CLK DIV 96 */ 2592 SYSCTRL_CLK_DIV_97, /*!< SYSCTRL CLK DIV 97 */ 2593 SYSCTRL_CLK_DIV_98, /*!< SYSCTRL CLK DIV 98 */ 2594 SYSCTRL_CLK_DIV_99, /*!< SYSCTRL CLK DIV 99 */ 2595 SYSCTRL_CLK_DIV_100, /*!< SYSCTRL CLK DIV 100 */ 2596 SYSCTRL_CLK_DIV_101, /*!< SYSCTRL CLK DIV 101 */ 2597 SYSCTRL_CLK_DIV_102, /*!< SYSCTRL CLK DIV 102 */ 2598 SYSCTRL_CLK_DIV_103, /*!< SYSCTRL CLK DIV 103 */ 2599 SYSCTRL_CLK_DIV_104, /*!< SYSCTRL CLK DIV 104 */ 2600 SYSCTRL_CLK_DIV_105, /*!< SYSCTRL CLK DIV 105 */ 2601 SYSCTRL_CLK_DIV_106, /*!< SYSCTRL CLK DIV 106 */ 2602 SYSCTRL_CLK_DIV_107, /*!< SYSCTRL CLK DIV 107 */ 2603 SYSCTRL_CLK_DIV_108, /*!< SYSCTRL CLK DIV 108 */ 2604 SYSCTRL_CLK_DIV_109, /*!< SYSCTRL CLK DIV 109 */ 2605 SYSCTRL_CLK_DIV_110, /*!< SYSCTRL CLK DIV 110 */ 2606 SYSCTRL_CLK_DIV_111, /*!< SYSCTRL CLK DIV 111 */ 2607 SYSCTRL_CLK_DIV_112, /*!< SYSCTRL CLK DIV 112 */ 2608 SYSCTRL_CLK_DIV_113, /*!< SYSCTRL CLK DIV 113 */ 2609 SYSCTRL_CLK_DIV_114, /*!< SYSCTRL CLK DIV 114 */ 2610 SYSCTRL_CLK_DIV_115, /*!< SYSCTRL CLK DIV 115 */ 2611 SYSCTRL_CLK_DIV_116, /*!< SYSCTRL CLK DIV 116 */ 2612 SYSCTRL_CLK_DIV_117, /*!< SYSCTRL CLK DIV 117 */ 2613 SYSCTRL_CLK_DIV_118, /*!< SYSCTRL CLK DIV 118 */ 2614 SYSCTRL_CLK_DIV_119, /*!< SYSCTRL CLK DIV 119 */ 2615 SYSCTRL_CLK_DIV_120, /*!< SYSCTRL CLK DIV 120 */ 2616 SYSCTRL_CLK_DIV_121, /*!< SYSCTRL CLK DIV 121 */ 2617 SYSCTRL_CLK_DIV_122, /*!< SYSCTRL CLK DIV 122 */ 2618 SYSCTRL_CLK_DIV_123, /*!< SYSCTRL CLK DIV 123 */ 2619 SYSCTRL_CLK_DIV_124, /*!< SYSCTRL CLK DIV 124 */ 2620 SYSCTRL_CLK_DIV_125, /*!< SYSCTRL CLK DIV 125 */ 2621 SYSCTRL_CLK_DIV_126, /*!< SYSCTRL CLK DIV 126 */ 2622 SYSCTRL_CLK_DIV_127, /*!< SYSCTRL CLK DIV 127 */ 2623 SYSCTRL_CLK_DIV_128, /*!< SYSCTRL CLK DIV 128 */ 2624 SYSCTRL_CLK_DIV_129, /*!< SYSCTRL CLK DIV 129 */ 2625 SYSCTRL_CLK_DIV_130, /*!< SYSCTRL CLK DIV 130 */ 2626 SYSCTRL_CLK_DIV_131, /*!< SYSCTRL CLK DIV 131 */ 2627 SYSCTRL_CLK_DIV_132, /*!< SYSCTRL CLK DIV 132 */ 2628 SYSCTRL_CLK_DIV_133, /*!< SYSCTRL CLK DIV 133 */ 2629 SYSCTRL_CLK_DIV_134, /*!< SYSCTRL CLK DIV 134 */ 2630 SYSCTRL_CLK_DIV_135, /*!< SYSCTRL CLK DIV 135 */ 2631 SYSCTRL_CLK_DIV_136, /*!< SYSCTRL CLK DIV 136 */ 2632 SYSCTRL_CLK_DIV_137, /*!< SYSCTRL CLK DIV 137 */ 2633 SYSCTRL_CLK_DIV_138, /*!< SYSCTRL CLK DIV 138 */ 2634 SYSCTRL_CLK_DIV_139, /*!< SYSCTRL CLK DIV 139 */ 2635 SYSCTRL_CLK_DIV_140, /*!< SYSCTRL CLK DIV 140 */ 2636 SYSCTRL_CLK_DIV_141, /*!< SYSCTRL CLK DIV 141 */ 2637 SYSCTRL_CLK_DIV_142, /*!< SYSCTRL CLK DIV 142 */ 2638 SYSCTRL_CLK_DIV_143, /*!< SYSCTRL CLK DIV 143 */ 2639 SYSCTRL_CLK_DIV_144, /*!< SYSCTRL CLK DIV 144 */ 2640 SYSCTRL_CLK_DIV_145, /*!< SYSCTRL CLK DIV 145 */ 2641 SYSCTRL_CLK_DIV_146, /*!< SYSCTRL CLK DIV 146 */ 2642 SYSCTRL_CLK_DIV_147, /*!< SYSCTRL CLK DIV 147 */ 2643 SYSCTRL_CLK_DIV_148, /*!< SYSCTRL CLK DIV 148 */ 2644 SYSCTRL_CLK_DIV_149, /*!< SYSCTRL CLK DIV 149 */ 2645 SYSCTRL_CLK_DIV_150, /*!< SYSCTRL CLK DIV 150 */ 2646 SYSCTRL_CLK_DIV_151, /*!< SYSCTRL CLK DIV 151 */ 2647 SYSCTRL_CLK_DIV_152, /*!< SYSCTRL CLK DIV 152 */ 2648 SYSCTRL_CLK_DIV_153, /*!< SYSCTRL CLK DIV 153 */ 2649 SYSCTRL_CLK_DIV_154, /*!< SYSCTRL CLK DIV 154 */ 2650 SYSCTRL_CLK_DIV_155, /*!< SYSCTRL CLK DIV 155 */ 2651 SYSCTRL_CLK_DIV_156, /*!< SYSCTRL CLK DIV 156 */ 2652 SYSCTRL_CLK_DIV_157, /*!< SYSCTRL CLK DIV 157 */ 2653 SYSCTRL_CLK_DIV_158, /*!< SYSCTRL CLK DIV 158 */ 2654 SYSCTRL_CLK_DIV_159, /*!< SYSCTRL CLK DIV 159 */ 2655 SYSCTRL_CLK_DIV_160, /*!< SYSCTRL CLK DIV 160 */ 2656 SYSCTRL_CLK_DIV_161, /*!< SYSCTRL CLK DIV 161 */ 2657 SYSCTRL_CLK_DIV_162, /*!< SYSCTRL CLK DIV 162 */ 2658 SYSCTRL_CLK_DIV_163, /*!< SYSCTRL CLK DIV 163 */ 2659 SYSCTRL_CLK_DIV_164, /*!< SYSCTRL CLK DIV 164 */ 2660 SYSCTRL_CLK_DIV_165, /*!< SYSCTRL CLK DIV 165 */ 2661 SYSCTRL_CLK_DIV_166, /*!< SYSCTRL CLK DIV 166 */ 2662 SYSCTRL_CLK_DIV_167, /*!< SYSCTRL CLK DIV 167 */ 2663 SYSCTRL_CLK_DIV_168, /*!< SYSCTRL CLK DIV 168 */ 2664 SYSCTRL_CLK_DIV_169, /*!< SYSCTRL CLK DIV 169 */ 2665 SYSCTRL_CLK_DIV_170, /*!< SYSCTRL CLK DIV 170 */ 2666 SYSCTRL_CLK_DIV_171, /*!< SYSCTRL CLK DIV 171 */ 2667 SYSCTRL_CLK_DIV_172, /*!< SYSCTRL CLK DIV 172 */ 2668 SYSCTRL_CLK_DIV_173, /*!< SYSCTRL CLK DIV 173 */ 2669 SYSCTRL_CLK_DIV_174, /*!< SYSCTRL CLK DIV 174 */ 2670 SYSCTRL_CLK_DIV_175, /*!< SYSCTRL CLK DIV 175 */ 2671 SYSCTRL_CLK_DIV_176, /*!< SYSCTRL CLK DIV 176 */ 2672 SYSCTRL_CLK_DIV_177, /*!< SYSCTRL CLK DIV 177 */ 2673 SYSCTRL_CLK_DIV_178, /*!< SYSCTRL CLK DIV 178 */ 2674 SYSCTRL_CLK_DIV_179, /*!< SYSCTRL CLK DIV 179 */ 2675 SYSCTRL_CLK_DIV_180, /*!< SYSCTRL CLK DIV 180 */ 2676 SYSCTRL_CLK_DIV_181, /*!< SYSCTRL CLK DIV 181 */ 2677 SYSCTRL_CLK_DIV_182, /*!< SYSCTRL CLK DIV 182 */ 2678 SYSCTRL_CLK_DIV_183, /*!< SYSCTRL CLK DIV 183 */ 2679 SYSCTRL_CLK_DIV_184, /*!< SYSCTRL CLK DIV 184 */ 2680 SYSCTRL_CLK_DIV_185, /*!< SYSCTRL CLK DIV 185 */ 2681 SYSCTRL_CLK_DIV_186, /*!< SYSCTRL CLK DIV 186 */ 2682 SYSCTRL_CLK_DIV_187, /*!< SYSCTRL CLK DIV 187 */ 2683 SYSCTRL_CLK_DIV_188, /*!< SYSCTRL CLK DIV 188 */ 2684 SYSCTRL_CLK_DIV_189, /*!< SYSCTRL CLK DIV 189 */ 2685 SYSCTRL_CLK_DIV_190, /*!< SYSCTRL CLK DIV 190 */ 2686 SYSCTRL_CLK_DIV_191, /*!< SYSCTRL CLK DIV 191 */ 2687 SYSCTRL_CLK_DIV_192, /*!< SYSCTRL CLK DIV 192 */ 2688 SYSCTRL_CLK_DIV_193, /*!< SYSCTRL CLK DIV 193 */ 2689 SYSCTRL_CLK_DIV_194, /*!< SYSCTRL CLK DIV 194 */ 2690 SYSCTRL_CLK_DIV_195, /*!< SYSCTRL CLK DIV 195 */ 2691 SYSCTRL_CLK_DIV_196, /*!< SYSCTRL CLK DIV 196 */ 2692 SYSCTRL_CLK_DIV_197, /*!< SYSCTRL CLK DIV 197 */ 2693 SYSCTRL_CLK_DIV_198, /*!< SYSCTRL CLK DIV 198 */ 2694 SYSCTRL_CLK_DIV_199, /*!< SYSCTRL CLK DIV 199 */ 2695 SYSCTRL_CLK_DIV_200, /*!< SYSCTRL CLK DIV 200 */ 2696 SYSCTRL_CLK_DIV_201, /*!< SYSCTRL CLK DIV 201 */ 2697 SYSCTRL_CLK_DIV_202, /*!< SYSCTRL CLK DIV 202 */ 2698 SYSCTRL_CLK_DIV_203, /*!< SYSCTRL CLK DIV 203 */ 2699 SYSCTRL_CLK_DIV_204, /*!< SYSCTRL CLK DIV 204 */ 2700 SYSCTRL_CLK_DIV_205, /*!< SYSCTRL CLK DIV 205 */ 2701 SYSCTRL_CLK_DIV_206, /*!< SYSCTRL CLK DIV 206 */ 2702 SYSCTRL_CLK_DIV_207, /*!< SYSCTRL CLK DIV 207 */ 2703 SYSCTRL_CLK_DIV_208, /*!< SYSCTRL CLK DIV 208 */ 2704 SYSCTRL_CLK_DIV_209, /*!< SYSCTRL CLK DIV 209 */ 2705 SYSCTRL_CLK_DIV_210, /*!< SYSCTRL CLK DIV 210 */ 2706 SYSCTRL_CLK_DIV_211, /*!< SYSCTRL CLK DIV 211 */ 2707 SYSCTRL_CLK_DIV_212, /*!< SYSCTRL CLK DIV 212 */ 2708 SYSCTRL_CLK_DIV_213, /*!< SYSCTRL CLK DIV 213 */ 2709 SYSCTRL_CLK_DIV_214, /*!< SYSCTRL CLK DIV 214 */ 2710 SYSCTRL_CLK_DIV_215, /*!< SYSCTRL CLK DIV 215 */ 2711 SYSCTRL_CLK_DIV_216, /*!< SYSCTRL CLK DIV 216 */ 2712 SYSCTRL_CLK_DIV_217, /*!< SYSCTRL CLK DIV 217 */ 2713 SYSCTRL_CLK_DIV_218, /*!< SYSCTRL CLK DIV 218 */ 2714 SYSCTRL_CLK_DIV_219, /*!< SYSCTRL CLK DIV 219 */ 2715 SYSCTRL_CLK_DIV_220, /*!< SYSCTRL CLK DIV 220 */ 2716 SYSCTRL_CLK_DIV_221, /*!< SYSCTRL CLK DIV 221 */ 2717 SYSCTRL_CLK_DIV_222, /*!< SYSCTRL CLK DIV 222 */ 2718 SYSCTRL_CLK_DIV_223, /*!< SYSCTRL CLK DIV 223 */ 2719 SYSCTRL_CLK_DIV_224, /*!< SYSCTRL CLK DIV 224 */ 2720 SYSCTRL_CLK_DIV_225, /*!< SYSCTRL CLK DIV 225 */ 2721 SYSCTRL_CLK_DIV_226, /*!< SYSCTRL CLK DIV 226 */ 2722 SYSCTRL_CLK_DIV_227, /*!< SYSCTRL CLK DIV 227 */ 2723 SYSCTRL_CLK_DIV_228, /*!< SYSCTRL CLK DIV 228 */ 2724 SYSCTRL_CLK_DIV_229, /*!< SYSCTRL CLK DIV 229 */ 2725 SYSCTRL_CLK_DIV_230, /*!< SYSCTRL CLK DIV 230 */ 2726 SYSCTRL_CLK_DIV_231, /*!< SYSCTRL CLK DIV 231 */ 2727 SYSCTRL_CLK_DIV_232, /*!< SYSCTRL CLK DIV 232 */ 2728 SYSCTRL_CLK_DIV_233, /*!< SYSCTRL CLK DIV 233 */ 2729 SYSCTRL_CLK_DIV_234, /*!< SYSCTRL CLK DIV 234 */ 2730 SYSCTRL_CLK_DIV_235, /*!< SYSCTRL CLK DIV 235 */ 2731 SYSCTRL_CLK_DIV_236, /*!< SYSCTRL CLK DIV 236 */ 2732 SYSCTRL_CLK_DIV_237, /*!< SYSCTRL CLK DIV 237 */ 2733 SYSCTRL_CLK_DIV_238, /*!< SYSCTRL CLK DIV 238 */ 2734 SYSCTRL_CLK_DIV_239, /*!< SYSCTRL CLK DIV 239 */ 2735 SYSCTRL_CLK_DIV_240, /*!< SYSCTRL CLK DIV 240 */ 2736 SYSCTRL_CLK_DIV_241, /*!< SYSCTRL CLK DIV 241 */ 2737 SYSCTRL_CLK_DIV_242, /*!< SYSCTRL CLK DIV 242 */ 2738 SYSCTRL_CLK_DIV_243, /*!< SYSCTRL CLK DIV 243 */ 2739 SYSCTRL_CLK_DIV_244, /*!< SYSCTRL CLK DIV 244 */ 2740 SYSCTRL_CLK_DIV_245, /*!< SYSCTRL CLK DIV 245 */ 2741 SYSCTRL_CLK_DIV_246, /*!< SYSCTRL CLK DIV 246 */ 2742 SYSCTRL_CLK_DIV_247, /*!< SYSCTRL CLK DIV 247 */ 2743 SYSCTRL_CLK_DIV_248, /*!< SYSCTRL CLK DIV 248 */ 2744 SYSCTRL_CLK_DIV_249, /*!< SYSCTRL CLK DIV 249 */ 2745 SYSCTRL_CLK_DIV_250, /*!< SYSCTRL CLK DIV 250 */ 2746 SYSCTRL_CLK_DIV_251, /*!< SYSCTRL CLK DIV 251 */ 2747 SYSCTRL_CLK_DIV_252, /*!< SYSCTRL CLK DIV 252 */ 2748 SYSCTRL_CLK_DIV_253, /*!< SYSCTRL CLK DIV 253 */ 2749 SYSCTRL_CLK_DIV_254, /*!< SYSCTRL CLK DIV 254 */ 2750 SYSCTRL_CLK_DIV_255, /*!< SYSCTRL CLK DIV 255 */ 2751 SYSCTRL_CLK_DIV_256, /*!< SYSCTRL CLK DIV 256 */ 2752 } SYSCTRL_ClkDivETypeDef; 2753 2754 /** 2755 * @brief SYSCTRL SYSCLK Source Definition 2756 */ 2757 typedef enum { 2758 SYSCLK_SRC_RC32K = 0, /*!< SYSCLK Source RC32K */ 2759 SYSCLK_SRC_RC8M = 1, /*!< SYSCLK Source RC8M */ 2760 SYSCLK_SRC_PLL0DivClk = 2, /*!< SYSCLK Source PLL0 Div Clk */ 2761 SYSCLK_SRC_HOSC = 3, /*!< SYSCLK Source HOSC */ 2762 } SYSCTRL_SysclkSrcETypeDef; 2763 2764 /** 2765 * @brief SYSCTRL GPIOA Debounce Clock Source Definition 2766 */ 2767 typedef enum { 2768 GPIOA_DBC_CLK_SRC_RC8M = SYSCTRL_GPIOA_DBCCLK_SRC_RC8M, /*!< GPIOA DBC CLK Source RC8M */ 2769 GPIOA_DBC_CLK_SRC_XOSC = SYSCTRL_GPIOA_DBCCLK_SRC_XOSC, /*!< GPIOA DBC CLK Source XOSC */ 2770 GPIOA_DBC_CLK_SRC_SYSCLK = SYSCTRL_GPIOA_DBCCLK_SRC_SYSCLK, /*!< GPIOA DBC CLK Source SYSCLK */ 2771 GPIOA_DBC_CLK_SRC_RC32K = SYSCTRL_GPIOA_DBCCLK_SRC_RC32K, /*!< GPIOA DBC CLK Source RC32K */ 2772 } SYSCTRL_GPIOADbcClkSrcETypeDef; 2773 2774 /** 2775 * @brief SYSCTRL GPIOB Debounce Clock Source Definition 2776 */ 2777 typedef enum { 2778 GPIOB_DBC_CLK_SRC_RC8M = SYSCTRL_GPIOB_DBCCLK_SRC_RC8M, /*!< GPIOB DBC CLK Source RC8M */ 2779 GPIOB_DBC_CLK_SRC_XOSC = SYSCTRL_GPIOB_DBCCLK_SRC_XOSC, /*!< GPIOB DBC CLK Source XOSC */ 2780 GPIOB_DBC_CLK_SRC_SYSCLK = SYSCTRL_GPIOB_DBCCLK_SRC_SYSCLK, /*!< GPIOB DBC CLK Source SYSCLK */ 2781 GPIOB_DBC_CLK_SRC_RC32K = SYSCTRL_GPIOB_DBCCLK_SRC_RC32K, /*!< GPIOB DBC CLK Source RC32K */ 2782 } SYSCTRL_GPIOBDbcClkSrcETypeDef; 2783 2784 /** 2785 * @brief SYSCTRL GPIOC Debounce Clock Source Definition 2786 */ 2787 typedef enum { 2788 GPIOC_DBC_CLK_SRC_RC8M = SYSCTRL_GPIOC_DBCCLK_SRC_RC8M, /*!< GPIOC DBC CLK Source RC8M */ 2789 GPIOC_DBC_CLK_SRC_XOSC = SYSCTRL_GPIOC_DBCCLK_SRC_XOSC, /*!< GPIOC DBC CLK Source XOSC */ 2790 GPIOC_DBC_CLK_SRC_SYSCLK = SYSCTRL_GPIOC_DBCCLK_SRC_SYSCLK, /*!< GPIOC DBC CLK Source SYSCLK */ 2791 GPIOC_DBC_CLK_SRC_RC32K = SYSCTRL_GPIOC_DBCCLK_SRC_RC32K, /*!< GPIOC DBC CLK Source RC32K */ 2792 } SYSCTRL_GPIOCDbcClkSrcETypeDef; 2793 2794 /** 2795 * @brief SYSCTRL GPIOD Debounce Clock Source Definition 2796 */ 2797 typedef enum { 2798 GPIOD_DBC_CLK_SRC_RC8M = SYSCTRL_GPIOD_DBCCLK_SRC_RC8M, /*!< GPIOD DBC CLK Source RC8M */ 2799 GPIOD_DBC_CLK_SRC_XOSC = SYSCTRL_GPIOD_DBCCLK_SRC_XOSC, /*!< GPIOD DBC CLK Source XOSC */ 2800 GPIOD_DBC_CLK_SRC_SYSCLK = SYSCTRL_GPIOD_DBCCLK_SRC_SYSCLK, /*!< GPIOD DBC CLK Source SYSCLK */ 2801 GPIOD_DBC_CLK_SRC_RC32K = SYSCTRL_GPIOD_DBCCLK_SRC_RC32K, /*!< GPIOD DBC CLK Source RC32K */ 2802 } SYSCTRL_GPIODDbcClkSrcETypeDef; 2803 2804 /** 2805 * @brief SYSCTRL Dflash Clock Source Definition 2806 */ 2807 typedef enum { 2808 DFLASH_CLK_SRC_RC8M = SYSCTRL_DFLASH_MEMCLK_SRC_RC8M, /*!< Dflash CLK Source RC8M */ 2809 DFLASH_CLK_SRC_PLL0DivClk = SYSCTRL_DFLASH_MEMCLK_SRC_PLL0DivClk, /*!< Dflash CLK Source PLL0 Div Clk */ 2810 DFLASH_CLK_SRC_PLL1DivClk = SYSCTRL_DFLASH_MEMCLK_SRC_PLL1DivClk, /*!< Dflash CLK Source PLL1 Div Clk */ 2811 DFLASH_CLK_SRC_PLL2DivClk = SYSCTRL_DFLASH_MEMCLK_SRC_PLL2DivClk, /*!< Dflash CLK Source PLL2 Div Clk */ 2812 } SYSCTRL_DflashClkSrcETypeDef; 2813 2814 /** 2815 * @brief SYSCTRL Eflash Clock Source Definition 2816 */ 2817 typedef enum { 2818 EFLASH_CLK_SRC_RC8M = SYSCTRL_EFLASH_MEMCLK_SRC_RC8M, /*!< Eflash CLK Source RC8M */ 2819 EFLASH_CLK_SRC_PLL0DivClk = SYSCTRL_EFLASH_MEMCLK_SRC_PLL0DivClk, /*!< Eflash CLK Source PLL0 Div Clk */ 2820 EFLASH_CLK_SRC_PLL1DivClk = SYSCTRL_EFLASH_MEMCLK_SRC_PLL1DivClk, /*!< Eflash CLK Source PLL1 Div Clk */ 2821 EFLASH_CLK_SRC_PLL2DivClk = SYSCTRL_EFLASH_MEMCLK_SRC_PLL2DivClk, /*!< Eflash CLK Source PLL2 Div Clk */ 2822 } SYSCTRL_EflashClkSrcETypeDef; 2823 2824 /** 2825 * @brief SYSCTRL ADC Function Clock Source Definition 2826 */ 2827 typedef enum { 2828 ADC_FUNC_CLK_SRC_RC8M = SYSCTRL_ADC_FUNCLK_SRC_RC8M, /*!< ADC Function CLK Source RC8M */ 2829 ADC_FUNC_CLK_SRC_HOSC = SYSCTRL_ADC_FUNCLK_SRC_HOSC, /*!< ADC Function CLK Source HOSC */ 2830 ADC_FUNC_CLK_SRC_PLL0 = SYSCTRL_ADC_FUNCLK_SRC_PLL0, /*!< ADC Function CLK Source PLL0 */ 2831 ADC_FUNC_CLK_SRC_PLL1 = SYSCTRL_ADC_FUNCLK_SRC_PLL1, /*!< ADC Function CLK Source PLL1 */ 2832 } SYSCTRL_ADCFuncClkSrcETypeDef; 2833 2834 /** 2835 * @brief SYSCTRL HRPWM Function Clock Source Definition 2836 */ 2837 typedef enum { 2838 HRPWM_FUNC_CLK_SRC_RC8M = SYSCTRL_HRPWM_FUNCLK_SRC_RC8M, /*!< HRPWM Function CLK Source RC8M */ 2839 HRPWM_FUNC_CLK_SRC_HOSC = SYSCTRL_HRPWM_FUNCLK_SRC_HOSC, /*!< HRPWM Function CLK Source HOSC */ 2840 HRPWM_FUNC_CLK_SRC_PLL0 = SYSCTRL_HRPWM_FUNCLK_SRC_PLL0, /*!< HRPWM Function CLK Source PLL0 */ 2841 HRPWM_FUNC_CLK_SRC_PLL1 = SYSCTRL_HRPWM_FUNCLK_SRC_PLL1, /*!< HRPWM Function CLK Source PLL1 */ 2842 } SYSCTRL_HRPWMFuncClkSrcETypeDef; 2843 2844 /** 2845 * @brief SYSCTRL PLLCLK Source Definition 2846 */ 2847 typedef enum { 2848 PLLCLK_SRC_XOSC = 0, /*!< PLLCLK Source XOSC */ 2849 PLLCLK_SRC_RC8M = 1, /*!< PLLCLK Source RC8M */ 2850 PLLCLK_SRC_DFT = 3, /*!< PLLCLK Source DFT */ 2851 } SYSCTRL_PllClkSrcETypeDef; 2852 2853 /** 2854 * @brief SYSCTRL SYSCLK Config Definition 2855 */ 2856 typedef struct __SYSCTRL_SysclkUserCfgTypeDef { 2857 SYSCTRL_SysclkSrcETypeDef sysclk_src; /*!< SYSCLK Source */ 2858 SYSCTRL_PllClkSrcETypeDef pll0clk_src; /*!< PLLCLK Source */ 2859 uint32_t sysclk_src_freq; /*!< SYSCLK Source Freq */ 2860 uint32_t pll0clk_src_freq; /*!< PLLCLK Source Freq */ 2861 uint32_t sysclk_freq; /*!< SYSCLK Freq */ 2862 SYSCTRL_ClkDivETypeDef apb0_clk_div; /*!< APB0 clock Div */ 2863 SYSCTRL_ClkDivETypeDef apb1_clk_div; /*!< APB1 clock Div */ 2864 } SYSCTRL_SysclkUserCfgTypeDef; 2865 2866 /** 2867 * @brief SYSCTRL PLL1/2 Config Definition 2868 */ 2869 typedef struct __SYSCTRL_PLLUserCfgTypeDef { 2870 SYSCTRL_PllClkSrcETypeDef pll_clk_src; /*!< PLLCLK Source */ 2871 uint32_t pll_in_freq; /*!< PLLCLK Input Freq */ 2872 uint32_t pll_user_freq; /*!< PLLCLK User Freq */ 2873 } SYSCTRL_PLLUserCfgTypeDef; 2874 2875 /** 2876 * @} 2877 */ 2878 2879 2880 /* Exported functions --------------------------------------------------------*/ 2881 /** @defgroup SYSCTRL_LL_Exported_Functions SYSCTRL LL Exported Functions 2882 * @brief SYSCTRL LL Exported Functions 2883 * @{ 2884 */ 2885 2886 /** @addtogroup SYSCTRL_LL_Exported_Functions_Group1 2887 * @{ 2888 */ 2889 LL_StatusETypeDef LL_SYSCTRL_SysclkInit(SYSCTRL_TypeDef *Instance, SYSCTRL_SysclkUserCfgTypeDef *sysclk_cfg); 2890 LL_StatusETypeDef LL_SYSCTRL_GPIOA_DbcClkCfg(SYSCTRL_GPIOADbcClkSrcETypeDef src, SYSCTRL_ClkDivETypeDef div); 2891 LL_StatusETypeDef LL_SYSCTRL_GPIOB_DbcClkCfg(SYSCTRL_GPIOBDbcClkSrcETypeDef src, SYSCTRL_ClkDivETypeDef div); 2892 LL_StatusETypeDef LL_SYSCTRL_GPIOC_DbcClkCfg(SYSCTRL_GPIOCDbcClkSrcETypeDef src, SYSCTRL_ClkDivETypeDef div); 2893 LL_StatusETypeDef LL_SYSCTRL_GPIOD_DbcClkCfg(SYSCTRL_GPIODDbcClkSrcETypeDef src, SYSCTRL_ClkDivETypeDef div); 2894 LL_StatusETypeDef LL_SYSCTRL_DFLASH_ClkCfg(SYSCTRL_DflashClkSrcETypeDef src, SYSCTRL_ClkDivETypeDef div); 2895 LL_StatusETypeDef LL_SYSCTRL_EFLASH_ClkCfg(SYSCTRL_EflashClkSrcETypeDef src, SYSCTRL_ClkDivETypeDef div); 2896 LL_StatusETypeDef LL_SYSCTRL_ADC_FuncClkCfg(SYSCTRL_ADCFuncClkSrcETypeDef src, SYSCTRL_ClkDivETypeDef div); 2897 LL_StatusETypeDef LL_SYSCTRL_HRPWM_FuncClkCfg(SYSCTRL_HRPWMFuncClkSrcETypeDef src, SYSCTRL_ClkDivETypeDef div); 2898 uint32_t LL_SYSCTRL_SysclkGet(void); 2899 uint32_t LL_SYSCTRL_AHBClkGet(void); 2900 uint32_t LL_SYSCTRL_APB0ClkGet(void); 2901 uint32_t LL_SYSCTRL_APB1ClkGet(void); 2902 /** 2903 * @} 2904 */ 2905 2906 2907 /** @addtogroup SYSCTRL_LL_Exported_Functions_Group2 2908 * @{ 2909 */ 2910 LL_StatusETypeDef LL_SYSCTRL_Pll0Cfg(SYSCTRL_TypeDef *Instance, SYSCTRL_PLLUserCfgTypeDef *pll0_cfg); 2911 LL_StatusETypeDef LL_SYSCTRL_Pll1Cfg(SYSCTRL_TypeDef *Instance, SYSCTRL_PLLUserCfgTypeDef *pll1_cfg); 2912 LL_StatusETypeDef LL_SYSCTRL_Pll2Cfg(SYSCTRL_TypeDef *Instance, SYSCTRL_PLLUserCfgTypeDef *pll2_cfg); 2913 /** 2914 * @} 2915 */ 2916 2917 2918 /** @addtogroup SYSCTRL_LL_Exported_Functions_Group3 2919 * @{ 2920 */ 2921 void LL_SYSCTRL_LSTMR_ClkEnRstRelease(void); 2922 void LL_SYSCTRL_LSTMR_ClkDisRstAssert(void); 2923 void LL_SYSCTRL_UART1_ClkEnRstRelease(void); 2924 void LL_SYSCTRL_UART1_ClkDisRstAssert(void); 2925 void LL_SYSCTRL_UART0_ClkEnRstRelease(void); 2926 void LL_SYSCTRL_UART0_ClkDisRstAssert(void); 2927 void LL_SYSCTRL_I2C1_ClkEnRstRelease(void); 2928 void LL_SYSCTRL_I2C1_ClkDisRstAssert(void); 2929 void LL_SYSCTRL_I2C0_ClkEnRstRelease(void); 2930 void LL_SYSCTRL_I2C0_ClkDisRstAssert(void); 2931 void LL_SYSCTRL_ECU_ClkEnRstRelease(void); 2932 void LL_SYSCTRL_ECU_ClkDisRstAssert(void); 2933 void LL_SYSCTRL_IIR4_ClkEnRstRelease(void); 2934 void LL_SYSCTRL_IIR4_ClkDisRstAssert(void); 2935 void LL_SYSCTRL_IIR3_ClkEnRstRelease(void); 2936 void LL_SYSCTRL_IIR3_ClkDisRstAssert(void); 2937 void LL_SYSCTRL_IIR2_ClkEnRstRelease(void); 2938 void LL_SYSCTRL_IIR2_ClkDisRstAssert(void); 2939 void LL_SYSCTRL_IIR1_ClkEnRstRelease(void); 2940 void LL_SYSCTRL_IIR1_ClkDisRstAssert(void); 2941 void LL_SYSCTRL_IIR0_ClkEnRstRelease(void); 2942 void LL_SYSCTRL_IIR0_ClkDisRstAssert(void); 2943 void LL_SYSCTRL_DALI_ClkEnRstRelease(void); 2944 void LL_SYSCTRL_DALI_ClkDisRstAssert(void); 2945 void LL_SYSCTRL_FPLL2_RstRelease(void); 2946 void LL_SYSCTRL_FPLL2_RstAssert(void); 2947 void LL_SYSCTRL_FPLL1_RstRelease(void); 2948 void LL_SYSCTRL_FPLL1_RstAssert(void); 2949 void LL_SYSCTRL_FPLL0_RstRelease(void); 2950 void LL_SYSCTRL_FPLL0_RstAssert(void); 2951 void LL_SYSCTRL_USB_ClkEnRstRelease(void); 2952 void LL_SYSCTRL_USB_ClkDisRstAssert(void); 2953 void LL_SYSCTRL_DFLASH_ClkEnRstRelease(void); 2954 void LL_SYSCTRL_DFLASH_ClkDisRstAssert(void); 2955 void LL_SYSCTRL_EFLASH_ClkEnRstRelease(void); 2956 void LL_SYSCTRL_EFLASH_ClkDisRstAssert(void); 2957 void LL_SYSCTRL_HRPWM_ClkEnRstRelease(void); 2958 void LL_SYSCTRL_HRPWM_ClkDisRstAssert(void); 2959 void LL_SYSCTRL_ADC_ClkEnRstRelease(void); 2960 void LL_SYSCTRL_ADC_ClkDisRstAssert(void); 2961 void LL_SYSCTRL_DAC_ClkEnRstRelease(void); 2962 void LL_SYSCTRL_DAC_ClkDisRstAssert(void); 2963 void LL_SYSCTRL_CMP_ClkEnRstRelease(void); 2964 void LL_SYSCTRL_CMP_ClkDisRstAssert(void); 2965 void LL_SYSCTRL_GPIOD_ClkEnRstRelease(void); 2966 void LL_SYSCTRL_GPIOD_ClkDisRstAssert(void); 2967 void LL_SYSCTRL_GPIOC_ClkEnRstRelease(void); 2968 void LL_SYSCTRL_GPIOC_ClkDisRstAssert(void); 2969 void LL_SYSCTRL_GPIOB_ClkEnRstRelease(void); 2970 void LL_SYSCTRL_GPIOB_ClkDisRstAssert(void); 2971 void LL_SYSCTRL_GPIOA_ClkEnRstRelease(void); 2972 void LL_SYSCTRL_GPIOA_ClkDisRstAssert(void); 2973 void LL_SYSCTRL_HSTMR_ClkEnRstRelease(void); 2974 void LL_SYSCTRL_HSTMR_ClkDisRstAssert(void); 2975 void LL_SYSCTRL_CAN_ClkEnRstRelease(void); 2976 void LL_SYSCTRL_CAN_ClkDisRstAssert(void); 2977 void LL_SYSCTRL_DMA_ClkEnRstRelease(void); 2978 void LL_SYSCTRL_DMA_ClkDisRstAssert(void); 2979 2980 void LL_SYSCTRL_AllPeriphRstAssert(void); 2981 void LL_SYSCTRL_AllPeriphRstRelease(void); 2982 /** 2983 * @} 2984 */ 2985 2986 2987 /** @addtogroup SYSCTRL_LL_Exported_Functions_Group4 2988 * @{ 2989 */ 2990 void LL_SYSCTRL_PMUCfg(void); 2991 /** 2992 * @} 2993 */ 2994 2995 /** 2996 * @} 2997 */ 2998 2999 3000 /* Private types -------------------------------------------------------------*/ 3001 /* Private variables ---------------------------------------------------------*/ 3002 /* Private constants ---------------------------------------------------------*/ 3003 /* Private macros ------------------------------------------------------------*/ 3004 /* Private functions ---------------------------------------------------------*/ 3005 3006 3007 /** 3008 * @} 3009 */ 3010 3011 /** 3012 * @} 3013 */ 3014 3015 3016 #ifdef __cplusplus 3017 } 3018 #endif /* __cplusplus */ 3019 3020 3021 #endif /* _TAE32F53XX_LL_SYSCTRL_H_ */ 3022 3023 3024 /************************* (C) COPYRIGHT Tai-Action *****END OF FILE***********/ 3025 3026