1 /** 2 ********************************************************************************* 3 * 4 * @file ald_pmu.h 5 * @brief Header file of PMU module driver. 6 * 7 * @version V1.0 8 * @date 08 Mar. 2023 9 * @author AE Team 10 * @note 11 * Change Logs: 12 * Date Author Notes 13 * 08 Mar. 2023 Lisq The first version 14 * 15 * Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved. 16 * 17 * SPDX-License-Identifier: Apache-2.0 18 * 19 * Licensed under the Apache License, Version 2.0 (the License); you may 20 * not use this file except in compliance with the License. 21 * You may obtain a copy of the License at 22 * 23 * www.apache.org/licenses/LICENSE-2.0 24 * 25 * Unless required by applicable law or agreed to in writing, software 26 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 27 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 28 * See the License for the specific language governing permissions and 29 * limitations under the License. 30 ********************************************************************************** 31 */ 32 33 #ifndef __ALD_PMU_H__ 34 #define __ALD_PMU_H__ 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif /* __cplusplus */ 39 40 #include "ald_utils.h" 41 #include "ald_syscfg.h" 42 43 /** @addtogroup ES32VF2264_ALD 44 * @{ 45 */ 46 47 /** @addtogroup PMU 48 * @{ 49 */ 50 51 /** @defgroup PMU_Public_Macros PMU Public Macros 52 * @{ 53 */ 54 #define ALD_PMU_LPSTOP_ENABLE() \ 55 do { \ 56 SYSCFG_UNLOCK(); \ 57 SET_BIT(PMU->CR, PMU_CR_LPSTOP_MSK); \ 58 SYSCFG_LOCK(); \ 59 } while (0) 60 #define ALD_PMU_LPSTOP_DISABLE() \ 61 do { \ 62 SYSCFG_UNLOCK(); \ 63 CLEAR_BIT(PMU->CR, PMU_CR_LPSTOP_MSK); \ 64 SYSCFG_LOCK(); \ 65 } while (0) 66 #define ALD_PMU_FLASH_STOP_DISABLE() \ 67 do { \ 68 SYSCFG_UNLOCK(); \ 69 CLEAR_BIT(PMU->CR, PMU_CR_FSTOP_MSK); \ 70 SYSCFG_LOCK(); \ 71 } while (0) 72 #define ALD_PMU_FLASH_STOP_ENABLE() \ 73 do { \ 74 SYSCFG_UNLOCK(); \ 75 SET_BIT(PMU->CR, PMU_CR_FSTOP_MSK); \ 76 SYSCFG_LOCK(); \ 77 } while (0) 78 #define ALD_PMU_BGSTOP_ENABLE() \ 79 do { \ 80 SYSCFG_UNLOCK(); \ 81 SET_BIT(PMU->CR, PMU_CR_BGSTOP_MSK); \ 82 SYSCFG_LOCK(); \ 83 } while (0) 84 #define ALD_PMU_BGSTOP_DISABLE() \ 85 do { \ 86 SYSCFG_UNLOCK(); \ 87 CLEAR_BIT(PMU->CR, PMU_CR_BGSTOP_MSK); \ 88 SYSCFG_LOCK(); \ 89 } while (0) 90 #define ALD_PMU_VROSCEN_ENABLE() \ 91 do { \ 92 SYSCFG_UNLOCK(); \ 93 SET_BIT(PMU->CR, PMU_CR_VROSCEN_MSK); \ 94 SYSCFG_LOCK(); \ 95 } while (0) 96 #define ALD_PMU_VROSCEN_DISABLE() \ 97 do { \ 98 SYSCFG_UNLOCK(); \ 99 CLEAR_BIT(PMU->CR, PMU_CR_VROSCEN_MSK); \ 100 SYSCFG_LOCK(); \ 101 } while (0) 102 #define ALD_PMU_STPRTNEN_ENABLE() \ 103 do { \ 104 SYSCFG_UNLOCK(); \ 105 SET_BIT(PMU->CR, PMU_CR_STPRTNEN_MSK); \ 106 SYSCFG_LOCK(); \ 107 } while (0) 108 #define ALD_PMU_STPRTNEN_DISABLE() \ 109 do { \ 110 SYSCFG_UNLOCK(); \ 111 CLEAR_BIT(PMU->CR, PMU_CR_STPRTNEN_MSK); \ 112 SYSCFG_LOCK(); \ 113 } while (0) 114 115 #define ALD_PMU_GET_LVD_STATUS() (READ_BITS(PMU->LVDCR, PMU_LVDCR_LVDO_MSK, PMU_LVDCR_LVDO_POS)) 116 /** 117 * @} 118 */ 119 120 121 /** @defgroup PMU_Public_Types PMU Public Types 122 * @{ 123 */ 124 /** 125 * @brief Low power mode 126 */ 127 typedef enum { 128 ALD_PMU_LP_STOP = 0x0U, /**< Stop */ 129 } ald_pmu_lp_mode_t; 130 131 typedef enum { 132 ALD_PMU_SR_WUF = (1U << 0), /**< WakeUp status */ 133 } ald_pmu_status_t; 134 135 /** 136 * @brief LVD voltage select 137 */ 138 typedef enum { 139 ALD_PMU_LVD_VOL_SEL_2_2 = 0x0U, /**< 2.2V */ 140 ALD_PMU_LVD_VOL_SEL_2_4 = 0x1U, /**< 2.4V */ 141 ALD_PMU_LVD_VOL_SEL_2_6 = 0x2U, /**< 2.6V */ 142 ALD_PMU_LVD_VOL_SEL_2_8 = 0x3U, /**< 2.8V */ 143 ALD_PMU_LVD_VOL_SEL_3_0 = 0x4U, /**< 3.0V */ 144 ALD_PMU_LVD_VOL_SEL_3_6 = 0x5U, /**< 3.6V */ 145 ALD_PMU_LVD_VOL_SEL_4_0 = 0x6U, /**< 4.0V */ 146 ALD_PMU_LVD_VOL_SEL_4_6 = 0x7U, /**< 4.6V */ 147 } ald_pmu_lvd_voltage_sel_t; 148 149 /** 150 * @brief LVD trigger mode 151 */ 152 typedef enum { 153 ALD_PMU_LVD_TRIGGER_RISING_EDGE = 0x0U, /**< Rising edge */ 154 ALD_PMU_LVD_TRIGGER_FALLING_EDGE = 0x1U, /**< Falling edge */ 155 ALD_PMU_LVD_TRIGGER_HIGH_LEVEL = 0x2U, /**< High level */ 156 ALD_PMU_LVD_TRIGGER_LOW_LEVEL = 0x3U, /**< Low level */ 157 ALD_PMU_LVD_TRIGGER_RISING_FALLING = 0x4U, /**< Rising and falling edge */ 158 } ald_pmu_lvd_trigger_mode_t; 159 160 /** 161 * @} 162 */ 163 164 /** 165 * @defgroup PMU_Private_Macros PMU Private Macros 166 * @{ 167 */ 168 #define IS_PMU_LP_MODE(x) (((x) == ALD_PMU_LP_STOP)) 169 #define IS_PMU_STATUS(x) (((x) == ALD_PMU_SR_WUF)) 170 #define IS_PMU_LVD_VOL_SEL(x) (((x) == ALD_PMU_LVD_VOL_SEL_2_2) || \ 171 ((x) == ALD_PMU_LVD_VOL_SEL_2_4) || \ 172 ((x) == ALD_PMU_LVD_VOL_SEL_2_6) || \ 173 ((x) == ALD_PMU_LVD_VOL_SEL_2_8) || \ 174 ((x) == ALD_PMU_LVD_VOL_SEL_3_0) || \ 175 ((x) == ALD_PMU_LVD_VOL_SEL_3_6) || \ 176 ((x) == ALD_PMU_LVD_VOL_SEL_4_0) || \ 177 ((x) == ALD_PMU_LVD_VOL_SEL_4_6)) 178 #define IS_PMU_LVD_TRIGGER_MODE(x) (((x) == ALD_PMU_LVD_TRIGGER_RISING_EDGE) || \ 179 ((x) == ALD_PMU_LVD_TRIGGER_FALLING_EDGE) || \ 180 ((x) == ALD_PMU_LVD_TRIGGER_HIGH_LEVEL) || \ 181 ((x) == ALD_PMU_LVD_TRIGGER_LOW_LEVEL) || \ 182 ((x) == ALD_PMU_LVD_TRIGGER_RISING_FALLING)) 183 /** 184 * @} 185 */ 186 187 /** @addtogroup PMU_Public_Functions 188 * @{ 189 */ 190 void ald_pmu_sleep_enter(void); 191 void ald_pmu_stop_enter(void); 192 193 flag_status_t ald_pmu_get_status(ald_pmu_status_t sr); 194 void ald_pmu_clear_status(ald_pmu_status_t sr); 195 /** 196 * @} 197 */ 198 /** @addtogroup PMU_Public_Functions_Group2 199 * @{ 200 */ 201 /* LVD configure */ 202 void ald_pmu_lvd_config(ald_pmu_lvd_voltage_sel_t sel, ald_pmu_lvd_trigger_mode_t mode, type_func_t state); 203 void ald_lvd_irq_handler(void); 204 /** 205 * @} 206 */ 207 /** 208 * @} 209 */ 210 211 /** 212 * @} 213 */ 214 215 /** 216 * @} 217 */ 218 #ifdef __cplusplus 219 } 220 #endif /* __cplusplus */ 221 222 #endif /* __ALD_PMU_H__ */ 223