1 //***************************************************************************** 2 // 3 // am_hal_pdm.h 4 //! @file 5 //! 6 //! @brief Functions for accessing and configuring the PDM module 7 //! 8 //! @addtogroup pdm2 Pulse Density Modulation (PDM) Input Module. 9 //! @ingroup apollo2hal 10 //! @{ 11 12 //***************************************************************************** 13 14 //***************************************************************************** 15 // 16 // Copyright (c) 2017, Ambiq Micro 17 // All rights reserved. 18 // 19 // Redistribution and use in source and binary forms, with or without 20 // modification, are permitted provided that the following conditions are met: 21 // 22 // 1. Redistributions of source code must retain the above copyright notice, 23 // this list of conditions and the following disclaimer. 24 // 25 // 2. Redistributions in binary form must reproduce the above copyright 26 // notice, this list of conditions and the following disclaimer in the 27 // documentation and/or other materials provided with the distribution. 28 // 29 // 3. Neither the name of the copyright holder nor the names of its 30 // contributors may be used to endorse or promote products derived from this 31 // software without specific prior written permission. 32 // 33 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 34 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 35 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 36 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 37 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 38 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 39 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 40 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 41 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 42 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 43 // POSSIBILITY OF SUCH DAMAGE. 44 // 45 // This is part of revision 1.2.11 of the AmbiqSuite Development Package. 46 // 47 //***************************************************************************** 48 49 #ifndef AM_HAL_PDM_H 50 #define AM_HAL_PDM_H 51 52 #ifdef __cplusplus 53 extern "C" 54 { 55 #endif 56 57 //***************************************************************************** 58 // 59 // Macro definitions 60 // 61 //***************************************************************************** 62 63 //***************************************************************************** 64 // 65 //! @name PDM Left Right Swap Control 66 //! @brief Macro definitions for the PDM LRSWAP bit field 67 //! 68 //! These macros may be used with the am_hal_pdm_config_t structure to set the 69 //! left right swap bit. 70 //! 71 //! @{ 72 // 73 //***************************************************************************** 74 #define AM_HAL_PDM_PCFG_LRSWAP_ENABLE \ 75 AM_REG_PDM_PCFG_LRSWAP_EN 76 #define AM_HAL_PDM_PCFG_LRSWAP_DISABLE \ 77 AM_REG_PDM_PCFG_LRSWAP_NOSWAP 78 //! @} 79 80 //***************************************************************************** 81 // 82 //! @name PDM Right Gain Setting 83 //! @brief Macro definitions for the PDM Right Gain Setting. 84 //! 85 //! These macros may be used with the am_hal_pdm_config_t structure to set the 86 //! right gain value. 87 //! 88 //! @{ 89 // 90 //***************************************************************************** 91 #define AM_HAL_PDM_PCFG_RIGHT_PGA_M15DB AM_REG_PDM_PCFG_PGARIGHT_M15DB 92 #define AM_HAL_PDM_PCFG_RIGHT_PGA_M300DB AM_REG_PDM_PCFG_PGARIGHT_M300DB 93 #define AM_HAL_PDM_PCFG_RIGHT_PGA_M45DB AM_REG_PDM_PCFG_PGARIGHT_M45DB 94 #define AM_HAL_PDM_PCFG_RIGHT_PGA_M60DB AM_REG_PDM_PCFG_PGARIGHT_M60DB 95 #define AM_HAL_PDM_PCFG_RIGHT_PGA_M75DB AM_REG_PDM_PCFG_PGARIGHT_M75DB 96 #define AM_HAL_PDM_PCFG_RIGHT_PGA_M90DB AM_REG_PDM_PCFG_PGARIGHT_M90DB 97 #define AM_HAL_PDM_PCFG_RIGHT_PGA_M105DB AM_REG_PDM_PCFG_PGARIGHT_M105DB 98 #define AM_HAL_PDM_PCFG_RIGHT_PGA_M120DB AM_REG_PDM_PCFG_PGARIGHT_M120DB 99 #define AM_HAL_PDM_PCFG_RIGHT_PGA_P105DB AM_REG_PDM_PCFG_PGARIGHT_P105DB 100 #define AM_HAL_PDM_PCFG_RIGHT_PGA_P90DB AM_REG_PDM_PCFG_PGARIGHT_P90DB 101 #define AM_HAL_PDM_PCFG_RIGHT_PGA_P75DB AM_REG_PDM_PCFG_PGARIGHT_P75DB 102 #define AM_HAL_PDM_PCFG_RIGHT_PGA_P60DB AM_REG_PDM_PCFG_PGARIGHT_P60DB 103 #define AM_HAL_PDM_PCFG_RIGHT_PGA_P45DB AM_REG_PDM_PCFG_PGARIGHT_P45DB 104 #define AM_HAL_PDM_PCFG_RIGHT_PGA_P300DB AM_REG_PDM_PCFG_PGARIGHT_P300DB 105 #define AM_HAL_PDM_PCFG_RIGHT_PGA_P15DB AM_REG_PDM_PCFG_PGARIGHT_P15DB 106 #define AM_HAL_PDM_PCFG_RIGHT_PGA_0DB AM_REG_PDM_PCFG_PGARIGHT_0DB 107 //! @} 108 109 //***************************************************************************** 110 // 111 //! @name PDM Left Gain Setting 112 //! @brief Macro definitions for the PDM Left Gain Setting. 113 //! 114 //! These macros may be used with the am_hal_pdm_config_t structure to set the 115 //! left gain value. 116 //! 117 //! @{ 118 // 119 //***************************************************************************** 120 #define AM_HAL_PDM_PCFG_LEFT_PGA_M15DB AM_REG_PDM_PCFG_PGALEFT_M15DB 121 #define AM_HAL_PDM_PCFG_LEFT_PGA_M300DB AM_REG_PDM_PCFG_PGALEFT_M300DB 122 #define AM_HAL_PDM_PCFG_LEFT_PGA_M45DB AM_REG_PDM_PCFG_PGALEFT_M45DB 123 #define AM_HAL_PDM_PCFG_LEFT_PGA_M60DB AM_REG_PDM_PCFG_PGALEFT_M60DB 124 #define AM_HAL_PDM_PCFG_LEFT_PGA_M75DB AM_REG_PDM_PCFG_PGALEFT_M75DB 125 #define AM_HAL_PDM_PCFG_LEFT_PGA_M90DB AM_REG_PDM_PCFG_PGALEFT_M90DB 126 #define AM_HAL_PDM_PCFG_LEFT_PGA_M105DB AM_REG_PDM_PCFG_PGALEFT_M105DB 127 #define AM_HAL_PDM_PCFG_LEFT_PGA_M120DB AM_REG_PDM_PCFG_PGALEFT_M120DB 128 #define AM_HAL_PDM_PCFG_LEFT_PGA_P105DB AM_REG_PDM_PCFG_PGALEFT_P105DB 129 #define AM_HAL_PDM_PCFG_LEFT_PGA_P90DB AM_REG_PDM_PCFG_PGALEFT_P90DB 130 #define AM_HAL_PDM_PCFG_LEFT_PGA_P75DB AM_REG_PDM_PCFG_PGALEFT_P75DB 131 #define AM_HAL_PDM_PCFG_LEFT_PGA_P60DB AM_REG_PDM_PCFG_PGALEFT_P60DB 132 #define AM_HAL_PDM_PCFG_LEFT_PGA_P45DB AM_REG_PDM_PCFG_PGALEFT_P45DB 133 #define AM_HAL_PDM_PCFG_LEFT_PGA_P300DB AM_REG_PDM_PCFG_PGALEFT_P300DB 134 #define AM_HAL_PDM_PCFG_LEFT_PGA_P15DB AM_REG_PDM_PCFG_PGALEFT_P15DB 135 #define AM_HAL_PDM_PCFG_LEFT_PGA_0DB AM_REG_PDM_PCFG_PGALEFT_0DB 136 //! @} 137 138 //***************************************************************************** 139 // 140 //! @name PDM Configuration MCLK Divider 141 //! @brief Macro definitions for the PDM MCLK Divider 142 //! 143 //! These macros may be used with the am_hal_pdm_config_t structure to set the 144 //! sinc decimation rate relative to the PDM sample clock (OSR). 145 //! 146 //! @{ 147 // 148 //***************************************************************************** 149 #define AM_HAL_PDM_PCFG_MCLKDIV_DIV1 AM_REG_PDM_PCFG_MCLKDIV_MCKDIV1 150 #define AM_HAL_PDM_PCFG_MCLKDIV_DIV2 AM_REG_PDM_PCFG_MCLKDIV_MCKDIV2 151 #define AM_HAL_PDM_PCFG_MCLKDIV_DIV3 AM_REG_PDM_PCFG_MCLKDIV_MCKDIV3 152 #define AM_HAL_PDM_PCFG_MCLKDIV_DIV4 AM_REG_PDM_PCFG_MCLKDIV_MCKDIV4 153 154 #define AM_HAL_PDM_PCFG_MCLKDIV(DIV) AM_REG_PDM_PCFG_MCLKDIV(DIV) 155 //! @} 156 157 //***************************************************************************** 158 // 159 //! @name PDM Configuration SINC Decimation Rate 160 //! @brief Macro definitions for the PDM SINC decimation rate 161 //! 162 //! These macros may be used with the am_hal_pdm_config_t structure to set the 163 //! sinc decimation rate relative to the PDM sample clock (OSR). 164 //! 165 //! @{ 166 // 167 //***************************************************************************** 168 #define AM_HAL_PDM_PCFG_SINC_RATE(OSR) \ 169 AM_REG_PDM_PCFG_SINCRATE(OSR) 170 //! @} 171 172 //***************************************************************************** 173 // 174 //! @name PDM Configuration High Pass Filter Enable 175 //! @brief Macro definitions for the PDM ADCHPD 176 //! 177 //! These macros may be used with the am_hal_pdm_config_t structure to enable 178 //! the high pass filter. 179 //! 180 //! @{ 181 // 182 //***************************************************************************** 183 #define AM_HAL_PDM_PCFG_ADCHPD_ENABLE AM_REG_PDM_PCFG_ADCHPD_EN 184 #define AM_HAL_PDM_PCFG_ADCHPD_DISABLE AM_REG_PDM_PCFG_ADCHPD_DIS 185 //! @} 186 187 //***************************************************************************** 188 // 189 //! @name PDM Configuration HPCUTOFF 190 //! @brief Macro definitions for the PDM High Pass Filter Cutoff Selector. 191 //! 192 //! These macros may be used with the am_hal_pdm_config_t structure to set the 193 //! high pass filter cutoff frequency. Valid range is 0 to 7. 194 //! 195 //! @{ 196 // 197 //***************************************************************************** 198 #define AM_HAL_PDM_PCFG_HPCUTOFF(HPSEL) \ 199 AM_REG_PDM_PCFG_HPCUTOFF(HPSEL) 200 //! @} 201 202 //***************************************************************************** 203 // 204 //! @name PDM Configuration Gain Set Change Clock Delay 205 //! @brief Macro definitions for the PDM clock delay for gain set changes. 206 //! 207 //! These macros may be used with the am_hal_pdm_config_t structure to set the 208 //! number of clocks for spreading gain setting changes. Valid range is 0 to 7. 209 //! 210 //! @{ 211 // 212 //***************************************************************************** 213 #define AM_HAL_PDM_PCFG_CYCLES(CLOCKS) \ 214 AM_REG_PDM_PCFG_CYCLES(CLOCKS) 215 //! @} 216 217 //***************************************************************************** 218 // 219 //! @name PDM Configuration SOFTMUTE enable/disable. 220 //! @brief Macro definitions for the PDM PCFG register mute controls. 221 //! 222 //! These macros may be used with the am_hal_pdm_config_t structure to enable 223 //! or disable the SOFTMUTE option. 224 //! 225 //! @{ 226 // 227 //***************************************************************************** 228 #define AM_HAL_PDM_PCFG_SOFTMUTE_ENABLE AM_REG_PDM_PCFG_SOFTMUTE_EN 229 #define AM_HAL_PDM_PCFG_SOFTMUTE_DISABLE AM_REG_PDM_PCFG_SOFTMUTE_DIS 230 //! @} 231 232 //***************************************************************************** 233 // 234 //! @name PDM Configuration PDM Core enable/disable. 235 //! @brief Macro definitions for the PDM PCFG register filter engine enable. 236 //! 237 //! These macros may be used with the am_hal_pdm_config_t structure to enable 238 //! or disable the PDM filter engine core. 239 //! 240 //! @{ 241 // 242 //***************************************************************************** 243 #define AM_HAL_PDM_PCFG_PDMCORE_ENABLE AM_REG_PDM_PCFG_PDMCORE_EN 244 #define AM_HAL_PDM_PCFG_PDMCORE_DISABLE AM_REG_PDM_PCFG_PDMCORE_DIS 245 //! @} 246 247 //***************************************************************************** 248 // 249 //! @name PDM Clock Frequencies 250 //! @brief Macro definitions for the PDM clock (from clkgen) frequencies. 251 //! 252 //! These macros may be used with the am_hal_pdm_config_t structure to set the 253 //! source clock frequency of the PDM interface. 254 //! 255 //! @{ 256 // 257 //***************************************************************************** 258 #define AM_HAL_PDM_IOCLK_12MHZ \ 259 (AM_REG_PDM_VCFG_PDMCLKSEL_12MHz | AM_REG_PDM_VCFG_IOCLKEN_EN) 260 #define AM_HAL_PDM_IOCLK_6MHZ \ 261 (AM_REG_PDM_VCFG_PDMCLKSEL_6MHz | AM_REG_PDM_VCFG_IOCLKEN_EN) 262 #define AM_HAL_PDM_IOCLK_3MHZ \ 263 (AM_REG_PDM_VCFG_PDMCLKSEL_3MHz | AM_REG_PDM_VCFG_IOCLKEN_EN) 264 #define AM_HAL_PDM_IOCLK_1_5MHZ \ 265 (AM_REG_PDM_VCFG_PDMCLKSEL_1_5MHz | AM_REG_PDM_VCFG_IOCLKEN_EN) 266 #define AM_HAL_PDM_IOCLK_750KHZ \ 267 (AM_REG_PDM_VCFG_PDMCLKSEL_750KHz | AM_REG_PDM_VCFG_IOCLKEN_EN) 268 #define AM_HAL_PDM_IOCLK_375KHZ \ 269 (AM_REG_PDM_VCFG_PDMCLKSEL_375KHz | AM_REG_PDM_VCFG_IOCLKEN_EN) 270 #define AM_HAL_PDM_IOCLK_187KHZ \ 271 (AM_REG_PDM_VCFG_PDMCLKSEL_187KHz | AM_REG_PDM_VCFG_IOCLKEN_EN) 272 //! @} 273 274 //***************************************************************************** 275 // 276 //! @name PDM Voice Configuration RSTB 277 //! @brief Reset the IP core. 278 //! 279 //! @{ 280 // 281 //***************************************************************************** 282 #define AM_HAL_PDM_VCFG_RSTB_RESET AM_REG_PDM_VCFG_RSTB_RESET 283 #define AM_HAL_PDM_VCFG_RSTB_NORMAL AM_REG_PDM_VCFG_RSTB_NORM 284 //! @} 285 286 //***************************************************************************** 287 // 288 //! @name PDM Voice Configuration PDM Clock Enable/Disable 289 //! @brief Macro definitions for the PDM VCFG register PDMCLKEN. 290 //! 291 //! These macros may be used with the am_hal_pdm_config_t structure to enable 292 //! or disable the PDM clock output to the pad mux and from there to the world. 293 //! 294 //! @{ 295 // 296 //***************************************************************************** 297 #define AM_HAL_PDM_VCFG_PDMCLK_ENABLE AM_REG_PDM_VCFG_PDMCLK_EN 298 #define AM_HAL_PDM_VCFG_PDMCLK_DISABLE AM_REG_PDM_VCFG_PDMCLK_DIS 299 //! @} 300 301 //***************************************************************************** 302 // 303 //! @name PDM Voice Configuration I2S Mode Enable/Disable 304 //! @brief Macro definitions for the PDM VCFG register I2SMODE. 305 //! 306 //! These macros may be used with the am_hal_pdm_config_t structure to enable 307 //! or disable the PDM clock output to the pad mux and from there to the world. 308 //! 309 //! @{ 310 // 311 //***************************************************************************** 312 #define AM_HAL_PDM_VCFG_I2SMODE_ENABLE AM_REG_PDM_VCFG_I2SMODE_EN 313 #define AM_HAL_PDM_VCFG_I2SMODE_DISABLE AM_REG_PDM_VCFG_I2SMODE_DIS 314 //! @} 315 316 //***************************************************************************** 317 // 318 //! @name PDM Voice Configuration BCLK Inversion Enable/Disable 319 //! @brief Macro definitions for the PDM VCFG register BCLKINV. 320 //! 321 //! These macros may be used with the am_hal_pdm_config_t structure to enable 322 //! or disable the PDM clock output to the pad mux and from there to the world. 323 //! 324 //! @{ 325 // 326 //***************************************************************************** 327 #define AM_HAL_PDM_VCFG_BCLKINV_ENABLE AM_REG_PDM_VCFG_BCLKINV_INV 328 #define AM_HAL_PDM_VCFG_BCLKINV_DISABLE AM_REG_PDM_VCFG_BCLKINV_NORM 329 //! @} 330 331 //***************************************************************************** 332 // 333 //! @name PDM Voice Configuration DMICDEL Enable/Disable 334 //! @brief Macro definitions for the PDM VCFG register Digital Mic Delay. 335 //! 336 //! These macros may be used with the am_hal_pdm_config_t structure to enable 337 //! or disable the PDM digital microphone clock delay. 338 //! 339 //! @{ 340 // 341 //***************************************************************************** 342 #define AM_HAL_PDM_VCFG_DMICDEL_1CYC AM_REG_PDM_VCFG_DMICKDEL_1CYC 343 #define AM_HAL_PDM_VCFG_DMICDEL_0CYC AM_REG_PDM_VCFG_DMICKDEL_0CYC 344 #define AM_HAL_PDM_VCFG_DMICDEL_ENABLE AM_REG_PDM_VCFG_DMICKDEL_1CYC 345 #define AM_HAL_PDM_VCFG_DMICDEL_DISABLE AM_REG_PDM_VCFG_DMICKDEL_0CYC 346 //! @} 347 348 //***************************************************************************** 349 // 350 //! @name PDM Voice Configuration Select Apps Processor (AP) versus Internal 351 //! @brief Macro definitions for the PDM VCFG register Digital Mic Delay. 352 //! 353 //! These macros may be used with the am_hal_pdm_config_t structure to select 354 //! the Application Processor (I2S slave) mode or the Internal FIFO interface 355 //! to the Apollo Cortex M4. 356 //! 357 //! @{ 358 // 359 //***************************************************************************** 360 #define AM_HAL_PDM_VCFG_SELAP_I2S AM_REG_PDM_VCFG_SELAP_I2S 361 #define AM_HAL_PDM_VCFG_SELAP_INTERNAL AM_REG_PDM_VCFG_SELAP_INTERNAL 362 #define AM_HAL_PDM_VCFG_SELAP_AP_I2S AM_REG_PDM_VCFG_SELAP_I2S 363 #define AM_HAL_PDM_VCFG_SELAP_CM4_FIFO AM_REG_PDM_VCFG_SELAP_INTERNAL 364 //! @} 365 366 //***************************************************************************** 367 // 368 //! @name PDM Voice Configuration PACK Enable/Disable 369 //! @brief Macro definitions for the PDM VCFG register sample packing mode. 370 //! 371 //! These macros may be used with the am_hal_pdm_config_t structure to enable 372 //! or disable the PDM sample packing mode. This mode puts two 16-bit samples 373 //! per 32-bit FIFO word. The following packed modes are available: 374 //! 375 //! mono left: LEFT_NEW, LEFT_OLD 376 //! mono right: RIGHT_NEW,RIGHT_OLD 377 //! stereo right: LEFT, RIGHT 378 //! stereo right(LRSWAP): RIGHT, LEFT 379 //! 380 //! 381 //! 382 //! @{ 383 // 384 //***************************************************************************** 385 #define AM_HAL_PDM_VCFG_PACK_ENABLE AM_REG_PDM_VCFG_PCMPACK_EN 386 #define AM_HAL_PDM_VCFG_PACK_DISABLE AM_REG_PDM_VCFG_PCMPACK_DIS 387 //! @} 388 389 //***************************************************************************** 390 // 391 //! @name PDM Channel Selects 392 //! @brief Macro definitions for the PDM Channel Selection. 393 //! 394 //! These macros may be used with the am_hal_pdm_config_t structure to set the 395 //! channel selection for the PDM interface. 396 //! 397 //! @{ 398 // 399 //***************************************************************************** 400 #define AM_HAL_PDM_VCFG_CHANNEL_LEFT AM_REG_PDM_VCFG_CHSET_LEFT 401 #define AM_HAL_PDM_VCFG_CHANNEL_RIGHT AM_REG_PDM_VCFG_CHSET_RIGHT 402 #define AM_HAL_PDM_VCFG_CHANNEL_STEREO AM_REG_PDM_VCFG_CHSET_STEREO 403 //! @} 404 405 //***************************************************************************** 406 // 407 //! @name PDM Interrupts 408 //! @brief Macro definitions for the PDM interrupt status bits. 409 //! 410 //! These macros correspond to the bits in the PDM interrupt status register. 411 //! They may be used for any of the am_hal_pdm_int_x() functions. 412 //! 413 //! @{ 414 // 415 //***************************************************************************** 416 #define AM_HAL_PDM_INT_UNDFL AM_REG_PDM_INTEN_UNDFL_M 417 #define AM_HAL_PDM_INT_OVF AM_REG_PDM_INTEN_OVF_M 418 #define AM_HAL_PDM_INT_FIFO AM_REG_PDM_INTEN_THR_M 419 //! @} 420 421 //***************************************************************************** 422 // 423 //! @brief Configuration structure for the PDM module. 424 // 425 //***************************************************************************** 426 typedef struct 427 { 428 // 429 //! @brief Set the PDM configuration reg with the values in this member. 430 //! Choose from AM_HAL_PDM_PCFG macros. 431 //! AM_HAL_PDM_PCFG_LRSWAP_xxx 432 //! AM_HAL_PDM_PCFG_RIGHT_PGA_xxx 433 //! AM_HAL_PDM_PCFG_LEFT_PGA_xxx 434 //! AM_HAL_PDM_PCFG_MCLKDIV_xxx 435 //! AM_HAL_PDM_PCFG_SINC_RATE() 436 //! AM_HAL_PDM_PCFG_ADCHPD_xxx 437 //! AM_HAL_PDM_PCFG_HPCUTOFF() 438 //! AM_HAL_PDM_PCFG_CYCLES() 439 //! AM_HAL_PDM_PCFG_SOFTMUTE_xxx 440 //! * AM_HAL_PDM_PCFG_PDMCORE_EN 441 //! AM_HAL_PDM_PCFG_PDMCORE_DISABLE 442 // 443 uint32_t ui32PDMConfigReg; 444 445 // 446 //! @brief Set the Voice Configuration reg with the values in this member. 447 //! Choose from AM_HAL_PDM_VCFG macros. 448 //! AM_HAL_PDM_IOCLK_xxx (also sets AM_REG_PDM_VCFG_IOCLKEN_EN) 449 //! * AM_REG_PDM_VCFG_IOCLKEN_EN 450 //! * AM_HAL_PDM_VCFG_RSTB_RESET 451 //! AM_HAL_PDM_VCFG_RSTB_NORMAL 452 //! * AM_HAL_PDM_VCFG_PDMCLK_EN 453 //! AM_HAL_PDM_VCFG_PDMCLK_DIS 454 //! AM_HAL_PDM_VCFG_I2SMODE_xxx 455 //! AM_HAL_PDM_VCFG_BCLKINV_xxx 456 //! AM_HAL_PDM_VCFG_DMICDEL_xxx 457 //! AM_HAL_PDM_VCFG_SELAP_xxx 458 //! AM_HAL_PDM_VCFG_PACK_xxx 459 //! AM_HAL_PDM_VCFG_CHANNEL_xxx 460 //! 461 //! * = These bits are set or cleared by the HAL PDM functions 462 //! am_hal_pdm_enable() or am_hal_pdm_disable(). 463 // 464 uint32_t ui32VoiceConfigReg; 465 466 // 467 //! @brief Select the FIFO PCM sample threshold. 468 //! 469 //! The PDM controller will generate a processor interrupt when the number 470 //! of entries in the FIFO goes *above* this number. 471 // 472 uint32_t ui32FIFOThreshold; 473 } am_hal_pdm_config_t; 474 475 //***************************************************************************** 476 // 477 // Define function-like macros. 478 // 479 //***************************************************************************** 480 481 //***************************************************************************** 482 // 483 //! @brief Read the FIFO depth information as an in-line macro 484 // 485 //***************************************************************************** 486 #define am_hal_pdm_fifo_depth_read() (AM_REG(PDM, FR)) 487 488 //***************************************************************************** 489 // 490 //! @brief Read the FIFO READ DATA as an in-line macro 491 // 492 //***************************************************************************** 493 #define am_hal_pdm_fifo_data_read() (AM_REG(PDM, FRD)) 494 495 //***************************************************************************** 496 // 497 //! @brief Flush the FIFO as an in-line macro 498 // 499 //***************************************************************************** 500 #define am_hal_pdm_fifo_flush() (AM_REG(PDM, FLUSH) = 0) 501 502 //***************************************************************************** 503 // 504 //! @brief Set the PDM Configuration (PCFG) Register 505 //! 506 //! This function sets the PDM configuration register 507 // 508 //***************************************************************************** 509 #define am_hal_pdm_pcfg_set(Value) (AM_REG(PDM, PCFG) = Value) 510 511 //***************************************************************************** 512 // 513 //! @brief Get the PCFG register value from PDM module. 514 // 515 //***************************************************************************** 516 #define am_hal_pdm_pcfg_get() (AM_REG(PDM, PCFG)) 517 518 //***************************************************************************** 519 // 520 //! @brief Set the Voice Configuration (VCFG) Register 521 // 522 //***************************************************************************** 523 #define am_hal_pdm_vcfg_set(Value) (AM_REG(PDM, VCFG) = Value) 524 525 //***************************************************************************** 526 // 527 //! @brief Get the VCFG register value from PDM module. 528 // 529 //***************************************************************************** 530 #define am_hal_pdm_vcfg_get() (AM_REG(PDM, VCFG)) 531 532 //***************************************************************************** 533 // 534 //! @brief Set the FIFO Threshold 535 // 536 //***************************************************************************** 537 #define am_hal_pdm_thresh_set(thresh) (AM_REG(PDM, FTHR) = thresh) 538 539 //***************************************************************************** 540 // 541 //! @brief Get the FIFO Threshold register value from PDM module. 542 // 543 //***************************************************************************** 544 #define am_hal_pdm_thresh_get() (AM_REG(PDM, FTHR)) 545 546 //***************************************************************************** 547 // 548 //! @brief Set the left microphone PGA gain. 549 //! 550 //***************************************************************************** 551 #define am_hal_pdm_left_gain_set(gain) (AM_BFW(PDM, PCFG, PGALEFT, gain)) 552 553 //***************************************************************************** 554 // 555 //! @brief Set the right microphone PGA gain. 556 // 557 //***************************************************************************** 558 #define am_hal_pdm_right_gain_set(gain) (AM_BFW(PDM, PCFG, PGARIGHT, gain)) 559 560 //***************************************************************************** 561 // 562 //! @brief Get the left microphone PGA gain value. 563 // 564 //***************************************************************************** 565 #define am_hal_pdm_left_gain_get() (AM_BFR(PDM, PCFG, PGALEFT)) 566 567 //***************************************************************************** 568 // 569 //! @brief Get the right microphone PGA gain value. 570 // 571 //***************************************************************************** 572 #define am_hal_pdm_right_gain_get() (AM_BFR(PDM, PCFG, PGARIGHT)) 573 574 //***************************************************************************** 575 // 576 //! @brief Enable the Soft Mute functionality. 577 // 578 //***************************************************************************** 579 #define am_hal_pdm_soft_mute_enable() (AM_BFWe(PDM, PCFG, SOFTMUTE, EN)) 580 581 //***************************************************************************** 582 // 583 //! @brief Disable the Soft Mute functionality. 584 // 585 //***************************************************************************** 586 #define am_hal_pdm_soft_mute_disable() (AM_BFWe(PDM, PCFG, SOFTMUTE, DIS)) 587 588 //***************************************************************************** 589 // 590 //! @brief Enable selected PDM Interrupts. 591 //! 592 //! @param ui32Interrupt - Use the macro bit fields provided in am_hal_pdm.h\n 593 //! AM_HAL_PDM_INT_UNDFL\n 594 //! AM_HAL_PDM_INT_OVF\n 595 //! AM_HAL_PDM_INT_FIFO\n 596 // 597 //***************************************************************************** 598 #define am_hal_pdm_int_enable(intrpt) (AM_REG(PDM, INTEN) |= intrpt) 599 600 //***************************************************************************** 601 // 602 //! @brief Return the enabled PDM Interrupts. 603 //! 604 //! Use this function to return all enabled PDM interrupts. 605 //! 606 //! @return all enabled PDM interrupts as a mask.\n 607 //! AM_HAL_PDM_INT_UNDFL\n 608 //! AM_HAL_PDM_INT_OVF\n 609 //! AM_HAL_PDM_INT_FIFO\n 610 // 611 //***************************************************************************** 612 #define am_hal_pdm_int_enable_get() (AM_REG(PDM, INTEN)) 613 614 //***************************************************************************** 615 // 616 //! @brief Disable selected PDM Interrupts. 617 //! 618 //! @param ui32Interrupt - Use the macro bit fields provided in am_hal_pdm.h\n 619 //! AM_HAL_PDM_INT_UNDFL\n 620 //! AM_HAL_PDM_INT_OVF\n 621 //! AM_HAL_PDM_INT_FIFO\n 622 // 623 //***************************************************************************** 624 #define am_hal_pdm_int_disable(intrpt) (AM_REG(PDM, INTEN) &= ~intrpt) 625 626 //***************************************************************************** 627 // 628 //! @brief Clear selected PDM Interrupts. 629 //! 630 //! @param ui32Interrupt - Use the macro bit fields provided in am_hal_pdm.h\n 631 //! AM_HAL_PDM_INT_UNDFL\n 632 //! AM_HAL_PDM_INT_OVF\n 633 //! AM_HAL_PDM_INT_FIFO\n 634 // 635 //***************************************************************************** 636 #define am_hal_pdm_int_clear(intrpt) (AM_REG(PDM, INTCLR) = intrpt) 637 638 //***************************************************************************** 639 // 640 //! @brief Set selected PDM Interrupts. 641 //! 642 //! Use this function to set the PDM interrupts. 643 //! 644 //! @param ui32Interrupt - Use the macro bit fields provided in am_hal_pdm.h\n 645 //! AM_HAL_PDM_INT_UNDFL\n 646 //! AM_HAL_PDM_INT_OVF\n 647 //! AM_HAL_PDM_INT_FIFO\n 648 // 649 //***************************************************************************** 650 #define am_hal_pdm_int_set(intrpt) (AM_REG(PDM, INTSET) = intrpt) 651 652 //***************************************************************************** 653 // 654 // External function definitions 655 // 656 //***************************************************************************** 657 extern void am_hal_pdm_config(am_hal_pdm_config_t * cfg); 658 extern void am_hal_pdm_enable(void); 659 extern void am_hal_pdm_disable(void); 660 661 extern uint32_t am_hal_pdm_int_status_get(bool bEnabledOnly); 662 663 #ifdef __cplusplus 664 } 665 #endif 666 667 #endif // AM_HAL_PDM_H 668 669 //***************************************************************************** 670 // 671 // End Doxygen group. 672 //! @} 673 // 674 //***************************************************************************** 675