1 /**
2 * \file
3 *
4 * \brief SAM Configurable Custom Logic (CCL) Driver
5 *
6 * Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 *
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 *
22 * 3. The name of Atmel may not be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * 4. This software may only be redistributed and used in connection with an
26 * Atmel microcontroller product.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \asf_license_stop
41 *
42 */
43 /*
44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
45 */
46
47 #include "ccl.h"
48
ccl_init(struct ccl_config * const config)49 void ccl_init(struct ccl_config *const config)
50 {
51 #if (SAML22) || (SAMC20) || (SAMC21)
52 /* Turn on the digital interface clock. */
53 system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, MCLK_APBCMASK_CCL);
54 #else
55 /* Turn on the digital interface clock. */
56 system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBD, MCLK_APBDMASK_CCL);
57 #endif
58 /* Reset module. */
59 ccl_module_reset();
60
61 /* Configure GCLK channel and enable clock */
62 struct system_gclk_chan_config gclk_chan_conf;
63 system_gclk_chan_get_config_defaults(&gclk_chan_conf);
64 gclk_chan_conf.source_generator = config->clock_source;
65 system_gclk_chan_set_config(CCL_GCLK_ID, &gclk_chan_conf);
66 system_gclk_chan_enable(CCL_GCLK_ID);
67
68 if(config->run_in_standby) {
69 /* Enable run in standy mode. */
70 CCL->CTRL.reg |= CCL_CTRL_RUNSTDBY;
71 } else {
72 /* Disable run in standy mode. */
73 CCL->CTRL.reg &= ~ CCL_CTRL_RUNSTDBY;
74 }
75 }
76
ccl_lut_get_config_defaults(struct ccl_lut_config * const config)77 void ccl_lut_get_config_defaults(struct ccl_lut_config *const config)
78 {
79 /* Sanity check arguments */
80 Assert(config);
81
82 /* Default configuration values */
83 config->truth_table_value = 0x00;
84 config->event_output_enable = false;
85 config->event_input_enable = false;
86 config->event_input_inverted_enable = false;
87 config->input0_src_sel = CCL_LUT_INPUT_SRC_MASK;
88 config->input1_src_sel = CCL_LUT_INPUT_SRC_MASK;
89 config->input2_src_sel = CCL_LUT_INPUT_SRC_MASK;
90 config->edge_selection_enable = false;
91 config->filter_sel = CCL_LUT_FILTER_DISABLE;
92 }
93
ccl_lut_set_config(const enum ccl_lut_id number,struct ccl_lut_config * const config)94 enum status_code ccl_lut_set_config(const enum ccl_lut_id number,
95 struct ccl_lut_config *const config)
96 {
97 /* Sanity check arguments */
98 Assert(config);
99
100 uint32_t temp = 0;
101
102 if(CCL->CTRL.reg & CCL_CTRL_ENABLE)
103 return STATUS_BUSY;
104
105 if (config->event_output_enable) {
106 temp |= CCL_LUTCTRL_LUTEO;
107 }
108
109 if (config->event_input_enable) {
110 temp |= CCL_LUTCTRL_LUTEI;
111 }
112
113 if (config->event_input_inverted_enable) {
114 temp |= CCL_LUTCTRL_INVEI;
115 }
116
117 if (config->edge_selection_enable) {
118 temp |= CCL_LUTCTRL_EDGESEL;
119 }
120
121 CCL->LUTCTRL[number].reg = temp |
122 CCL_LUTCTRL_INSEL0(config->input0_src_sel) |
123 CCL_LUTCTRL_INSEL1(config->input1_src_sel) |
124 CCL_LUTCTRL_INSEL2(config->input2_src_sel) |
125 CCL_LUTCTRL_TRUTH(config->truth_table_value) |
126 config->filter_sel;
127
128 return STATUS_OK;
129 }
130
ccl_seq_config(const enum ccl_seq_id number,const enum ccl_seq_selection seq_selection)131 enum status_code ccl_seq_config(const enum ccl_seq_id number,
132 const enum ccl_seq_selection seq_selection)
133 {
134 if(CCL->CTRL.reg & CCL_CTRL_ENABLE)
135 return STATUS_BUSY;
136
137 CCL->SEQCTRL[number].reg = seq_selection;
138
139 return STATUS_OK;
140 }
141
ccl_lut_enable(const enum ccl_lut_id number)142 void ccl_lut_enable(const enum ccl_lut_id number)
143 {
144 /* Enable the LUTx */
145 CCL->LUTCTRL[number].reg |= CCL_LUTCTRL_ENABLE;
146 }
147
ccl_lut_disable(const enum ccl_lut_id number)148 void ccl_lut_disable(const enum ccl_lut_id number)
149 {
150 /* Disable the LUTx */
151 CCL->LUTCTRL[number].reg &= ~CCL_LUTCTRL_ENABLE;
152 }
153
154
155