1 /*
2  * Copyright (c) 2006-2023, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author        Notes
8  * 2011-07-25     weety     first version
9  */
10 
11 #ifndef __DEV_MMCSD_CORE_H__
12 #define __DEV_MMCSD_CORE_H__
13 
14 #include <rtthread.h>
15 #include <drivers/mmcsd_host.h>
16 #include <drivers/mmcsd_card.h>
17 #include <drivers/mmcsd_cmd.h>
18 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
23 #ifdef RT_MMCSD_DBG
24 #define mmcsd_dbg(fmt, ...)  rt_kprintf(fmt, ##__VA_ARGS__)
25 #else
26 #define mmcsd_dbg(fmt, ...)
27 #endif
28 
29 struct rt_mmcsd_data
30 {
31     rt_uint32_t  blksize;
32     rt_uint32_t  blks;
33     rt_uint32_t  *buf;
34     rt_int32_t  err;
35     rt_uint32_t  flags;
36 #define DATA_DIR_WRITE  (1 << 0)
37 #define DATA_DIR_READ   (1 << 1)
38 #define DATA_STREAM (1 << 2)
39 
40     unsigned int        bytes_xfered;
41 
42     struct rt_mmcsd_cmd *stop;      /* stop command */
43     struct rt_mmcsd_req *mrq;       /* associated request */
44 
45     rt_uint32_t  timeout_ns;
46     rt_uint32_t  timeout_clks;
47 
48     void *sg; /* scatter list */
49     rt_uint16_t sg_len; /* size of scatter list */
50     rt_int16_t sg_count; /* mapped sg entries */
51     rt_ubase_t host_cookie; /* host driver private data */
52 };
53 
54 struct rt_mmcsd_cmd
55 {
56     rt_uint32_t  cmd_code;
57     rt_uint32_t  arg;
58     rt_uint32_t  resp[4];
59     rt_uint32_t  flags;
60 /*rsponse types
61  *bits:0~3
62  */
63 #define RESP_MASK   (0xF)
64 #define RESP_NONE   (0)
65 #define RESP_R1     (1 << 0)
66 #define RESP_R1B    (2 << 0)
67 #define RESP_R2     (3 << 0)
68 #define RESP_R3     (4 << 0)
69 #define RESP_R4     (5 << 0)
70 #define RESP_R6     (6 << 0)
71 #define RESP_R7     (7 << 0)
72 #define RESP_R5     (8 << 0)    /*SDIO command response type*/
73 /*command types
74  *bits:4~5
75  */
76 #define CMD_MASK    (3 << 4)        /* command type */
77 #define CMD_AC      (0 << 4)
78 #define CMD_ADTC    (1 << 4)
79 #define CMD_BC      (2 << 4)
80 #define CMD_BCR     (3 << 4)
81 
82 #define resp_type(cmd)  ((cmd)->flags & RESP_MASK)
83 
84 /*spi rsponse types
85  *bits:6~8
86  */
87 #define RESP_SPI_MASK   (0x7 << 6)
88 #define RESP_SPI_R1 (1 << 6)
89 #define RESP_SPI_R1B    (2 << 6)
90 #define RESP_SPI_R2 (3 << 6)
91 #define RESP_SPI_R3 (4 << 6)
92 #define RESP_SPI_R4 (5 << 6)
93 #define RESP_SPI_R5 (6 << 6)
94 #define RESP_SPI_R7 (7 << 6)
95 
96 #define spi_resp_type(cmd)  ((cmd)->flags & RESP_SPI_MASK)
97 /*
98  * These are the command types.
99  */
100 #define cmd_type(cmd)   ((cmd)->flags & CMD_MASK)
101 
102     rt_int32_t  retries;    /* max number of retries */
103     rt_int32_t  err;
104     unsigned int busy_timeout;      /* busy detect timeout in ms */
105 
106     struct rt_mmcsd_data *data;
107     struct rt_mmcsd_req *mrq;       /* associated request */
108 };
109 
110 struct rt_mmcsd_req
111 {
112     struct rt_mmcsd_data  *data;
113     struct rt_mmcsd_cmd   *cmd;
114     struct rt_mmcsd_cmd   *stop;
115     struct rt_mmcsd_cmd *sbc;       /* SET_BLOCK_COUNT for multiblock */
116     /* Allow other commands during this ongoing data transfer or busy wait */
117     int cap_cmd_during_tfr;
118 };
119 
120 /*the following is response bit*/
121 #define R1_OUT_OF_RANGE     (1 << 31)   /* er, c */
122 #define R1_ADDRESS_ERROR    (1 << 30)   /* erx, c */
123 #define R1_BLOCK_LEN_ERROR  (1 << 29)   /* er, c */
124 #define R1_ERASE_SEQ_ERROR      (1 << 28)   /* er, c */
125 #define R1_ERASE_PARAM      (1 << 27)   /* ex, c */
126 #define R1_WP_VIOLATION     (1 << 26)   /* erx, c */
127 #define R1_CARD_IS_LOCKED   (1 << 25)   /* sx, a */
128 #define R1_LOCK_UNLOCK_FAILED   (1 << 24)   /* erx, c */
129 #define R1_COM_CRC_ERROR    (1 << 23)   /* er, b */
130 #define R1_ILLEGAL_COMMAND  (1 << 22)   /* er, b */
131 #define R1_CARD_ECC_FAILED  (1 << 21)   /* ex, c */
132 #define R1_CC_ERROR     (1 << 20)   /* erx, c */
133 #define R1_ERROR        (1 << 19)   /* erx, c */
134 #define R1_UNDERRUN     (1 << 18)   /* ex, c */
135 #define R1_OVERRUN      (1 << 17)   /* ex, c */
136 #define R1_CID_CSD_OVERWRITE    (1 << 16)   /* erx, c, CID/CSD overwrite */
137 #define R1_WP_ERASE_SKIP    (1 << 15)   /* sx, c */
138 #define R1_CARD_ECC_DISABLED    (1 << 14)   /* sx, a */
139 #define R1_ERASE_RESET      (1 << 13)   /* sr, c */
140 #define R1_STATUS(x)            (x & 0xFFFFE000)
141 #define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
142 #define R1_READY_FOR_DATA   (1 << 8)    /* sx, a */
143 #define R1_APP_CMD      (1 << 5)    /* sr, c */
144 
145 
146 #define R1_SPI_IDLE     (1 << 0)
147 #define R1_SPI_ERASE_RESET  (1 << 1)
148 #define R1_SPI_ILLEGAL_COMMAND  (1 << 2)
149 #define R1_SPI_COM_CRC      (1 << 3)
150 #define R1_SPI_ERASE_SEQ    (1 << 4)
151 #define R1_SPI_ADDRESS      (1 << 5)
152 #define R1_SPI_PARAMETER    (1 << 6)
153 /* R1 bit 7 is always zero */
154 #define R2_SPI_CARD_LOCKED  (1 << 8)
155 #define R2_SPI_WP_ERASE_SKIP    (1 << 9)    /* or lock/unlock fail */
156 #define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP
157 #define R2_SPI_ERROR        (1 << 10)
158 #define R2_SPI_CC_ERROR     (1 << 11)
159 #define R2_SPI_CARD_ECC_ERROR   (1 << 12)
160 #define R2_SPI_WP_VIOLATION (1 << 13)
161 #define R2_SPI_ERASE_PARAM  (1 << 14)
162 #define R2_SPI_OUT_OF_RANGE (1 << 15)   /* or CSD overwrite */
163 #define R2_SPI_CSD_OVERWRITE    R2_SPI_OUT_OF_RANGE
164 
165 #define CARD_BUSY   0x80000000  /* Card Power up status bit */
166 
167 /* R5 response bits */
168 #define R5_COM_CRC_ERROR    (1 << 15)
169 #define R5_ILLEGAL_COMMAND  (1 << 14)
170 #define R5_ERROR            (1 << 11)
171 #define R5_FUNCTION_NUMBER  (1 << 9)
172 #define R5_OUT_OF_RANGE     (1 << 8)
173 #define R5_STATUS(x)        (x & 0xCB00)
174 #define R5_IO_CURRENT_STATE(x)  ((x & 0x3000) >> 12)
175 
176 
177 
178 /**
179  * fls - find last (most-significant) bit set
180  * @x: the word to search
181  *
182  * This is defined the same way as ffs.
183  * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
184  */
185 
__rt_fls(rt_uint32_t val)186 rt_inline rt_uint32_t __rt_fls(rt_uint32_t val)
187 {
188     rt_uint32_t  bit = 32;
189 
190     if (!val)
191         return 0;
192     if (!(val & 0xffff0000u))
193     {
194         val <<= 16;
195         bit -= 16;
196     }
197     if (!(val & 0xff000000u))
198     {
199         val <<= 8;
200         bit -= 8;
201     }
202     if (!(val & 0xf0000000u))
203     {
204         val <<= 4;
205         bit -= 4;
206     }
207     if (!(val & 0xc0000000u))
208     {
209         val <<= 2;
210         bit -= 2;
211     }
212     if (!(val & 0x80000000u))
213     {
214         bit -= 1;
215     }
216 
217     return bit;
218 }
219 
220 #define MMCSD_HOST_PLUGED       0
221 #define MMCSD_HOST_UNPLUGED     1
222 
223 rt_int32_t mmcsd_excute_tuning(struct rt_mmcsd_card *card);
224 int mmcsd_wait_cd_changed(rt_int32_t timeout);
225 void mmcsd_host_lock(struct rt_mmcsd_host *host);
226 void mmcsd_host_unlock(struct rt_mmcsd_host *host);
227 void mmcsd_req_complete(struct rt_mmcsd_host *host);
228 void mmcsd_send_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req);
229 rt_int32_t mmcsd_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd, int retries);
230 rt_int32_t mmcsd_go_idle(struct rt_mmcsd_host *host);
231 rt_int32_t mmcsd_spi_read_ocr(struct rt_mmcsd_host *host, rt_int32_t high_capacity, rt_uint32_t *ocr);
232 rt_int32_t mmcsd_all_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid);
233 rt_int32_t mmcsd_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid);
234 rt_int32_t mmcsd_get_csd(struct rt_mmcsd_card *card, rt_uint32_t *csd);
235 rt_int32_t mmcsd_select_card(struct rt_mmcsd_card *card);
236 rt_int32_t mmcsd_deselect_cards(struct rt_mmcsd_card *host);
237 rt_int32_t mmcsd_spi_use_crc(struct rt_mmcsd_host *host, rt_int32_t use_crc);
238 void mmcsd_set_chip_select(struct rt_mmcsd_host *host, rt_int32_t mode);
239 void mmcsd_set_clock(struct rt_mmcsd_host *host, rt_uint32_t clk);
240 void mmcsd_set_bus_mode(struct rt_mmcsd_host *host, rt_uint32_t mode);
241 void mmcsd_set_bus_width(struct rt_mmcsd_host *host, rt_uint32_t width);
242 void mmcsd_set_timing(struct rt_mmcsd_host *host, rt_uint32_t timing);
243 void mmcsd_set_data_timeout(struct rt_mmcsd_data *data, const struct rt_mmcsd_card *card);
244 rt_uint32_t mmcsd_select_voltage(struct rt_mmcsd_host *host, rt_uint32_t ocr);
245 void mmcsd_change(struct rt_mmcsd_host *host);
246 void mmcsd_detect(void *param);
247 void mmcsd_host_init(struct rt_mmcsd_host *host);
248 struct rt_mmcsd_host *mmcsd_alloc_host(void);
249 void mmcsd_free_host(struct rt_mmcsd_host *host);
250 int rt_mmcsd_core_init(void);
251 
252 rt_int32_t rt_mmcsd_blk_probe(struct rt_mmcsd_card *card);
253 void rt_mmcsd_blk_remove(struct rt_mmcsd_card *card);
254 
255 
256 #ifdef __cplusplus
257 }
258 #endif
259 
260 #endif
261