1 /*
2  * Copyright (c) 2023 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef HPM_SEI_DRV_H
9 #define HPM_SEI_DRV_H
10 
11 #include "hpm_common.h"
12 #include "hpm_sei_regs.h"
13 #include "hpm_soc_feature.h"
14 #include "hpm_soc_ip_feature.h"
15 
16 /**
17  * @brief sei arming action
18  */
19 typedef enum {
20     sei_arming_direct_exec = 0,
21     sei_arming_wait_trigger
22 } sei_arming_mode_t;
23 
24 /**
25  * @brief sei watchdog action
26  */
27 typedef enum {
28     sei_wdg_exec_next_instr = 0,
29     sei_wdg_exec_exception_instr
30 } sei_wdg_action_t;
31 
32 /**
33  * @brief sei transfer mode
34  */
35 typedef enum {
36     sei_synchronous_master_mode = 0,
37     sei_synchronous_slave_mode,
38     sei_asynchronous_mode
39 } sei_tranceiver_mode_t;
40 
41 /**
42  * @brief sei asynchronous mode parity
43  */
44 typedef enum {
45     sei_asynchronous_parity_even = 0,
46     sei_asynchronous_parity_odd
47 } sei_asynchronous_parity_t;
48 
49 /**
50  * @brief sei ilde state
51  */
52 typedef enum {
53     sei_idle_low_state = 0,
54     sei_idle_high_state,
55 } sei_idle_state_t;
56 
57 /**
58  * @brief sei data mode
59  */
60 typedef enum {
61     sei_data_mode = 0,
62     sei_check_mode,
63     sei_crc_mode
64 } sei_data_mode_t;
65 
66 /**
67  * @brief sei data bit order
68  */
69 typedef enum {
70     sei_bit_lsb_first = 0,
71     sei_bit_msb_first
72 } sei_data_bit_order_t;
73 
74 /**
75  * @brief sei data word order
76  */
77 typedef enum {
78     sei_word_nonreverse = 0,
79     sei_word_reverse
80 } sei_data_word_order_t;
81 
82 /**
83  * @brief sei state transition condition
84  */
85 typedef enum {
86     sei_state_tran_condition_high_match = 0,
87     sei_state_tran_condition_low_dismatch,
88     sei_state_tran_condition_rise_entry,
89     sei_state_tran_condition_fall_leave
90 } sei_state_tran_condition_t;
91 
92 /**
93  * @brief sei trig in type
94  */
95 typedef enum {
96     sei_trig_in0 = 0,
97     sei_trig_in1,
98     sei_trig_in_period,
99     sei_trig_in_soft
100 } sei_trig_in_type_t;      /**< trig input type */
101 
102 /**
103  * @brief sei irq event
104  */
105 typedef enum {
106     sei_irq_stall_event = SEI_CTRL_IRQ_INT_FLAG_STALL_MASK,
107     sei_irq_execpt_event = SEI_CTRL_IRQ_INT_FLAG_EXCEPT_MASK,
108     sei_irq_wdog_event = SEI_CTRL_IRQ_INT_FLAG_WDOG_MASK,
109     sei_irq_instr_ptr0_start_event = SEI_CTRL_IRQ_INT_FLAG_PTR0_ST_MASK,
110     sei_irq_instr_ptr1_start_event = SEI_CTRL_IRQ_INT_FLAG_PTR1_ST_MASK,
111     sei_irq_instr_value0_start_event = SEI_CTRL_IRQ_INT_FLAG_INSTR0_ST_MASK,
112     sei_irq_instr_value1_start_event = SEI_CTRL_IRQ_INT_FLAG_INSTR1_ST_MASK,
113     sei_irq_instr_ptr0_end_event = SEI_CTRL_IRQ_INT_FLAG_PTR0_END_MASK,
114     sei_irq_instr_ptr1_end_event = SEI_CTRL_IRQ_INT_FLAG_PTR1_END_MASK,
115     sei_irq_instr_value0_end_event = SEI_CTRL_IRQ_INT_FLAG_INSTR0_END_MASK,
116     sei_irq_instr_value1_end_event = SEI_CTRL_IRQ_INT_FLAG_INSTR1_END_MASK,
117     sei_irq_trx_err_event = SEI_CTRL_IRQ_INT_FLAG_TRX_ERR_MASK,
118     sei_irq_timeout_event = SEI_CTRL_IRQ_INT_FLAG_TIMEOUT_MASK,
119     sei_irq_latch0_event = SEI_CTRL_IRQ_INT_FLAG_LATCH0_MASK,
120     sei_irq_latch1_event = SEI_CTRL_IRQ_INT_FLAG_LATCH1_MASK,
121     sei_irq_latch2_event = SEI_CTRL_IRQ_INT_FLAG_LATCH2_MASK,
122     sei_irq_latch3_event = SEI_CTRL_IRQ_INT_FLAG_LATCH3_MASK,
123     sei_irq_sample_err_event = SEI_CTRL_IRQ_INT_FLAG_SMP_ERR_MASK,
124     sei_irq_trig0_event = SEI_CTRL_IRQ_INT_FLAG_TRIGER0_MASK,
125     sei_irq_trig1_event = SEI_CTRL_IRQ_INT_FLAG_TRIGER1_MASK,
126     sei_irq_trig2_event = SEI_CTRL_IRQ_INT_FLAG_TRIGER2_MASK,
127     sei_irq_trig3_event = SEI_CTRL_IRQ_INT_FLAG_TRIGER3_MASK,
128     sei_irq_trig0_err_event = SEI_CTRL_IRQ_INT_FLAG_TRG_ERR0_MASK,
129     sei_irq_trig1_err_event = SEI_CTRL_IRQ_INT_FLAG_TRG_ERR1_MASK,
130     sei_irq_trig2_err_event = SEI_CTRL_IRQ_INT_FLAG_TRG_ERR2_MASK,
131     sei_irq_trig3_err_event = SEI_CTRL_IRQ_INT_FLAG_TRG_ERR3_MASK,
132 } sei_irq_event_t;      /**< irq event type */
133 
134 /**
135  * @brief sei select command or data
136  */
137 #define SEI_SELECT_CMD true      /**< select cmd */
138 #define SEI_SELECT_DATA false    /**< select data */
139 
140 /**
141  * @brief sei const data register index
142  */
143 #define SEI_DATA_CONST_0      (30UL)
144 #define SEI_DATA_CONST_1      (31UL)
145 
146 /**
147  * @brief sei instruction operation command
148  */
149 #define SEI_INSTR_OP_HALT 0u      /**< op halt */
150 #define SEI_INSTR_OP_JUMP 1u      /**< op jump */
151 #define SEI_INSTR_OP_SEND_WDG 2u  /**< op send with watchdog */
152 #define SEI_INSTR_OP_SEND 3u      /**< op send */
153 #define SEI_INSTR_OP_WAIT_WDG 4u  /**< op wait with watchdog */
154 #define SEI_INSTR_OP_WAIT 5u      /**< op wait */
155 #define SEI_INSTR_OP_RECV_WDG 6u  /**< op recv with watchdog */
156 #define SEI_INSTR_OP_RECV 7u      /**< op recv */
157 
158 /**
159  * @brief sei instruction synchronous master clock type
160  */
161 #define SEI_INSTR_M_CK_LOW 0u            /**< clock low */
162 #define SEI_INSTR_M_CK_RISE_FALL 1u      /**< clock rise fall */
163 #define SEI_INSTR_M_CK_FALL_RISE 2u      /**< clock fall rise */
164 #define SEI_INSTR_M_CK_HIGH 3u           /**< clock high */
165 
166 /**
167  * @brief sei instruction synchronous slave clock type
168  */
169 #define SEI_INSTR_S_CK_DEFAULT 0u                /**< default */
170 #define SEI_INSTR_S_CK_TRX_EXCH 1u               /**< rx tx exchange */
171 #define SEI_INSTR_S_CK_TIMEOUT_EN 2u             /**< enable timeout */
172 #define SEI_INSTR_S_CK_TRX_EXCH_TIMEOUT_EN 3u    /**< rx tx exchange and enable timeout */
173 
174 /**
175  * @brief sei instruction jump intructions index
176  */
177 #define SEI_JUMP_INIT_INSTR_IDX 0x00u             /**< jump init instr index */
178 #define SEI_JUMP_WDG_INSTR_IDX 0x01u              /**< jump watchdog instr index */
179 #define SEI_JUMP_CMD_TABLE_INSTR_IDX0 0x10u       /**< jump command table instr ptr0 */
180 #define SEI_JUMP_CMD_TABLE_INSTR_IDX1 0x11u       /**< jump command table instr ptr1 */
181 #define SEI_JUMP_CMD_TABLE_INSTR_IDX2 0x12u       /**< jump command table instr ptr2 */
182 #define SEI_JUMP_CMD_TABLE_INSTR_IDX3 0x13u       /**< jump command table instr ptr3 */
183 #define SEI_JUMP_CMD_TABLE_INSTR_IDX4 0x14u       /**< jump command table instr ptr4 */
184 #define SEI_JUMP_CMD_TABLE_INSTR_IDX5 0x15u       /**< jump command table instr ptr5 */
185 #define SEI_JUMP_CMD_TABLE_INSTR_IDX6 0x16u       /**< jump command table instr ptr6 */
186 #define SEI_JUMP_CMD_TABLE_INSTR_IDX7 0x17u       /**< jump command table instr ptr7 */
187 #define SEI_JUMP_CMD_TABLE_INSTR_IDX8 0x18u       /**< jump command table instr ptr8 */
188 #define SEI_JUMP_CMD_TABLE_INSTR_IDX9 0x19u       /**< jump command table instr ptr9 */
189 #define SEI_JUMP_CMD_TABLE_INSTR_IDX10 0x1Au      /**< jump command table instr ptr10 */
190 #define SEI_JUMP_CMD_TABLE_INSTR_IDX11 0x1Bu      /**< jump command table instr ptr11 */
191 #define SEI_JUMP_CMD_TABLE_INSTR_IDX12 0x1Cu      /**< jump command table instr ptr12 */
192 #define SEI_JUMP_CMD_TABLE_INSTR_IDX13 0x1Du      /**< jump command table instr ptr13 */
193 #define SEI_JUMP_CMD_TABLE_INSTR_IDX14 0x1Eu      /**< jump command table instr ptr14 */
194 #define SEI_JUMP_CMD_TABLE_INSTR_IDX15 0x1Fu      /**< jump command table instr ptr15 */
195 
196 /**
197  * @brief sei engine config structure
198  */
199 typedef struct {
200     sei_arming_mode_t arming_mode;
201     uint8_t data_cdm_idx;
202     uint8_t data_base_idx;
203     uint8_t init_instr_idx;
204     bool wdg_enable;
205     sei_wdg_action_t wdg_action;
206     uint8_t wdg_instr_idx;
207     uint16_t wdg_time;
208 } sei_engine_config_t;      /**< engine config struct */
209 
210 /**
211  * @brief sei tranceiver synchronous master mode config structure
212  */
213 typedef struct {
214     bool data_idle_high_z;
215     sei_idle_state_t data_idle_state;
216     bool clock_idle_high_z;
217     sei_idle_state_t clock_idle_state;
218     uint32_t baudrate;
219 } sei_tranceiver_synchronous_master_config_t;      /**< tranceiver synchronous master config struct */
220 
221 /**
222  * @brief sei tranceiver synchronous master mode config structure
223  */
224 typedef struct {
225     bool data_idle_high_z;
226     sei_idle_state_t data_idle_state;
227     bool clock_idle_high_z;
228     sei_idle_state_t clock_idle_state;
229     uint32_t max_baudrate;
230     uint16_t ck0_timeout_us;
231     uint16_t ck1_timeout_us;
232 } sei_tranceiver_synchronous_slave_config_t;      /**< tranceiver synchronous slave config struct */
233 
234 /**
235  * @brief sei tranceiver asynchronous mode config structure
236  */
237 typedef struct {
238     uint8_t wait_len;
239     uint8_t data_len;
240     bool parity_enable;
241     sei_asynchronous_parity_t parity;
242     bool data_idle_high_z;
243     sei_idle_state_t data_idle_state;
244     uint32_t baudrate;
245 } sei_tranceiver_asynchronous_config_t;      /**< tranceiver asynchronous config struct */
246 
247 /**
248  * @brief sei tranceiver config structure
249  */
250 typedef struct {
251     sei_tranceiver_mode_t mode;
252     bool tri_sample;
253     uint32_t src_clk_freq;
254     sei_tranceiver_synchronous_master_config_t synchronous_master_config;
255     sei_tranceiver_synchronous_slave_config_t synchronous_slave_config;
256     sei_tranceiver_asynchronous_config_t asynchronous_config;
257 } sei_tranceiver_config_t;             /**< tranceiver config struct */
258 
259 /**
260  * @brief sei trigger input config structure
261  */
262 typedef struct {
263     bool trig_in0_enable;
264     uint8_t trig_in0_select;
265     bool trig_in1_enable;
266     uint8_t trig_in1_select;
267     bool trig_period_enable;
268     sei_arming_mode_t trig_period_arming_mode;
269     bool trig_period_sync_enable;
270     uint8_t trig_period_sync_select;
271     uint32_t trig_period_time;
272 #if defined(HPM_IP_FEATURE_SEI_TIMEOUT_REWIND_FEATURE) && HPM_IP_FEATURE_SEI_TIMEOUT_REWIND_FEATURE
273     uint8_t rewind_enable;
274     uint8_t rewind_select;
275 #endif
276 } sei_trigger_input_config_t;      /**< trigger input config struct */
277 
278 /**
279  * @brief sei trigger output config structure
280  */
281 typedef struct {
282     uint8_t src_latch_select;
283     bool trig_out_enable;
284     uint8_t trig_out_select;
285 } sei_trigger_output_config_t;      /**< trigger output config struct */
286 
287 /**
288  * @brief sei data format config structure
289  */
290 typedef struct {
291     sei_data_mode_t mode;
292     bool signed_flag;
293     sei_data_bit_order_t bit_order;
294     sei_data_word_order_t word_order;
295     uint8_t word_len;
296     bool crc_invert;
297     bool crc_shift_mode;
298     uint8_t crc_len;
299     uint8_t last_bit;
300     uint8_t first_bit;
301     uint8_t max_bit;
302     uint8_t min_bit;
303     uint32_t gold_value;
304     uint32_t crc_init_value;
305     uint32_t crc_poly;
306 } sei_data_format_config_t;      /**< cmd or data format config struct */
307 
308 /**
309  * @brief sei command table config structure
310  */
311 typedef struct {
312     uint32_t cmd_min_value;
313     uint32_t cmd_max_value;
314     uint32_t cmd_mask_value;
315     uint8_t instr_idx[16];
316 } sei_command_table_config_t;      /**< cmd table config struct */
317 
318 /**
319  * @brief sei state transition config structure
320  */
321 typedef struct {
322     bool disable_instr_ptr_check;
323     sei_state_tran_condition_t instr_ptr_cfg;
324     uint8_t instr_ptr_value;
325     bool disable_clk_check;
326     sei_state_tran_condition_t clk_cfg;
327     bool disable_txd_check;
328     sei_state_tran_condition_t txd_cfg;
329     bool disable_rxd_check;
330     sei_state_tran_condition_t rxd_cfg;
331     bool disable_timeout_check;
332     sei_state_tran_condition_t timeout_cfg;
333 } sei_state_transition_config_t;      /**< state transition config struct */
334 
335 /**
336  * @brief sei state transition latch config structure
337  */
338 typedef struct {
339     bool enable;
340     uint8_t output_select;
341     uint16_t delay;
342 } sei_state_transition_latch_config_t;      /**< state transition latch config struct */
343 
344 /**
345  * @brief sei sample config structure
346  */
347 typedef struct {
348     uint8_t acc_data_idx;
349     uint8_t spd_data_idx;
350     uint8_t rev_data_idx;
351     uint8_t pos_data_idx;
352     bool acc_data_use_rx;      /**< true - use rx data, false - use override data */
353     bool spd_data_use_rx;      /**< true - use rx data, false - use override data */
354     bool rev_data_use_rx;      /**< true - use rx data, false - use override data */
355     bool pos_data_use_rx;      /**< true - use rx data, false - use override data */
356     uint8_t latch_select;
357     bool sample_once;
358     uint16_t sample_window;
359     uint32_t data_register_select;
360 } sei_sample_config_t;      /**< sample config struct */
361 
362 /**
363  * @brief sei update config structure
364  */
365 typedef struct {
366     uint8_t acc_data_idx;
367     uint8_t spd_data_idx;
368     uint8_t rev_data_idx;
369     uint8_t pos_data_idx;
370     bool acc_data_use_rx;      /**< true - use rx data, false - use override data */
371     bool spd_data_use_rx;      /**< true - use rx data, false - use override data */
372     bool rev_data_use_rx;      /**< true - use rx data, false - use override data */
373     bool pos_data_use_rx;      /**< true - use rx data, false - use override data */
374     bool time_use_override;    /**< true - use override data, false - use timestamp data */
375     bool update_on_err;
376     uint8_t latch_select;
377     uint32_t data_register_select;
378 } sei_update_config_t;      /**< update config struct */
379 
380 
381 #if defined(__cplusplus)
382 extern "C" {
383 #endif /* __cplusplus */
384 
385 /**
386  * @brief Set the SEI engine enable or disable
387  * @param [in] ptr SEI base address
388  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
389  * @param [in] enable enable or disable
390  *  @arg true enable
391  *  @arg false disable
392  */
sei_set_engine_enable(SEI_Type * ptr,uint8_t idx,bool enable)393 static inline void sei_set_engine_enable(SEI_Type *ptr, uint8_t idx, bool enable)
394 {
395     if (enable) {
396         ptr->CTRL[idx].ENGINE.CTRL |= SEI_CTRL_ENGINE_CTRL_ENABLE_MASK;
397     } else {
398         ptr->CTRL[idx].ENGINE.CTRL &= ~SEI_CTRL_ENGINE_CTRL_ENABLE_MASK;
399     }
400 }
401 
402 /**
403  * @brief Rewind the SEI engine
404  * @param [in] ptr SEI base address
405  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
406  */
sei_set_engine_rewind(SEI_Type * ptr,uint8_t idx)407 static inline void sei_set_engine_rewind(SEI_Type *ptr, uint8_t idx)
408 {
409     ptr->CTRL[idx].ENGINE.CTRL |= SEI_CTRL_ENGINE_CTRL_REWIND_MASK;
410 }
411 
412 /**
413  * @brief Set the SEI trigger input trig in0 enable or disable
414  * @param [in] ptr SEI base address
415  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
416  * @param [in] enable enable or disable
417  *  @arg true enable
418  *  @arg false disable
419  */
sei_set_trig_input_in0_enable(SEI_Type * ptr,uint8_t idx,bool enable)420 static inline void sei_set_trig_input_in0_enable(SEI_Type *ptr, uint8_t idx, bool enable)
421 {
422     if (enable) {
423         ptr->CTRL[idx].TRG.IN_CFG |= SEI_CTRL_TRG_IN_CFG_IN0_EN_MASK;
424     } else {
425         ptr->CTRL[idx].TRG.IN_CFG &= ~SEI_CTRL_TRG_IN_CFG_IN0_EN_MASK;
426     }
427 }
428 
429 /**
430  * @brief Set the SEI trigger input trig in1 enable or disable
431  * @param [in] ptr SEI base address
432  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
433  * @param [in] enable enable or disable
434  *  @arg true enable
435  *  @arg false disable
436  */
sei_set_trig_input_in1_enable(SEI_Type * ptr,uint8_t idx,bool enable)437 static inline void sei_set_trig_input_in1_enable(SEI_Type *ptr, uint8_t idx, bool enable)
438 {
439     if (enable) {
440         ptr->CTRL[idx].TRG.IN_CFG |= SEI_CTRL_TRG_IN_CFG_IN1_EN_MASK;
441     } else {
442         ptr->CTRL[idx].TRG.IN_CFG &= ~SEI_CTRL_TRG_IN_CFG_IN1_EN_MASK;
443     }
444 }
445 
446 /**
447  * @brief Set the SEI trigger input period enable or disable
448  * @param [in] ptr SEI base address
449  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
450  * @param [in] enable enable or disable
451  *  @arg true enable
452  *  @arg false disable
453  */
sei_set_trig_input_period_enable(SEI_Type * ptr,uint8_t idx,bool enable)454 static inline void sei_set_trig_input_period_enable(SEI_Type *ptr, uint8_t idx, bool enable)
455 {
456     if (enable) {
457         ptr->CTRL[idx].TRG.IN_CFG |= SEI_CTRL_TRG_IN_CFG_PRD_EN_MASK;
458     } else {
459         ptr->CTRL[idx].TRG.IN_CFG &= ~SEI_CTRL_TRG_IN_CFG_PRD_EN_MASK;
460     }
461 }
462 
463 /**
464  * @brief Set the SEI trigger input soft enable or disable
465  * @param [in] ptr SEI base address
466  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
467  *  @arg true enable
468  *  @arg false disable
469  */
sei_set_trig_input_soft_enable(SEI_Type * ptr,uint8_t idx)470 static inline void sei_set_trig_input_soft_enable(SEI_Type *ptr, uint8_t idx)
471 {
472     ptr->CTRL[idx].TRG.SW |= SEI_CTRL_TRG_SW_SOFT_MASK;
473 }
474 
475 /**
476  * @brief Set the SEI trigger input command value
477  * @param [in] ptr SEI base address
478  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
479  * @param [in] type trigger input type @ref sei_trig_in_type_t
480  * @param [in] data command data
481  */
sei_set_trig_input_command_value(SEI_Type * ptr,uint8_t idx,sei_trig_in_type_t type,uint32_t data)482 static inline void sei_set_trig_input_command_value(SEI_Type *ptr, uint8_t idx, sei_trig_in_type_t type, uint32_t data)
483 {
484     ptr->CTRL[idx].TRG_TABLE.CMD[type] = data;
485 }
486 
487 /**
488  * @brief Get the SEI trigger input time
489  * @param [in] ptr SEI base address
490  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
491  * @param [in] type trigger input type @ref sei_trig_in_type_t
492  * @retval trigger input time
493  */
sei_get_trig_input_time(SEI_Type * ptr,uint8_t idx,sei_trig_in_type_t type)494 static inline uint32_t sei_get_trig_input_time(SEI_Type *ptr, uint8_t idx, sei_trig_in_type_t type)
495 {
496     return ptr->CTRL[idx].TRG_TABLE.TIME[type];
497 }
498 
499 /**
500  * @brief Get the SEI latch time
501  * @param [in] ptr SEI base address
502  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
503  * @param [in] latch_idx
504  *  @arg SEI_LATCH_0
505  *  @arg SEI_LATCH_1
506  *  @arg SEI_LATCH_2
507  *  @arg SEI_LATCH_3
508  * @retval latch time
509  */
sei_get_latch_time(SEI_Type * ptr,uint8_t idx,uint8_t latch_idx)510 static inline uint32_t sei_get_latch_time(SEI_Type *ptr, uint8_t idx, uint8_t latch_idx)
511 {
512     return ptr->CTRL[idx].LATCH[latch_idx].TIME;
513 }
514 
515 /**
516  * @brief Set the SEI tranceiver rx point
517  * @param [in] ptr SEI base address
518  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
519  * @param [in] point rx point value
520  */
sei_set_xcvr_rx_point(SEI_Type * ptr,uint8_t idx,uint16_t point)521 static inline void sei_set_xcvr_rx_point(SEI_Type *ptr, uint8_t idx, uint16_t point)
522 {
523     uint32_t tmp;
524 
525     assert(point > 0);
526     tmp = ptr->CTRL[idx].XCVR.DATA_CFG;
527     tmp &= ~SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_MASK;
528     tmp |= SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_SET(point);
529     ptr->CTRL[idx].XCVR.DATA_CFG = tmp;
530 }
531 
532 /**
533  * @brief Set the SEI tranceiver tx point
534  * @param [in] ptr SEI base address
535  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
536  * @param [in] point tx point value
537  */
sei_set_xcvr_tx_point(SEI_Type * ptr,uint8_t idx,uint16_t point)538 static inline void sei_set_xcvr_tx_point(SEI_Type *ptr, uint8_t idx, uint16_t point)
539 {
540     uint32_t tmp;
541 
542     assert(point > 0);
543     tmp = ptr->CTRL[idx].XCVR.DATA_CFG;
544     tmp &= ~SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_MASK;
545     tmp |= SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_SET(point);
546     ptr->CTRL[idx].XCVR.DATA_CFG = tmp;
547 }
548 
549 /**
550  * @brief Set the SEI tranceiver ck0 point
551  * @param [in] ptr SEI base address
552  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
553  * @param [in] point ck0 point value
554  */
sei_set_xcvr_ck0_point(SEI_Type * ptr,uint8_t idx,uint16_t point)555 static inline void sei_set_xcvr_ck0_point(SEI_Type *ptr, uint8_t idx, uint16_t point)
556 {
557     uint32_t tmp;
558 
559     assert(point > 0);
560     tmp = ptr->CTRL[idx].XCVR.CLK_CFG;
561     tmp &= ~SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_MASK;
562     tmp |= SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_SET(point);
563     ptr->CTRL[idx].XCVR.CLK_CFG = tmp;
564 }
565 
566 /**
567  * @brief Set the SEI tranceiver ck1 point
568  * @param [in] ptr SEI base address
569  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
570  * @param [in] point ck1 point value
571  */
sei_set_xcvr_ck1_point(SEI_Type * ptr,uint8_t idx,uint16_t point)572 static inline void sei_set_xcvr_ck1_point(SEI_Type *ptr, uint8_t idx, uint16_t point)
573 {
574     uint32_t tmp;
575 
576     assert(point > 0);
577     tmp = ptr->CTRL[idx].XCVR.CLK_CFG;
578     tmp &= ~SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_MASK;
579     tmp |= SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_SET(point);
580     ptr->CTRL[idx].XCVR.CLK_CFG = tmp;
581 }
582 
583 /**
584  * @brief Get the SEI tranceiver ck0 point
585  * @param [in] ptr SEI base address
586  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
587  * @retval ck0 point value
588  */
sei_get_xcvr_ck0_point(SEI_Type * ptr,uint8_t idx)589 static inline uint16_t sei_get_xcvr_ck0_point(SEI_Type *ptr, uint8_t idx)
590 {
591     return SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_GET(ptr->CTRL[idx].XCVR.CLK_CFG);
592 }
593 
594 /**
595  * @brief Get the SEI tranceiver ck1 point
596  * @param [in] ptr SEI base address
597  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
598  * @retval ck1 point value
599  */
sei_get_xcvr_ck1_point(SEI_Type * ptr,uint8_t idx)600 static inline uint16_t sei_get_xcvr_ck1_point(SEI_Type *ptr, uint8_t idx)
601 {
602     return SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_GET(ptr->CTRL[idx].XCVR.CLK_CFG);
603 }
604 
605 /**
606  * @brief Set the SEI command value
607  * @param [in] ptr SEI base address
608  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
609  * @param [in] cmd command value
610  */
sei_set_command_value(SEI_Type * ptr,uint8_t idx,uint32_t cmd)611 static inline void sei_set_command_value(SEI_Type *ptr, uint8_t idx, uint32_t cmd)
612 {
613     ptr->CTRL[idx].CMD.CMD = cmd;
614 }
615 
616 /**
617  * @brief Get the SEI command value
618  * @param [in] ptr SEI base address
619  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
620  * @retval command value
621  */
sei_get_command_value(SEI_Type * ptr,uint8_t idx)622 static inline uint32_t sei_get_command_value(SEI_Type *ptr, uint8_t idx)
623 {
624     return ptr->CTRL[idx].CMD.CMD;
625 }
626 
627 /**
628  * @brief Rewind the SEI command
629  * @param [in] ptr SEI base address
630  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
631  */
sei_set_command_rewind(SEI_Type * ptr,uint8_t idx)632 static inline void sei_set_command_rewind(SEI_Type *ptr, uint8_t idx)
633 {
634     ptr->CTRL[idx].CMD.MODE |= SEI_CTRL_CMD_MODE_REWIND_MASK;
635 }
636 
637 /**
638  * @brief Set the SEI data value
639  * @param [in] ptr SEI base address
640  * @param [in] idx SEI data index, such as SEI_DAT_2, SEI_DAT_3, etc.
641  * @param [in] data data value
642  */
sei_set_data_value(SEI_Type * ptr,uint8_t idx,uint32_t data)643 static inline void sei_set_data_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
644 {
645     ptr->DAT[idx].DATA = data;
646 }
647 
648 /**
649  * @brief Get the SEI data value
650  * @param [in] ptr SEI base address
651  * @param [in] idx SEI data index, such as SEI_DAT_2, SEI_DAT_3, etc.
652  * @retval data value
653  */
sei_get_data_value(SEI_Type * ptr,uint8_t idx)654 static inline uint32_t sei_get_data_value(SEI_Type *ptr, uint8_t idx)
655 {
656     return ptr->DAT[idx].DATA;
657 }
658 
659 /**
660  * @brief Rewind the SEI data
661  * @param [in] ptr SEI base address
662  * @param [in] idx SEI data index, such as SEI_DAT_2, SEI_DAT_3, etc.
663  */
sei_set_data_rewind(SEI_Type * ptr,uint8_t idx)664 static inline void sei_set_data_rewind(SEI_Type *ptr, uint8_t idx)
665 {
666     ptr->DAT[idx].MODE |= SEI_DAT_MODE_REWIND_MASK;
667 }
668 
669 /**
670  * @brief Set the SEI sample position (singleturn) override value
671  * @param [in] ptr SEI base address
672  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
673  * @param [in] data position (singleturn) override value
674  */
sei_set_sample_pos_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)675 static inline void sei_set_sample_pos_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
676 {
677     ptr->CTRL[idx].POS.SMP_POS = data;
678 }
679 
680 /**
681  * @brief Set the SEI sample revolution (multiturn) override value
682  * @param [in] ptr SEI base address
683  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
684  * @param [in] data revolution (multiturn) override value
685  */
sei_set_sample_rev_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)686 static inline void sei_set_sample_rev_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
687 {
688     ptr->CTRL[idx].POS.SMP_REV = data;
689 }
690 
691 /**
692  * @brief Set the SEI sample speed override value
693  * @param [in] ptr SEI base address
694  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
695  * @param [in] data speed override value
696  */
sei_set_sample_spd_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)697 static inline void sei_set_sample_spd_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
698 {
699     ptr->CTRL[idx].POS.SMP_SPD = data;
700 }
701 
702 /**
703  * @brief Set the SEI sample acceleration override value
704  * @param [in] ptr SEI base address
705  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
706  * @param [in] data acceleration override value
707  */
sei_set_sample_acc_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)708 static inline void sei_set_sample_acc_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
709 {
710     ptr->CTRL[idx].POS.SMP_ACC = data;
711 }
712 
713 /**
714  * @brief Set the SEI update position (singleturn) override value
715  * @param [in] ptr SEI base address
716  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
717  * @param [in] data position (singleturn) override value
718  */
sei_set_update_pos_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)719 static inline void sei_set_update_pos_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
720 {
721     ptr->CTRL[idx].POS.UPD_POS = data;
722 }
723 
724 /**
725  * @brief Set the SEI update revolution (multiturn) override value
726  * @param [in] ptr SEI base address
727  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
728  * @param [in] data revolution (multiturn) override value
729  */
sei_set_update_rev_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)730 static inline void sei_set_update_rev_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
731 {
732     ptr->CTRL[idx].POS.UPD_REV = data;
733 }
734 
735 /**
736  * @brief Set the SEI update speed override value
737  * @param [in] ptr SEI base address
738  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
739  * @param [in] data speed override value
740  */
sei_set_update_spd_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)741 static inline void sei_set_update_spd_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
742 {
743     ptr->CTRL[idx].POS.UPD_SPD = data;
744 }
745 
746 /**
747  * @brief Set the SEI update acceleration override value
748  * @param [in] ptr SEI base address
749  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
750  * @param [in] data acceleration override value
751  */
sei_set_update_acc_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)752 static inline void sei_set_update_acc_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
753 {
754     ptr->CTRL[idx].POS.UPD_ACC = data;
755 }
756 
757 /**
758  * @brief Set the SEI update time override value
759  * @param [in] ptr SEI base address
760  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
761  * @param [in] data time override value
762  */
sei_set_update_time_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)763 static inline void sei_set_update_time_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
764 {
765     ptr->CTRL[idx].POS.UPD_TIME = data;
766 }
767 
768 /**
769  * @brief Set the SEI irq match pointer0
770  * @param [in] ptr SEI base address
771  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
772  * @param [in] instr_idx match instr0 index
773  */
sei_set_irq_match_instr0_ptr(SEI_Type * ptr,uint8_t idx,uint8_t instr_idx)774 static inline void sei_set_irq_match_instr0_ptr(SEI_Type *ptr, uint8_t idx, uint8_t instr_idx)
775 {
776     ptr->CTRL[idx].IRQ.POINTER0 = SEI_CTRL_IRQ_POINTER0_POINTER_SET(instr_idx);
777 }
778 
779 /**
780  * @brief Set the SEI irq match pointer1
781  * @param [in] ptr SEI base address
782  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
783  * @param [in] instr_idx match instr1 index
784  */
sei_set_irq_match_instr1_ptr(SEI_Type * ptr,uint8_t idx,uint8_t instr_idx)785 static inline void sei_set_irq_match_instr1_ptr(SEI_Type *ptr, uint8_t idx, uint8_t instr_idx)
786 {
787     ptr->CTRL[idx].IRQ.POINTER1 = SEI_CTRL_IRQ_POINTER1_POINTER_SET(instr_idx);
788 }
789 
790 /**
791  * @brief Set the SEI irq match instr0
792  * @param [in] ptr SEI base address
793  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
794  * @param [in] instr_value match instr0 value
795  */
sei_set_irq_match_instr0_value(SEI_Type * ptr,uint8_t idx,uint32_t instr_value)796 static inline void sei_set_irq_match_instr0_value(SEI_Type *ptr, uint8_t idx, uint32_t instr_value)
797 {
798     ptr->CTRL[idx].IRQ.INSTR0 = SEI_CTRL_IRQ_INSTR0_INSTR_SET(instr_value);
799 }
800 
801 /**
802  * @brief Set the SEI irq match instr1
803  * @param [in] ptr SEI base address
804  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
805  * @param [in] instr_value match instr1 value
806  */
sei_set_irq_match_instr1_value(SEI_Type * ptr,uint8_t idx,uint32_t instr_value)807 static inline void sei_set_irq_match_instr1_value(SEI_Type *ptr, uint8_t idx, uint32_t instr_value)
808 {
809     ptr->CTRL[idx].IRQ.INSTR1 = SEI_CTRL_IRQ_INSTR1_INSTR_SET(instr_value);
810 }
811 
812 /**
813  * @brief Set the SEI irq enable or disable
814  * @param [in] ptr SEI base address
815  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
816  * @param [in] irq_mask irq mask, @ref sei_irq_event_t
817  * @param [in] enable enable or disable
818  *  @arg true enable
819  *  @arg false disable
820  */
sei_set_irq_enable(SEI_Type * ptr,uint8_t idx,uint32_t irq_mask,bool enable)821 static inline void sei_set_irq_enable(SEI_Type *ptr, uint8_t idx, uint32_t irq_mask, bool enable)
822 {
823     if (enable) {
824         ptr->CTRL[idx].IRQ.INT_EN |= irq_mask;
825     } else {
826         ptr->CTRL[idx].IRQ.INT_EN &= ~irq_mask;
827     }
828 }
829 
830 /**
831  * @brief Get the SEI irq status
832  * @param [in] ptr SEI base address
833  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
834  * @param [in] irq_mask irq mask, @ref sei_irq_event_t
835  *
836  * @retval true-has irq req, false-no irq req.
837  */
sei_get_irq_status(SEI_Type * ptr,uint8_t idx,uint32_t irq_mask)838 static inline bool sei_get_irq_status(SEI_Type *ptr, uint8_t idx, uint32_t irq_mask)
839 {
840     return ((ptr->CTRL[idx].IRQ.INT_FLAG & irq_mask) == irq_mask) ? true : false;
841 }
842 
843 /**
844  * @brief Clear the SEI irq flag
845  * @param [in] ptr SEI base address
846  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
847  * @param [in] irq_mask irq mask, @ref sei_irq_event_t
848  */
sei_clear_irq_flag(SEI_Type * ptr,uint8_t idx,uint32_t irq_mask)849 static inline void sei_clear_irq_flag(SEI_Type *ptr, uint8_t idx, uint32_t irq_mask)
850 {
851     ptr->CTRL[idx].IRQ.INT_FLAG = irq_mask;
852 }
853 
854 /**
855  * @brief Init SEI tranceiver configuration
856  * @param [in] ptr SEI base address
857  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
858  * @param [in] config tranceiver configuration @ref sei_tranceiver_config_t
859  * @retval API execution status
860  */
861 hpm_stat_t sei_tranceiver_config_init(SEI_Type *ptr, uint8_t idx, sei_tranceiver_config_t *config);
862 
863 /**
864  * @brief Init SEI command or data format configuration
865  * @param [in] ptr SEI base address
866  * @param [in] cmd_data_select
867  *   @arg @ref SEI_SELECT_CMD select command
868  *   @arg @ref SEI_SELECT_DATA select data
869  * @param [in] idx SEI ctrl index or data index, decided by cmd_data_select, such as SEI_CTRL_0, SEI_CTRL_1, SEI_DAT_2, SEI_DAT_3, etc.
870  * @param [in] config command or data format configuration @ref sei_data_format_config_t
871  * @retval API execution status
872  */
873 hpm_stat_t sei_cmd_data_format_config_init(SEI_Type *ptr, bool cmd_data_select, uint8_t idx, sei_data_format_config_t *config);
874 
875 /**
876  * @brief Init SEI command table configuration
877  * @param [in] ptr SEI base address
878  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
879  * @param [in] table_idx command table index, 0 - 7
880  * @param [in] config command table configuration @ref sei_command_table_config_t
881  * @retval API execution status
882  */
883 hpm_stat_t sei_cmd_table_config_init(SEI_Type *ptr, uint8_t idx, uint8_t table_idx, sei_command_table_config_t *config);
884 
885 /**
886  * @brief Init SEI state transition configuration
887  * @param [in] ptr SEI base address
888  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
889  * @param [in] latch_idx latch index
890  *  @arg SEI_LATCH_0
891  *  @arg SEI_LATCH_1
892  *  @arg SEI_LATCH_2
893  *  @arg SEI_LATCH_3
894  * @param [in] state transition state
895  *  @arg SEI_CTRL_LATCH_TRAN_0_1
896  *  @arg SEI_CTRL_LATCH_TRAN_1_2
897  *  @arg SEI_CTRL_LATCH_TRAN_2_3
898  *  @arg SEI_CTRL_LATCH_TRAN_3_0
899  * @param [in] config state transition configuration @ref sei_state_transition_config_t
900  * @retval API execution status
901  */
902 hpm_stat_t sei_state_transition_config_init(SEI_Type *ptr, uint8_t idx, uint8_t latch_idx, uint8_t state, sei_state_transition_config_t *config);
903 
904 /**
905  * @brief Init SEI state transition latch configuration
906  * @param [in] ptr SEI base address
907  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
908  * @param [in] latch_idx latch index
909  *  @arg SEI_LATCH_0
910  *  @arg SEI_LATCH_1
911  *  @arg SEI_LATCH_2
912  *  @arg SEI_LATCH_3
913  * @param [in] config state transition latch configuration @ref sei_state_transition_latch_config_t
914  * @retval API execution status
915  */
916 hpm_stat_t sei_state_transition_latch_config_init(SEI_Type *ptr, uint8_t idx, uint8_t latch_idx, sei_state_transition_latch_config_t *config);
917 
918 /**
919  * @brief Init SEI sample configuration
920  * @param [in] ptr SEI base address
921  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
922  * @param [in] config sample configuration @ref sei_sample_config_t
923  * @retval API execution status
924  */
925 hpm_stat_t sei_sample_config_init(SEI_Type *ptr, uint8_t idx, sei_sample_config_t *config);
926 
927 /**
928  * @brief Init SEI update configuration
929  * @param [in] ptr SEI base address
930  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
931  * @param [in] config update configuration @ref sei_update_config_t
932  * @retval API execution status
933  */
934 hpm_stat_t sei_update_config_init(SEI_Type *ptr, uint8_t idx, sei_update_config_t *config);
935 
936 /**
937  * @brief Init SEI trigger input configuration
938  * @param [in] ptr SEI base address
939  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
940  * @param [in] config trigger input configuration @ref sei_trigger_input_config_t
941  * @retval API execution status
942  */
943 hpm_stat_t sei_trigger_input_config_init(SEI_Type *ptr, uint8_t idx, sei_trigger_input_config_t *config);
944 
945 /**
946  * @brief Init SEI trigger output configuration
947  * @param [in] ptr SEI base address
948  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
949  * @param [in] config trigger output configuration @ref sei_trigger_output_config_t
950  * @retval API execution status
951  */
952 hpm_stat_t sei_trigger_output_config_init(SEI_Type *ptr, uint8_t idx, sei_trigger_output_config_t *config);
953 
954 /**
955  * @brief Init SEI engine configuration
956  * @param [in] ptr SEI base address
957  * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
958  * @param [in] config engine configuration @ref sei_engine_config_t
959  * @retval API execution status
960  */
961 hpm_stat_t sei_engine_config_init(SEI_Type *ptr, uint8_t idx, sei_engine_config_t *config);
962 
963 /**
964  * @brief Set SEI Intsructions
965  * @param [in] ptr SEI base address
966  * @param [in] idx SEI instruction index.
967  * @param [in] op SEI instruction operation
968  *  @arg @ref SEI_INSTR_OP_HALT
969  *  @arg @ref SEI_INSTR_OP_JUMP
970  *  @arg @ref SEI_INSTR_OP_SEND_WDG
971  *  @arg @ref SEI_INSTR_OP_SEND
972  *  @arg @ref SEI_INSTR_OP_WAIT_WDG
973  *  @arg @ref SEI_INSTR_OP_WAIT
974  *  @arg @ref SEI_INSTR_OP_RECV_WDG
975  *  @arg @ref SEI_INSTR_OP_RECV
976  * @param [in] ck SEI instruction clock
977  *   [1] synchronous master clock type
978  *       @arg @ref SEI_INSTR_M_CK_LOW
979  *       @arg @ref SEI_INSTR_M_CK_RISE_FALL
980  *       @arg @ref SEI_INSTR_M_CK_FALL_RISE
981  *       @arg @ref SEI_INSTR_M_CK_HIGH
982  *   [2] synchronous slave clock type
983  *       @arg @ref SEI_INSTR_S_CK_DEFAULT
984  *       @arg @ref SEI_INSTR_S_CK_TRX_EXCH
985  *       @arg @ref SEI_INSTR_S_CK_TIMEOUT_EN
986  *       @arg @ref SEI_INSTR_S_CK_TRX_EXCH_TIMEOUT_EN
987  * @param [in] crc SEI instruction crc register, such as SEI_DAT_0, SEI_DAT_1, etc.
988  * @param [in] data SEI instruction data register, such as SEI_DAT_0, SEI_DAT_1, etc.
989  * @param [in] opr SEI instruction operand.
990  *   [1] When OP is SEI_INSTR_OP_HALT, opr is the halt time in baudrate, 0 represents infinite time.
991  *   [2] When OP is SEI_INSTR_OP_JUMP, opr is command table pointer, init pointer or wdg pointer.
992  *       @arg @ref SEI_JUMP_INIT_INSTR_IDX
993  *       @arg @ref SEI_JUMP_WDG_INSTR_IDX
994  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX0
995  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX1
996  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX2
997  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX3
998  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX4
999  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX5
1000  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX6
1001  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX7
1002  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX8
1003  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX9
1004  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX10
1005  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX11
1006  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX12
1007  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX13
1008  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX14
1009  *       @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX15
1010  *   [3] Other OP, this area is the data length.
1011  */
1012 void sei_set_instr(SEI_Type *ptr, uint8_t idx, uint8_t op, uint8_t ck, uint8_t crc, uint8_t data, uint8_t opr);
1013 
1014 
1015 #if defined(__cplusplus)
1016 }
1017 #endif /* __cplusplus */
1018 
1019 #endif
1020