1 /*
2 * Copyright (c) 2006-2024 RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2024-08-16 zhujiale first version
9 */
10 #ifndef __SDHCI_MMC_H__
11 #define __SDHCI_MMC_H__
12
13 #include <rtthread.h>
14 #include <drivers/mmcsd_cmd.h>
15 #include <drivers/dev_mmcsd_core.h>
16 #include <drivers/mmcsd_host.h>
17 #include "sdhci_dma.h"
18 #define mmc_dev(x) ((x)->parent)
19
20 #define MMC_SEND_TUNING_BLOCK_HS200 SEND_TUNING_BLOCK_HS200
21 #define MMC_SEND_TUNING_BLOCK SEND_TUNING_BLOCK
22 #define MMC_STOP_TRANSMISSION STOP_TRANSMISSION
23 #define MMC_BUS_TEST_R 14 /* adtc R1 */
24 #define MMC_WRITE_MULTIPLE_BLOCK WRITE_MULTIPLE_BLOCK
25 #define MMC_READ_MULTIPLE_BLOCK READ_MULTIPLE_BLOCK
26
27 #define MMC_TIMING_UHS_DDR50 MMCSD_TIMING_UHS_DDR50
28 #define MMC_TIMING_UHS_SDR50 MMCSD_TIMING_UHS_SDR50
29 #define MMC_TIMING_MMC_HS200 MMCSD_TIMING_MMC_HS200
30 #define MMC_TIMING_MMC_HS400 MMCSD_TIMING_MMC_HS400
31 #define MMC_TIMING_UHS_SDR104 MMCSD_TIMING_UHS_SDR104
32 #define MMC_TIMING_UHS_SDR25 MMCSD_TIMING_UHS_SDR25
33 #define MMC_TIMING_MMC_DDR52 MMCSD_TIMING_MMC_DDR52
34 #define MMC_TIMING_UHS_SDR12 MMCSD_TIMING_UHS_SDR12
35 #define MMC_TIMING_SD_HS MMCSD_TIMING_SD_HS
36 #define MMC_TIMING_MMC_HS MMCSD_TIMING_MMC_HS
37
38 #define MMC_POWER_OFF MMCSD_POWER_OFF
39 #define MMC_POWER_UP MMCSD_POWER_UP
40 #define MMC_POWER_ON MMCSD_POWER_ON
41 #define MMC_POWER_UNDEFINED 3
42
43 #define MMC_SET_DRIVER_TYPE_B 0
44 #define MMC_SET_DRIVER_TYPE_A 1
45 #define MMC_SET_DRIVER_TYPE_C 2
46 #define MMC_SET_DRIVER_TYPE_D 3
47
48 #define MMC_SIGNAL_VOLTAGE_330 0
49 #define MMC_SIGNAL_VOLTAGE_180 1
50 #define MMC_SIGNAL_VOLTAGE_120 2
51
52 #define MMC_RSP_PRESENT (1 << 16)
53 #define MMC_RSP_136 (1 << 17) /* 136 bit response */
54 #define MMC_RSP_CRC (1 << 18) /* expect valid crc */
55 #define MMC_RSP_BUSY (1 << 19) /* card may send busy */
56 #define MMC_RSP_OPCODE (1 << 20) /* response contains opcode */
57
58 /*
59 * These are the native response types, and correspond to valid bit
60 * patterns of the above flags. One additional valid pattern
61 * is all zeros, which means we don't expect a response.
62 */
63 #define MMC_RSP_NONE (0)
64 #define MMC_RSP_R1 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
65 #define MMC_RSP_R1B (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE | MMC_RSP_BUSY)
66 #define MMC_RSP_R2 (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC)
67 #define MMC_RSP_R3 (MMC_RSP_PRESENT)
68 #define MMC_RSP_R4 (MMC_RSP_PRESENT)
69 #define MMC_RSP_R5 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
70 #define MMC_RSP_R6 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
71 #define MMC_RSP_R7 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
72
73 #define MMC_CMD_ADTC CMD_ADTC
74
75 #define MMC_BUS_WIDTH_8 MMCSD_BUS_WIDTH_8
76 #define MMC_BUS_WIDTH_4 MMCSD_BUS_WIDTH_4
77 #define MMC_BUS_WIDTH_1 MMCSD_BUS_WIDTH_1
78
79 #define MMC_PM_KEEP_POWER (1 << 0) /* preserve card power during suspend */
80 #define MMC_PM_WAKE_SDIO_IRQ (1 << 1) /* wake up host system on SDIO IRQ assertion */
81 enum mmc_blk_status
82 {
83 MMC_BLK_SUCCESS = 0,
84 MMC_BLK_PARTIAL,
85 MMC_BLK_CMD_ERR,
86 MMC_BLK_RETRY,
87 MMC_BLK_ABORT,
88 MMC_BLK_DATA_ERR,
89 MMC_BLK_ECC_ERR,
90 MMC_BLK_NOMEDIUM,
91 MMC_BLK_NEW_REQUEST,
92 };
93
94 /************************************************************************************************ */
95
96 #define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1)
97
98 struct mmc_host;
99
100 struct mmc_host_ops
101 {
102 /*
103 * It is optional for the host to implement pre_req and post_req in
104 * order to support double buffering of requests (prepare one
105 * request while another request is active).
106 * pre_req() must always be followed by a post_req().
107 * To undo a call made to pre_req(), call post_req() with
108 * a nonzero err condition.
109 */
110 void (*post_req)(struct mmc_host *host, struct rt_mmcsd_req *req,
111 int err);
112 void (*pre_req)(struct mmc_host *host, struct rt_mmcsd_req *req);
113 void (*request)(struct mmc_host *host, struct rt_mmcsd_req *req);
114
115 /*
116 * Avoid calling the next three functions too often or in a "fast
117 * path", since underlaying controller might implement them in an
118 * expensive and/or slow way. Also note that these functions might
119 * sleep, so don't call them in the atomic contexts!
120 */
121
122 /*
123 * Notes to the set_ios callback:
124 * ios->clock might be 0. For some controllers, setting 0Hz
125 * as any other frequency works. However, some controllers
126 * explicitly need to disable the clock. Otherwise e.g. voltage
127 * switching might fail because the SDCLK is not really quiet.
128 */
129 void (*set_ios)(struct mmc_host *host, struct rt_mmcsd_io_cfg *ios);
130
131 /*
132 * Return values for the get_ro callback should be:
133 * 0 for a read/write card
134 * 1 for a read-only card
135 * -ENOSYS when not supported (equal to NULL callback)
136 * or a negative errno value when something bad happened
137 */
138 int (*get_ro)(struct mmc_host *host);
139
140 /*
141 * Return values for the get_cd callback should be:
142 * 0 for a absent card
143 * 1 for a present card
144 * -ENOSYS when not supported (equal to NULL callback)
145 * or a negative errno value when something bad happened
146 */
147 int (*get_cd)(struct mmc_host *host);
148
149 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
150 /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */
151 void (*ack_sdio_irq)(struct mmc_host *host);
152
153 int (*start_signal_voltage_switch)(struct mmc_host *host, struct rt_mmcsd_io_cfg *ios);
154
155 /* Check if the card is pulling dat[0:3] low */
156 int (*card_busy)(struct mmc_host *host);
157
158 /* The tuning command opcode value is different for SD and eMMC cards */
159 int (*execute_tuning)(struct mmc_host *host, unsigned opcode);
160
161 /* Prepare HS400 target operating frequency depending host driver */
162 int (*prepare_hs400_tuning)(struct mmc_host *host, struct rt_mmcsd_io_cfg *ios);
163
164 /* Prepare switch to DDR during the HS400 init sequence */
165 int (*hs400_prepare_ddr)(struct mmc_host *host);
166
167 /* Prepare for switching from HS400 to HS200 */
168 void (*hs400_downgrade)(struct mmc_host *host);
169
170 /* Complete selection of HS400 */
171 void (*hs400_complete)(struct mmc_host *host);
172
173 /* Prepare enhanced strobe depending host driver */
174 void (*hs400_enhanced_strobe)(struct mmc_host *host,
175 struct rt_mmcsd_io_cfg *ios);
176
177 /* Reset the eMMC card via RST_n */
178 void (*hw_reset)(struct mmc_host *host);
179 void (*card_event)(struct mmc_host *host);
180 };
181
182 struct regulator;
183 struct mmc_pwrseq;
184
185 struct mmc_supply
186 {
187 struct regulator *vmmc; /* Card power supply */
188 struct regulator *vqmmc; /* Optional Vccq supply */
189 };
190
191 struct mmc_ctx
192 {
193 struct task_struct *task;
194 };
195
196 /* VDD voltage 3.3 ~ 3.4 */
197 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
198 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
199
200 #define MMC_CAP2_HS200_1_8V_SDR MMCSD_SUP_HS200_1V8
201 #define MMC_CAP_4_BIT_DATA MMCSD_BUSWIDTH_4
202 #define MMC_CAP_8_BIT_DATA MMCSD_BUSWIDTH_8
203 #define MMC_CAP2_HS200 MMCSD_SUP_HS200
204 #define MMC_CAP_MMC_HIGHSPEED MMCSD_SUP_HIGHSPEED
205 #define MMC_CAP_SD_HIGHSPEED MMCSD_SUP_HIGHSPEED
206 #define MMC_CAP_1_8V_DDR MMCSD_SUP_DDR_1V8
207 #define MMC_CAP_3_3V_DDR MMCSD_SUP_DDR_3V3
208 #define MMC_CAP_1_2V_DDR MMCSD_SUP_DDR_1V2
209 #define MMC_CAP_NONREMOVABLE MMCSD_SUP_NONREMOVABLE
210
211
212 #define MMC_CAP_UHS_DDR50 0
213 #define MMC_CAP2_HS400 0
214 #define MMC_CAP_UHS_SDR50 0
215 #define MMC_CAP_UHS_SDR25 0
216 #define MMC_CAP_UHS_SDR12 0
217 #define MMC_CAP_UHS_SDR104 0
218 #define MMC_CAP_UHS 0
219 #define MMC_CAP2_HSX00_1_8V 0
220 #define MMC_CAP2_HS400_ES 0
221 #define MMC_CAP_NEEDS_POLL 0
222 #define MMC_CAP2_HSX00_1_2V 0
223 #define MMC_CAP2_HS400_1_8V 0
224 #define MMC_CAP_DRIVER_TYPE_D 0
225 #define MMC_CAP_DRIVER_TYPE_C 0
226 #define MMC_SET_DRIVER_TYPE_B 0
227 #define MMC_CAP_DRIVER_TYPE_A 0
228 #define MMC_CAP2_SDIO_IRQ_NOTHREAD 0
229 #define MMC_CAP_CMD23 0
230 #define MMC_CAP_SDIO_IRQ 0
231
232 #define MMC_CAP2_NO_SDIO (1 << 19)
233 #define MMC_CAP2_NO_SD (1 << 21)
234 #define MMC_CAP2_NO_MMC (1 << 22)
235 #define MMC_CAP2_CQE (1 << 23)
236
237 #define MMC_VDD_165_195 VDD_165_195
238 #define MMC_VDD_20_21 VDD_20_21
239 #define MMC_VDD_29_30 VDD_29_30
240 #define MMC_VDD_30_31 VDD_30_31
241 #define MMC_VDD_32_33 VDD_32_33
242 #define MMC_VDD_33_34 VDD_33_34
243
244
245 struct mmc_host
246 {
247 struct rt_mmcsd_host rthost;
248 struct rt_device *parent;
249 int index;
250 const struct mmc_host_ops *ops;
251 unsigned int f_min;
252 unsigned int f_max;
253 unsigned int f_init;
254 rt_uint32_t ocr_avail;
255 rt_uint32_t ocr_avail_sdio; /* SDIO-specific OCR */
256 rt_uint32_t ocr_avail_sd; /* SD-specific OCR */
257 rt_uint32_t ocr_avail_mmc; /* MMC-specific OCR */
258 struct wakeup_source *ws; /* Enable consume of uevents */
259 rt_uint32_t max_current_330;
260 rt_uint32_t max_current_300;
261 rt_uint32_t max_current_180;
262 rt_uint32_t caps; /* Host capabilities */
263
264 rt_uint32_t caps2; /* More host capabilities */
265
266
267 /* host specific block data */
268 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
269 unsigned short max_segs; /* see blk_queue_max_segments */
270 unsigned short unused;
271 unsigned int max_req_size; /* maximum number of bytes in one req */
272 unsigned int max_blk_size; /* maximum size of one mmc block */
273 unsigned int max_blk_count; /* maximum number of blocks in one req */
274 unsigned int max_busy_timeout; /* max busy timeout in ms */
275 struct rt_mmcsd_io_cfg ios; /* current io bus settings */
276 unsigned int retune_period;
277 /* group bitfields together to minimize padding */
278 unsigned int use_spi_crc : 1;
279 unsigned int claimed : 1; /* host exclusively claimed */
280 unsigned int doing_init_tune : 1; /* initial tuning in progress */
281 unsigned int can_retune : 1; /* re-tuning can be used */
282 unsigned int doing_retune : 1; /* re-tuning in progress */
283 unsigned int retune_now : 1; /* do re-tuning at next req */
284 unsigned int retune_paused : 1; /* re-tuning is temporarily disabled */
285 unsigned int retune_crc_disable : 1; /* don't trigger retune upon crc */
286 unsigned int can_dma_map_merge : 1; /* merging can be used */
287 unsigned int vqmmc_enabled : 1; /* vqmmc regulator is enabled */
288
289 int need_retune; /* re-tuning is needed */
290 int hold_retune; /* hold off re-tuning */
291 rt_bool_t trigger_card_event; /* card_event necessary */
292 unsigned int sdio_irqs;
293 rt_bool_t sdio_irq_pending;
294
295 struct led_trigger *led; /* activity led */
296
297 struct mmc_supply supply;
298
299
300 /* Ongoing data transfer that allows commands during transfer */
301 struct rt_mmcsd_req *ongoing_mrq;
302
303
304 unsigned int actual_clock; /* Actual HC clock rate */
305 rt_uint32_t pm_caps;
306 unsigned long private[];
307 };
308
309
mmc_card_is_removable(struct mmc_host * host)310 static inline int mmc_card_is_removable(struct mmc_host *host)
311 {
312 return !(host->caps & MMC_CAP_NONREMOVABLE);
313 }
314
315 struct device_node;
316
317 struct mmc_host *mmc_alloc_host(int extra, struct rt_device *);
318 int mmc_add_host(struct mmc_host *);
319 void mmc_remove_host(struct mmc_host *);
320 void mmc_free_host(struct mmc_host *);
321 int mmc_of_parse(struct mmc_host *host);
322 int mmc_of_parse_voltage(struct mmc_host *host, rt_uint32_t *mask);
323
mmc_priv(struct mmc_host * host)324 static inline void *mmc_priv(struct mmc_host *host)
325 {
326 return (void *)host->private;
327 }
328
329
330 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
331
332 #define mmc_dev(x) ((x)->parent)
333 #define mmc_classdev(x) (&(x)->class_dev)
334 #define mmc_hostname(x) (x->parent->parent.name)
335
336 void mmc_detect_change(struct mmc_host *, unsigned long delay);
337 void mmc_request_done(struct mmc_host *, struct rt_mmcsd_req *);
338 void mmc_command_done(struct mmc_host *host, struct rt_mmcsd_req *mrq);
339
340 void mmc_cqe_request_done(struct mmc_host *host, struct rt_mmcsd_req *mrq);
341
342 /*
343 * May be called from host driver's system/runtime suspend/resume callbacks,
344 * to know if SDIO IRQs has been claimed.
345 */
sdio_irq_claimed(struct mmc_host * host)346 static inline rt_bool_t sdio_irq_claimed(struct mmc_host *host)
347 {
348 return host->sdio_irqs > 0;
349 }
350
mmc_regulator_set_ocr(struct mmc_host * mmc,struct regulator * supply,unsigned short vdd_bit)351 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
352 struct regulator *supply,
353 unsigned short vdd_bit)
354 {
355 return 0;
356 }
357
358 int mmc_regulator_get_supply(struct mmc_host *mmc);
359 int mmc_regulator_enable_vqmmc(struct mmc_host *mmc);
360 void mmc_regulator_disable_vqmmc(struct mmc_host *mmc);
361
362 void mmc_retune_timer_stop(struct mmc_host *host);
363
mmc_retune_needed(struct mmc_host * host)364 static inline void mmc_retune_needed(struct mmc_host *host)
365 {
366 if (host->can_retune)
367 host->need_retune = 1;
368 }
369
mmc_can_retune(struct mmc_host * host)370 static inline rt_bool_t mmc_can_retune(struct mmc_host *host)
371 {
372 return host->can_retune == 1;
373 }
374
mmc_doing_retune(struct mmc_host * host)375 static inline rt_bool_t mmc_doing_retune(struct mmc_host *host)
376 {
377 return host->doing_retune == 1;
378 }
379
mmc_doing_tune(struct mmc_host * host)380 static inline rt_bool_t mmc_doing_tune(struct mmc_host *host)
381 {
382 return host->doing_retune == 1 || host->doing_init_tune == 1;
383 }
384
mmc_get_dma_dir(struct rt_mmcsd_data * data)385 static inline int mmc_get_dma_dir(struct rt_mmcsd_data *data)
386 {
387 return data->flags & DATA_DIR_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
388 }
389
mmc_op_multi(rt_uint32_t opcode)390 static inline rt_bool_t mmc_op_multi(rt_uint32_t opcode)
391 {
392 return opcode == MMC_WRITE_MULTIPLE_BLOCK || opcode == MMC_READ_MULTIPLE_BLOCK;
393 }
394
mmc_op_tuning(rt_uint32_t opcode)395 static inline rt_bool_t mmc_op_tuning(rt_uint32_t opcode)
396 {
397 return opcode == MMC_SEND_TUNING_BLOCK || opcode == MMC_SEND_TUNING_BLOCK_HS200;
398 }
399
400 int mmc_gpio_get_cd(struct mmc_host *host);
401 void mmc_detect_change(struct mmc_host *host, unsigned long delay);
402 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct rt_mmcsd_io_cfg *ios);
403 rt_bool_t mmc_can_gpio_ro(struct mmc_host *host);
404 int mmc_gpio_get_ro(struct mmc_host *host);
405
406 int mmc_send_tuning(struct mmc_host *host, rt_uint32_t opcode, int *cmd_error);
407 int mmc_send_abort_tuning(struct mmc_host *host, rt_uint32_t opcode);
408 int mmc_of_parse(struct mmc_host *host);
409
410
411 #endif
412