1 /*
2 * Copyright (c) 2006-2023, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2019-08-23 balanceTWK first version
9 */
10
11 #include "board.h"
12 #include "drv_config.h"
13 #ifdef RT_USING_PULSE_ENCODER
14
15 //#define DRV_DEBUG
16 #define LOG_TAG "drv.pulse_encoder"
17 #include <drv_log.h>
18
19 #if !defined(BSP_USING_PULSE_ENCODER1) && !defined(BSP_USING_PULSE_ENCODER2) && !defined(BSP_USING_PULSE_ENCODER3) \
20 && !defined(BSP_USING_PULSE_ENCODER4) && !defined(BSP_USING_PULSE_ENCODER5) && !defined(BSP_USING_PULSE_ENCODER6)
21 #error "Please define at least one BSP_USING_PULSE_ENCODERx"
22 /* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
23 #endif
24
25 #define AUTO_RELOAD_VALUE 0x7FFF
26
27 enum
28 {
29 #ifdef BSP_USING_PULSE_ENCODER1
30 PULSE_ENCODER1_INDEX,
31 #endif
32 #ifdef BSP_USING_PULSE_ENCODER2
33 PULSE_ENCODER2_INDEX,
34 #endif
35 #ifdef BSP_USING_PULSE_ENCODER3
36 PULSE_ENCODER3_INDEX,
37 #endif
38 #ifdef BSP_USING_PULSE_ENCODER4
39 PULSE_ENCODER4_INDEX,
40 #endif
41 #ifdef BSP_USING_PULSE_ENCODER5
42 PULSE_ENCODER5_INDEX,
43 #endif
44 #ifdef BSP_USING_PULSE_ENCODER6
45 PULSE_ENCODER6_INDEX,
46 #endif
47 };
48
49 struct stm32_pulse_encoder_device
50 {
51 struct rt_pulse_encoder_device pulse_encoder;
52 TIM_HandleTypeDef tim_handler;
53 IRQn_Type encoder_irqn;
54 rt_int32_t over_under_flowcount;
55 char *name;
56 };
57
58 static struct stm32_pulse_encoder_device stm32_pulse_encoder_obj[] =
59 {
60 #ifdef BSP_USING_PULSE_ENCODER1
61 PULSE_ENCODER1_CONFIG,
62 #endif
63 #ifdef BSP_USING_PULSE_ENCODER2
64 PULSE_ENCODER2_CONFIG,
65 #endif
66 #ifdef BSP_USING_PULSE_ENCODER3
67 PULSE_ENCODER3_CONFIG,
68 #endif
69 #ifdef BSP_USING_PULSE_ENCODER4
70 PULSE_ENCODER4_CONFIG,
71 #endif
72 #ifdef BSP_USING_PULSE_ENCODER5
73 PULSE_ENCODER5_CONFIG,
74 #endif
75 #ifdef BSP_USING_PULSE_ENCODER6
76 PULSE_ENCODER6_CONFIG,
77 #endif
78 };
79
pulse_encoder_init(struct rt_pulse_encoder_device * pulse_encoder)80 rt_err_t pulse_encoder_init(struct rt_pulse_encoder_device *pulse_encoder)
81 {
82 TIM_Encoder_InitTypeDef sConfig;
83 TIM_MasterConfigTypeDef sMasterConfig;
84 struct stm32_pulse_encoder_device *stm32_device;
85 stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
86
87 stm32_device->tim_handler.Init.Prescaler = 0;
88 stm32_device->tim_handler.Init.CounterMode = TIM_COUNTERMODE_UP;
89 stm32_device->tim_handler.Init.Period = AUTO_RELOAD_VALUE;
90 stm32_device->tim_handler.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
91 stm32_device->tim_handler.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
92
93 sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
94 sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
95 sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
96 sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
97 sConfig.IC1Filter = 3;
98 sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
99 sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
100 sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
101 sConfig.IC2Filter = 3;
102
103 if (HAL_TIM_Encoder_Init(&stm32_device->tim_handler, &sConfig) != HAL_OK)
104 {
105 LOG_E("pulse_encoder init failed");
106 return -RT_ERROR;
107 }
108
109 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
110 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
111
112 if (HAL_TIMEx_MasterConfigSynchronization(&stm32_device->tim_handler, &sMasterConfig))
113 {
114 LOG_E("TIMx master config failed");
115 return -RT_ERROR;
116 }
117 else
118 {
119 HAL_NVIC_SetPriority(stm32_device->encoder_irqn, 3, 0);
120
121 /* enable the TIMx global Interrupt */
122 HAL_NVIC_EnableIRQ(stm32_device->encoder_irqn);
123
124 /* clear update flag */
125 __HAL_TIM_CLEAR_FLAG(&stm32_device->tim_handler, TIM_FLAG_UPDATE);
126 /* enable update request source */
127 __HAL_TIM_URS_ENABLE(&stm32_device->tim_handler);
128 }
129
130 return RT_EOK;
131 }
132
pulse_encoder_clear_count(struct rt_pulse_encoder_device * pulse_encoder)133 rt_err_t pulse_encoder_clear_count(struct rt_pulse_encoder_device *pulse_encoder)
134 {
135 struct stm32_pulse_encoder_device *stm32_device;
136 stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
137 stm32_device->over_under_flowcount = 0;
138 __HAL_TIM_SET_COUNTER(&stm32_device->tim_handler, 0);
139 return RT_EOK;
140 }
141
pulse_encoder_get_count(struct rt_pulse_encoder_device * pulse_encoder)142 rt_int32_t pulse_encoder_get_count(struct rt_pulse_encoder_device *pulse_encoder)
143 {
144 struct stm32_pulse_encoder_device *stm32_device;
145 stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
146 return (rt_int32_t)((rt_int16_t)__HAL_TIM_GET_COUNTER(&stm32_device->tim_handler) + stm32_device->over_under_flowcount * (AUTO_RELOAD_VALUE + 1));
147 }
148
pulse_encoder_control(struct rt_pulse_encoder_device * pulse_encoder,rt_uint32_t cmd,void * args)149 rt_err_t pulse_encoder_control(struct rt_pulse_encoder_device *pulse_encoder, rt_uint32_t cmd, void *args)
150 {
151 rt_err_t result;
152 struct stm32_pulse_encoder_device *stm32_device;
153 stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
154
155 result = RT_EOK;
156
157 switch (cmd)
158 {
159 case PULSE_ENCODER_CMD_ENABLE:
160 __HAL_TIM_ENABLE_IT(&stm32_device->tim_handler, TIM_IT_UPDATE);
161 HAL_TIM_Encoder_Start(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
162 HAL_TIM_Encoder_Start_IT(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
163 break;
164 case PULSE_ENCODER_CMD_DISABLE:
165 __HAL_TIM_DISABLE_IT(&stm32_device->tim_handler, TIM_IT_UPDATE);
166 HAL_TIM_Encoder_Stop(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
167 HAL_TIM_Encoder_Stop_IT(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
168 break;
169 default:
170 result = -RT_ENOSYS;
171 break;
172 }
173
174 return result;
175 }
176
pulse_encoder_update_isr(struct stm32_pulse_encoder_device * device)177 void pulse_encoder_update_isr(struct stm32_pulse_encoder_device *device)
178 {
179 /* TIM Update event */
180 if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_UPDATE) != RESET)
181 {
182 __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_UPDATE);
183 if (__HAL_TIM_IS_TIM_COUNTING_DOWN(&device->tim_handler))
184 {
185 device->over_under_flowcount--;
186 }
187 else
188 {
189 device->over_under_flowcount++;
190 }
191 }
192 /* Capture compare 1 event */
193 if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC1) != RESET)
194 {
195 __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC1);
196 }
197 /* Capture compare 2 event */
198 if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC2) != RESET)
199 {
200 __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC2);
201 }
202 /* Capture compare 3 event */
203 if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC3) != RESET)
204 {
205 __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC3);
206 }
207 /* Capture compare 4 event */
208 if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC4) != RESET)
209 {
210 __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC4);
211 }
212 /* TIM Break input event */
213 if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_BREAK) != RESET)
214 {
215 __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_BREAK);
216 }
217 /* TIM Trigger detection event */
218 if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_TRIGGER) != RESET)
219 {
220 __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_TRIGGER);
221 }
222 /* TIM commutation event */
223 if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_COM) != RESET)
224 {
225 __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_FLAG_COM);
226 }
227 }
228
229 #ifdef BSP_USING_PULSE_ENCODER1
230 #if defined(SOC_SERIES_STM32F4)
TIM1_UP_TIM10_IRQHandler(void)231 void TIM1_UP_TIM10_IRQHandler(void)
232 #elif defined(SOC_SERIES_STM32F1)
233 void TIM1_UP_IRQHandler(void)
234 #else
235 #error "Please check TIM1's IRQHandler"
236 #endif
237 {
238 /* enter interrupt */
239 rt_interrupt_enter();
240 pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER1_INDEX]);
241 /* leave interrupt */
242 rt_interrupt_leave();
243 }
244 #endif
245 #ifdef BSP_USING_PULSE_ENCODER2
TIM2_IRQHandler(void)246 void TIM2_IRQHandler(void)
247 {
248 /* enter interrupt */
249 rt_interrupt_enter();
250 pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER2_INDEX]);
251 /* leave interrupt */
252 rt_interrupt_leave();
253 }
254 #endif
255 #ifdef BSP_USING_PULSE_ENCODER3
TIM3_IRQHandler(void)256 void TIM3_IRQHandler(void)
257 {
258 /* enter interrupt */
259 rt_interrupt_enter();
260 pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER3_INDEX]);
261 /* leave interrupt */
262 rt_interrupt_leave();
263 }
264 #endif
265 #ifdef BSP_USING_PULSE_ENCODER4
TIM4_IRQHandler(void)266 void TIM4_IRQHandler(void)
267 {
268 /* enter interrupt */
269 rt_interrupt_enter();
270 pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER4_INDEX]);
271 /* leave interrupt */
272 rt_interrupt_leave();
273 }
274 #endif
275
276 static const struct rt_pulse_encoder_ops _ops =
277 {
278 .init = pulse_encoder_init,
279 .get_count = pulse_encoder_get_count,
280 .clear_count = pulse_encoder_clear_count,
281 .control = pulse_encoder_control,
282 };
283
hw_pulse_encoder_init(void)284 int hw_pulse_encoder_init(void)
285 {
286 int i;
287 int result;
288
289 result = RT_EOK;
290 for (i = 0; i < sizeof(stm32_pulse_encoder_obj) / sizeof(stm32_pulse_encoder_obj[0]); i++)
291 {
292 stm32_pulse_encoder_obj[i].pulse_encoder.type = AB_PHASE_PULSE_ENCODER;
293 stm32_pulse_encoder_obj[i].pulse_encoder.ops = &_ops;
294
295 if (rt_device_pulse_encoder_register(&stm32_pulse_encoder_obj[i].pulse_encoder, stm32_pulse_encoder_obj[i].name, RT_NULL) != RT_EOK)
296 {
297 LOG_E("%s register failed", stm32_pulse_encoder_obj[i].name);
298 result = -RT_ERROR;
299 }
300 }
301
302 return result;
303 }
304 INIT_BOARD_EXPORT(hw_pulse_encoder_init);
305
306 #endif
307