1 #include <os.h>
2 #include <rtthread.h>
3
4 #include <rthw.h>
5 #ifdef RT_USING_SMART
6 #include <mmu.h>
7 #include <lwp_arch.h>
8 #else
9 #define PV_OFFSET 0
10 #endif
11 #include <cache.h>
12
13 #include <hal_atomic.h>
14 #include <hal_interrupt.h>
15 #include <ktimer.h>
16 #include <typedef.h>
17
18 #define TIMER_FREQ (24000000)
19
20 typedef unsigned long cycles_t;
21
22 #ifndef CSR_TIME
23 #define CSR_TIME 0xc01
24 #endif
25 #ifdef __ASSEMBLY__
26 #define __ASM_STR(x) x
27 #else
28 #define __ASM_STR(x) #x
29 #endif
30 #define csr_read(csr) \
31 ({ \
32 register unsigned long __v; \
33 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \
34 : "=r" (__v) : \
35 : "memory"); \
36 __v; \
37 })
38
get_cycles(void)39 static inline cycles_t get_cycles(void)
40 {
41 return csr_read(CSR_TIME);
42 }
43
get_cycles64(void)44 static inline uint64_t get_cycles64(void)
45 {
46 return get_cycles();
47 }
48
arch_timer_get_cntfrq(void)49 static inline uint32_t arch_timer_get_cntfrq(void)
50 {
51 uint32_t val = TIMER_FREQ;
52 return val;
53 }
54
arch_counter_get_cntpct(void)55 static inline uint64_t arch_counter_get_cntpct(void)
56 {
57 uint64_t cval;
58
59 cval = get_cycles64();
60 return cval;
61 }
62
msleep(unsigned int msecs)63 rt_weak int msleep(unsigned int msecs)
64 {
65 rt_thread_mdelay(msecs);
66 return 0;
67 }
68
usleep(unsigned int usecs)69 rt_weak int usleep(unsigned int usecs)
70 {
71 int tickDiv = 1000 * (1000 / CONFIG_HZ);
72 int ticks = usecs / tickDiv;
73 int msecs = usecs % tickDiv;
74
75 if (ticks)
76 {
77 rt_thread_delay(ticks);
78 }
79 if (msecs)
80 {
81 rt_hw_us_delay(usecs);
82 }
83 return 0;
84 }
85
awos_arch_virt_to_phys(unsigned long virtaddr)86 unsigned long awos_arch_virt_to_phys(unsigned long virtaddr)
87 {
88 return virtaddr - PV_OFFSET;
89 }
90
awos_arch_phys_to_virt(unsigned long physaddr)91 unsigned long awos_arch_phys_to_virt(unsigned long physaddr)
92 {
93 return physaddr + PV_OFFSET;
94 }
95
96 #include <interrupt.h>
enable_irq(unsigned int irq)97 void enable_irq(unsigned int irq)
98 {
99 rt_hw_interrupt_umask(irq);
100 }
101
disable_irq(unsigned int irq)102 void disable_irq(unsigned int irq)
103 {
104 rt_hw_interrupt_mask(irq);
105 }
106
free_irq(unsigned int irq,void * dev_id)107 const void *free_irq(unsigned int irq, void *dev_id)
108 {
109 const void *ret = RT_NULL;
110
111 return ret;
112 }
113
request_threaded_irq(unsigned int irq,irq_handler_t handler,irq_handler_t thread_fn,unsigned long irqflags,const char * devname,void * dev_id)114 int request_threaded_irq(unsigned int irq, irq_handler_t handler,
115 irq_handler_t thread_fn, unsigned long irqflags,
116 const char *devname, void *dev_id)
117 {
118 rt_hw_interrupt_install(irq, (rt_isr_handler_t)handler, dev_id, devname);
119 return 0;
120 }
121
122
awos_arch_mems_flush_icache_region(unsigned long start,unsigned long len)123 void awos_arch_mems_flush_icache_region(unsigned long start, unsigned long len)
124 {
125 rt_hw_cpu_icache_ops(RT_HW_CACHE_INVALIDATE, (void *)start, len);
126 }
127
awos_arch_mems_clean_dcache_region(unsigned long start,unsigned long len)128 void awos_arch_mems_clean_dcache_region(unsigned long start, unsigned long len)
129 {
130 rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, (void *)start, len);
131 }
132
awos_arch_mems_clean_flush_dcache_region(unsigned long start,unsigned long len)133 void awos_arch_mems_clean_flush_dcache_region(unsigned long start, unsigned long len)
134 {
135 rt_hw_cpu_dcache_clean_and_invalidate((void *)start, len);
136 }
137
awos_arch_mems_flush_dcache_region(unsigned long start,unsigned long len)138 void awos_arch_mems_flush_dcache_region(unsigned long start, unsigned long len)
139 {
140 rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, (void *)start, len);
141 }
142
awos_arch_clean_flush_cache(void)143 void awos_arch_clean_flush_cache(void)
144 {
145 rt_hw_cpu_dcache_clean_all();
146 rt_hw_cpu_icache_invalidate_all();
147 }
148
awos_arch_clean_flush_cache_region(unsigned long start,unsigned long len)149 void awos_arch_clean_flush_cache_region(unsigned long start, unsigned long len)
150 {
151 rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, (void *)start, len);
152 rt_hw_cpu_icache_ops(RT_HW_CACHE_INVALIDATE, (void *)start, len);
153 }
154
awos_arch_flush_cache(void)155 void awos_arch_flush_cache(void)
156 {
157 rt_hw_cpu_dcache_invalidate_all();
158 rt_hw_cpu_icache_invalidate_all();
159 }
160
awos_arch_clean_dcache(void)161 void awos_arch_clean_dcache(void)
162 {
163 rt_hw_cpu_dcache_clean_all();
164 }
165
awos_arch_clean_flush_dcache(void)166 void awos_arch_clean_flush_dcache(void)
167 {
168 rt_hw_cpu_dcache_clean_all();
169 rt_hw_cpu_dcache_invalidate_all();
170 }
171
awos_arch_flush_dcache(void)172 void awos_arch_flush_dcache(void)
173 {
174 rt_hw_cpu_dcache_invalidate_all();
175 }
176
awos_arch_flush_icache_all(void)177 void awos_arch_flush_icache_all(void)
178 {
179 rt_hw_cpu_icache_invalidate_all();
180 }
181
hal_spi_gpio_cfg_count(const char * secname)182 rt_weak int32_t hal_spi_gpio_cfg_count(const char *secname)
183 {
184 rt_kprintf("FUNCTION:%s not implemented.\n", __FUNCTION__);
185 return 0;
186 }
187
esCFG_GetGPIOSecKeyCount(char * GPIOSecName)188 int32_t esCFG_GetGPIOSecKeyCount(char *GPIOSecName)
189 {
190 int id;
191
192 if (!rt_strcmp(GPIOSecName, "pwm1") || !rt_strcmp(GPIOSecName, "pwm2") || !rt_strcmp(GPIOSecName, "pwm7"))
193 {
194 return 1;
195 }
196 else if (!rt_strcmp(GPIOSecName, "sdc0") || !rt_strcmp(GPIOSecName, "sdc1"))
197 {
198 return 6;
199 }
200 else if (!rt_strcmp(GPIOSecName, "spi0"))
201 {
202 return hal_spi_gpio_cfg_count(GPIOSecName);
203 }
204 else if (sscanf(GPIOSecName, "twi%d", &id) == 1)
205 {
206 return 2;
207 }
208 return 0;
209 }
210
hal_spi_gpio_cfg_load(user_gpio_set_t * gpio_cfg,int32_t GPIONum,int id)211 rt_weak int hal_spi_gpio_cfg_load(user_gpio_set_t *gpio_cfg, int32_t GPIONum, int id)
212 {
213 rt_kprintf("FUNCTION:%s not implemented.\n", __FUNCTION__);
214 return -1;
215 }
216
hal_i2c_gpio_cfg_load(user_gpio_set_t * gpio_cfg,int32_t GPIONum,int id)217 rt_weak int hal_i2c_gpio_cfg_load(user_gpio_set_t *gpio_cfg, int32_t GPIONum, int id)
218 {
219 rt_kprintf("FUNCTION:%s not implemented.\n", __FUNCTION__);
220 return -1;
221 }
222
223 #define CFG_GPIO_PORT(p) ((p) - 'A' + 1)
224
esCFG_GetGPIOSecData(char * GPIOSecName,void * pGPIOCfg,int32_t GPIONum)225 int32_t esCFG_GetGPIOSecData(char *GPIOSecName, void *pGPIOCfg, int32_t GPIONum)
226 {
227 user_gpio_set_t *gpio_cfg = (user_gpio_set_t *) pGPIOCfg;
228 int i;
229 int id;
230
231 if (!rt_strcmp(GPIOSecName, "pwm1"))
232 {
233 rt_strncpy(gpio_cfg->gpio_name, "PB6", 4);
234 gpio_cfg->data = 0;
235 gpio_cfg->drv_level = 3;
236 gpio_cfg->mul_sel = 5; // PWM
237 gpio_cfg->port = CFG_GPIO_PORT('B'); // PORT-G
238 gpio_cfg->port_num = 6; // PG13
239 gpio_cfg->pull = 0; // pull disable
240 }
241 else if (!rt_strcmp(GPIOSecName, "pwm2"))
242 {
243 rt_strncpy(gpio_cfg->gpio_name, "PG13", 5);
244 gpio_cfg->data = 0;
245 gpio_cfg->drv_level = 3;
246 gpio_cfg->mul_sel = 5; // PWM
247 gpio_cfg->port = CFG_GPIO_PORT('G'); // PORT-G
248 gpio_cfg->port_num = 13; // PG13
249 gpio_cfg->pull = 0; // pull disable
250 }
251 else if (!rt_strcmp(GPIOSecName, "pwm7"))
252 {
253 rt_strncpy(gpio_cfg->gpio_name, "PD22", 5);
254 gpio_cfg->data = 0;
255 gpio_cfg->drv_level = 3;
256 gpio_cfg->mul_sel = 5; // PWM
257 gpio_cfg->port = CFG_GPIO_PORT('D'); // PORT-D
258 gpio_cfg->port_num = 22; // PD22
259 gpio_cfg->pull = 0; // pull disable
260 }
261 else if (!rt_strcmp(GPIOSecName, "sdc0"))
262 {
263 /*
264 [sdc0]
265 ;sdc0_used = 1
266 ;bus-width = 4
267 sdc0_d1 = port:PF00<2><1><1><default>
268 sdc0_d0 = port:PF01<2><1><1><default>
269 sdc0_clk = port:PF02<2><1><1><default>
270 sdc0_cmd = port:PF03<2><1><1><default>
271 sdc0_d3 = port:PF04<2><1><1><default>
272 sdc0_d2 = port:PF05<2><1><1><default>
273 */
274 for (i = 0; i < GPIONum; i++)
275 {
276 strcpy(gpio_cfg->gpio_name, GPIOSecName);
277 gpio_cfg->port = CFG_GPIO_PORT('F');
278 gpio_cfg->port_num = i;
279 gpio_cfg->mul_sel = 2;
280 gpio_cfg->pull = 1;
281 gpio_cfg->drv_level = 1;
282 gpio_cfg->data = 0;
283 gpio_cfg++;
284 }
285 }
286 else if (!rt_strcmp(GPIOSecName, "sdc1"))
287 {
288 /*
289 [sdc1]
290 ;sdc1_used = 1
291 ;bus-width= 4
292 sdc1_clk = port:PG00<2><1><1><default>
293 sdc1_cmd = port:PG01<2><1><1><default>
294 sdc1_d0 = port:PG02<2><1><1><default>
295 sdc1_d1 = port:PG03<2><1><1><default>
296 sdc1_d2 = port:PG04<2><1><1><default>
297 sdc1_d3 = port:PG05<2><1><1><default>
298 */
299 for (i = 0; i < GPIONum; i++)
300 {
301 strcpy(gpio_cfg->gpio_name, GPIOSecName);
302 gpio_cfg->port = CFG_GPIO_PORT('G');
303 gpio_cfg->port_num = i;
304 gpio_cfg->mul_sel = 2;
305 gpio_cfg->pull = 1;
306 gpio_cfg->drv_level = 1;
307 gpio_cfg->data = 0;
308 gpio_cfg++;
309 }
310 }
311 else if (sscanf(GPIOSecName, "spi%d", &id) == 1)
312 {
313 return hal_spi_gpio_cfg_load(gpio_cfg, GPIONum, id);
314 }
315 else if (sscanf(GPIOSecName, "twi%d", &id) == 1)
316 {
317 extern int hal_i2c_gpio_cfg_load(user_gpio_set_t *gpio_cfg, int32_t GPIONum, int id);
318 return hal_i2c_gpio_cfg_load(gpio_cfg, GPIONum, id);
319 }
320 return 0;
321 }
322
esCFG_GetKeyValue(char * SecName,char * KeyName,int32_t Value[],int32_t Count)323 int32_t esCFG_GetKeyValue(char *SecName, char *KeyName, int32_t Value[], int32_t Count)
324 {
325 if (!rt_strcmp("target", SecName))
326 {
327 /*
328 [target]
329 boot_clock = 1008
330 storage_type = 1
331 */
332 if (!rt_strcmp("storage_type", KeyName))
333 {
334 if (Count == 1)
335 {
336 *Value = 1;
337 return 0;
338 }
339 }
340 else if (!rt_strcmp("boot_clock", KeyName))
341 {
342 if (Count == 1)
343 {
344 *Value = 1008;
345 return 0;
346 }
347 }
348 }
349 else if (!rt_strcmp("card_product", SecName))
350 {
351 /*
352 [card_product]
353 card_product_used = 1
354 card_product_storage = 3
355 */
356 if (!rt_strcmp("card_product_used", KeyName))
357 {
358 if (Count == 1)
359 {
360 *Value = 1;
361 return 0;
362 }
363 } else if (!rt_strcmp("card_product_storage", KeyName))
364 {
365 if (Count == 1)
366 {
367 *Value = 3;
368 return 0;
369 }
370 }
371 }
372 else if (!rt_strcmp("sdcard_global", SecName))
373 {
374 /*
375 [sdcard_global]
376 used_card_no = 0x01
377 ;used_card_no = 0x01, when use card0
378 ;used_card_no = 0x02, when use card1
379 ;used_card_no = 0x03, when use card0 & card1
380 internal_card = 0x00
381 ;internal_card = 0x00, 无内置卡内置卡
382 ;internal_card = 0x01, card0 做内置卡
383 ;internal_card = 0x02, card1 做内置卡
384 */
385 if (!rt_strcmp("internal_card", KeyName))
386 {
387 *Value = 0x01;
388 return 0;
389 } else if (!rt_strcmp("used_card_no", KeyName))
390 {
391 *Value = 0x03;
392 return 0;
393 }
394 }
395 return -1;
396 }
397
do_gettimeofday(struct timespec64 * ts)398 int do_gettimeofday(struct timespec64 *ts)
399 {
400 if (ts)
401 {
402 ts->tv_sec = rt_tick_get() / RT_TICK_PER_SECOND;
403 ts->tv_nsec = (rt_tick_get() % RT_TICK_PER_SECOND) * (1000000000 / RT_TICK_PER_SECOND);
404 }
405 return 0;
406 }
407
eLIBs_printf(const char * fmt,...)408 int eLIBs_printf(const char *fmt, ...)
409 {
410 va_list args;
411 rt_size_t length;
412 static char rt_log_buf[RT_CONSOLEBUF_SIZE];
413
414 va_start(args, fmt);
415
416 length = rt_vsnprintf(rt_log_buf, sizeof(rt_log_buf) - 1, fmt, args);
417 if (length > RT_CONSOLEBUF_SIZE - 1)
418 length = RT_CONSOLEBUF_SIZE - 1;
419 va_end(args);
420
421 rt_kputs(rt_log_buf);
422 }
423