| /libcpu/arm/s3c24x0/ |
| A D | mmu.c | 52 register rt_uint32_t i; in mmu_enable() local
65 register rt_uint32_t i; in mmu_disable() local
78 register rt_uint32_t i; in mmu_enable_icache() local
91 register rt_uint32_t i; in mmu_enable_dcache() local
104 register rt_uint32_t i; in mmu_disable_icache() local
117 register rt_uint32_t i; in mmu_disable_dcache() local
130 register rt_uint32_t i; in mmu_enable_alignfault() local
143 register rt_uint32_t i; in mmu_disable_alignfault() local
171 void mmu_setttbase(rt_uint32_t i) in mmu_setttbase()
318 volatile int i,nSec; in mmu_setmtt() local
[all …]
|
| A D | cpu.c | 26 rt_uint32_t i; in cp15_rd() local
58 rt_uint32_t i; in cp15_rd() local
|
| /libcpu/arm/dm36x/ |
| A D | mmu.c | 13 void mmu_setttbase(rt_uint32_t i) in mmu_setttbase()
256 register rt_uint32_t i; in mmu_enable() local
273 register rt_uint32_t i; in mmu_disable() local
286 register rt_uint32_t i; in mmu_enable_icache() local
299 register rt_uint32_t i; in mmu_enable_dcache() local
312 register rt_uint32_t i; in mmu_disable_icache() local
325 register rt_uint32_t i; in mmu_disable_dcache() local
338 register rt_uint32_t i; in mmu_enable_alignfault() local
351 register rt_uint32_t i; in mmu_disable_alignfault() local
434 volatile int i, nSec; in mmu_create_pgd() local
[all …]
|
| A D | cpuport.c | 23 rt_uint32_t i; in cp15_rd() local
55 rt_uint32_t i; in cp15_rd() local
|
| /libcpu/arm/armv6/ |
| A D | mmu.c | 13 void mmu_setttbase(rt_uint32_t i) in mmu_setttbase()
256 register rt_uint32_t i; in mmu_enable() local
273 register rt_uint32_t i; in mmu_disable() local
286 register rt_uint32_t i; in mmu_enable_icache() local
299 register rt_uint32_t i; in mmu_enable_dcache() local
312 register rt_uint32_t i; in mmu_disable_icache() local
325 register rt_uint32_t i; in mmu_disable_dcache() local
338 register rt_uint32_t i; in mmu_enable_alignfault() local
351 register rt_uint32_t i; in mmu_disable_alignfault() local
435 volatile int i, nSec; in mmu_create_pgd() local
[all …]
|
| A D | cpuport.c | 23 rt_uint32_t i; in cp15_rd() local
57 rt_uint32_t i; in cp15_rd() local
|
| /libcpu/arm/am335x/ |
| A D | mmu.c | 53 void mmu_setttbase(register rt_uint32_t i) in mmu_setttbase()
71 void mmu_set_domain(register rt_uint32_t i) in mmu_set_domain()
78 register rt_uint32_t i; in mmu_enable_alignfault() local
91 register rt_uint32_t i; in mmu_disable_alignfault() local
148 int i,nSec; in mmu_setmtt() local
|
| A D | cpu.c | 28 rt_uint32_t i; in cp15_rd() local
64 rt_uint32_t i; in cp15_rd() local
94 rt_uint32_t i; in cp15_rd() local
|
| /libcpu/arm/arm926/ |
| A D | mmu.c | 15 void mmu_setttbase(rt_uint32_t i) in mmu_setttbase()
31 void mmu_set_domain(rt_uint32_t i) in mmu_set_domain()
204 void mmu_setttbase(register rt_uint32_t i) in mmu_setttbase()
223 void mmu_set_domain(register rt_uint32_t i) in mmu_set_domain()
403 int i = 0; in mmu_setmtt() local
|
| A D | cpuport.c | 24 rt_uint32_t i; in cp15_rd() local
56 rt_uint32_t i; in cp15_rd() local
|
| /libcpu/arm/realview-a8-vmm/ |
| A D | mmu.c | 49 int i; in rt_hw_cpu_dump_page_table_2nd() local
93 int i; in rt_hw_cpu_dump_page_table() local
161 volatile int i, nSec; in rt_hw_mmu_setmtt() local
|
| /libcpu/arm/sep4020/ |
| A D | cpu.c | 30 rt_uint32_t i; in cp15_rd() local
62 rt_uint32_t i; in cp15_rd() local
|
| /libcpu/aarch64/common/ |
| A D | interrupt.c | 415 for (int i = 0; i < RT_CPUS_NR; i++) in list_isr() local
421 for (int i = 0; i < RT_NAME_MAX; i++) in list_isr() local
427 for (int i = 0; i < RT_CPUS_NR; i++) in list_isr() local
440 for (int i = 0; i < RT_CPUS_NR; i++) in list_isr() local
|
| A D | gicv3.c | 398 rt_uint64_t i; in sgi_aff_add_table() local
416 rt_uint64_t i, icc_sgi1r_value; in gicv3_sgi_init() local
432 rt_uint64_t i; in gicv3_sgi_send() local
448 rt_uint64_t i, value; in gicv3_sgi_target_list_set() local
466 rt_uint64_t i; in arm_gic_send_affinity_sgi() local
587 int i; in arm_gic_dist_init() local
689 int i; in arm_gic_redist_init() local
789 int i; in arm_gic_dump() local
819 int i; in arm_gic_bind_dump() local
|
| A D | stack.c | 37 for (int i = 0; i < 32; ++i) in rt_hw_stack_init() local
|
| /libcpu/arm/common/ |
| A D | showmem.c | 15 unsigned int i = 0, j = 0; in rt_hw_show_memory() local
|
| /libcpu/arm/cortex-r4/ |
| A D | stack.c | 62 int i; in rt_hw_stack_init() local
|
| /libcpu/arm/zynqmp-r5/ |
| A D | stack.c | 57 int i; in rt_hw_stack_init() local
|
| /libcpu/risc-v/virt64/ |
| A D | plic.c | 124 for (size_t i = hartid * WORD_CNT_BYTE; i < 32; i++) in _set_sie() local
135 for (int i = 0; i < CONFIG_IRQ_NR; i++) in plic_init() local
|
| /libcpu/arm/s3c44b0/ |
| A D | cpu.c | 27 volatile int i; in rt_hw_cpu_icache_enable() local
|
| /libcpu/ia32/ |
| A D | trap.c | 42 int i, j, func; in rt_hw_idt_init() local
|
| /libcpu/mips/common/ |
| A D | stack.c | 25 rt_uint32_t i; in rt_hw_stack_init() local
|
| A D | exception.c | 100 int i, j; in mips_dump_regs() local
141 rt_int32_t i; in install_default_exception_handler() local
|
| /libcpu/arm/cortex-m23/ |
| A D | cpuport.c | 40 unsigned long i; in rt_hw_stack_init() local
|
| /libcpu/arm/cortex-m7/ |
| A D | mpu.c | 221 rt_uint8_t i; in rt_hw_mpu_table_switch() local
253 rt_int8_t i; in MemManage_Handler() local
|