1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * o Redistributions of source code must retain the above copyright notice, this list
9 * of conditions and the following disclaimer.
10 *
11 * o Redistributions in binary form must reproduce the above copyright notice, this
12 * list of conditions and the following disclaimer in the documentation and/or
13 * other materials provided with the distribution.
14 *
15 * o Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30 #ifndef _FSL_FLEXCAN_H_
31 #define _FSL_FLEXCAN_H_
32
33 #include "fsl_common.h"
34
35 /*!
36 * @addtogroup flexcan_driver
37 * @{
38 */
39
40 /******************************************************************************
41 * Definitions
42 *****************************************************************************/
43
44 /*! @name Driver version */
45 /*@{*/
46 /*! @brief FlexCAN driver version 2.2.0. */
47 #define FLEXCAN_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
48 /*@}*/
49
50 /*! @brief FlexCAN Frame ID helper macro. */
51 #define FLEXCAN_ID_STD(id) \
52 (((uint32_t)(((uint32_t)(id)) << CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK) /*!< Standard Frame ID helper macro. */
53 #define FLEXCAN_ID_EXT(id) \
54 (((uint32_t)(((uint32_t)(id)) << CAN_ID_EXT_SHIFT)) & \
55 (CAN_ID_EXT_MASK | CAN_ID_STD_MASK)) /*!< Extend Frame ID helper macro. */
56
57 /*! @brief FlexCAN Rx Message Buffer Mask helper macro. */
58 #define FLEXCAN_RX_MB_STD_MASK(id, rtr, ide) \
59 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
60 FLEXCAN_ID_STD(id)) /*!< Standard Rx Message Buffer Mask helper macro. */
61 #define FLEXCAN_RX_MB_EXT_MASK(id, rtr, ide) \
62 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
63 FLEXCAN_ID_EXT(id)) /*!< Extend Rx Message Buffer Mask helper macro. */
64
65 /*! @brief FlexCAN Rx FIFO Mask helper macro. */
66 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide) \
67 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
68 (FLEXCAN_ID_STD(id) << 1)) /*!< Standard Rx FIFO Mask helper macro Type A helper macro. */
69 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH(id, rtr, ide) \
70 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
71 (((uint32_t)(id) & 0x7FF) << 19)) /*!< Standard Rx FIFO Mask helper macro Type B upper part helper macro. */
72 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW(id, rtr, ide) \
73 (((uint32_t)((uint32_t)(rtr) << 15) | (uint32_t)((uint32_t)(ide) << 14)) | \
74 (((uint32_t)(id) & 0x7FF) << 3)) /*!< Standard Rx FIFO Mask helper macro Type B lower part helper macro. */
75 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(id) \
76 (((uint32_t)(id) & 0x7F8) << 21) /*!< Standard Rx FIFO Mask helper macro Type C upper part helper macro. */
77 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(id) \
78 (((uint32_t)(id) & 0x7F8) << 13) /*!< Standard Rx FIFO Mask helper macro Type C mid-upper part helper macro. */
79 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(id) \
80 (((uint32_t)(id) & 0x7F8) << 5) /*!< Standard Rx FIFO Mask helper macro Type C mid-lower part helper macro. */
81 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id) \
82 (((uint32_t)(id) & 0x7F8) >> 3) /*!< Standard Rx FIFO Mask helper macro Type C lower part helper macro. */
83 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide) \
84 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
85 (FLEXCAN_ID_EXT(id) << 1)) /*!< Extend Rx FIFO Mask helper macro Type A helper macro. */
86 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH(id, rtr, ide) \
87 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
88 ((FLEXCAN_ID_EXT(id) & 0x1FFF8000) << 1)) /*!< Extend Rx FIFO Mask helper macro Type B upper part helper macro. */
89 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW(id, rtr, ide) \
90 (((uint32_t)((uint32_t)(rtr) << 15) | (uint32_t)((uint32_t)(ide) << 14)) | \
91 ((FLEXCAN_ID_EXT(id) & 0x1FFF8000) >> \
92 15)) /*!< Extend Rx FIFO Mask helper macro Type B lower part helper macro. */
93 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id) \
94 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) << 3) /*!< Extend Rx FIFO Mask helper macro Type C upper part helper macro. */
95 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH(id) \
96 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) >> \
97 5) /*!< Extend Rx FIFO Mask helper macro Type C mid-upper part helper macro. */
98 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW(id) \
99 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) >> \
100 13) /*!< Extend Rx FIFO Mask helper macro Type C mid-lower part helper macro. */
101 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id) \
102 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) >> 21) /*!< Extend Rx FIFO Mask helper macro Type C lower part helper macro. */
103
104 /*! @brief FlexCAN Rx FIFO Filter helper macro. */
105 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(id, rtr, ide) \
106 FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide) /*!< Standard Rx FIFO Filter helper macro Type A helper macro. */
107 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_HIGH(id, rtr, ide) \
108 FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH( \
109 id, rtr, ide) /*!< Standard Rx FIFO Filter helper macro Type B upper part helper macro. */
110 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_LOW(id, rtr, ide) \
111 FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW( \
112 id, rtr, ide) /*!< Standard Rx FIFO Filter helper macro Type B lower part helper macro. */
113 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_HIGH(id) \
114 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH( \
115 id) /*!< Standard Rx FIFO Filter helper macro Type C upper part helper macro. */
116 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_HIGH(id) \
117 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH( \
118 id) /*!< Standard Rx FIFO Filter helper macro Type C mid-upper part helper macro. */
119 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_LOW(id) \
120 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW( \
121 id) /*!< Standard Rx FIFO Filter helper macro Type C mid-lower part helper macro. */
122 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_LOW(id) \
123 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id) /*!< Standard Rx FIFO Filter helper macro Type C lower part helper macro. \
124 */
125 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_A(id, rtr, ide) \
126 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type A helper macro. */
127 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_HIGH(id, rtr, ide) \
128 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH( \
129 id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type B upper part helper macro. */
130 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_LOW(id, rtr, ide) \
131 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW( \
132 id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type B lower part helper macro. */
133 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_HIGH(id) \
134 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id) /*!< Extend Rx FIFO Filter helper macro Type C upper part helper macro. \
135 */
136 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_HIGH(id) \
137 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH( \
138 id) /*!< Extend Rx FIFO Filter helper macro Type C mid-upper part helper macro. */
139 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_LOW(id) \
140 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW( \
141 id) /*!< Extend Rx FIFO Filter helper macro Type C mid-lower part helper macro. */
142 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_LOW(id) \
143 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id) /*!< Extend Rx FIFO Filter helper macro Type C lower part helper macro. */
144
145 /*! @brief FlexCAN transfer status. */
146 enum _flexcan_status
147 {
148 kStatus_FLEXCAN_TxBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 0), /*!< Tx Message Buffer is Busy. */
149 kStatus_FLEXCAN_TxIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 1), /*!< Tx Message Buffer is Idle. */
150 kStatus_FLEXCAN_TxSwitchToRx = MAKE_STATUS(
151 kStatusGroup_FLEXCAN, 2), /*!< Remote Message is send out and Message buffer changed to Receive one. */
152 kStatus_FLEXCAN_RxBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 3), /*!< Rx Message Buffer is Busy. */
153 kStatus_FLEXCAN_RxIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 4), /*!< Rx Message Buffer is Idle. */
154 kStatus_FLEXCAN_RxOverflow = MAKE_STATUS(kStatusGroup_FLEXCAN, 5), /*!< Rx Message Buffer is Overflowed. */
155 kStatus_FLEXCAN_RxFifoBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 6), /*!< Rx Message FIFO is Busy. */
156 kStatus_FLEXCAN_RxFifoIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 7), /*!< Rx Message FIFO is Idle. */
157 kStatus_FLEXCAN_RxFifoOverflow = MAKE_STATUS(kStatusGroup_FLEXCAN, 8), /*!< Rx Message FIFO is overflowed. */
158 kStatus_FLEXCAN_RxFifoWarning = MAKE_STATUS(kStatusGroup_FLEXCAN, 9), /*!< Rx Message FIFO is almost overflowed. */
159 kStatus_FLEXCAN_ErrorStatus = MAKE_STATUS(kStatusGroup_FLEXCAN, 10), /*!< FlexCAN Module Error and Status. */
160 kStatus_FLEXCAN_UnHandled = MAKE_STATUS(kStatusGroup_FLEXCAN, 11), /*!< UnHadled Interrupt asserted. */
161 };
162
163 /*! @brief FlexCAN frame format. */
164 typedef enum _flexcan_frame_format
165 {
166 kFLEXCAN_FrameFormatStandard = 0x0U, /*!< Standard frame format attribute. */
167 kFLEXCAN_FrameFormatExtend = 0x1U, /*!< Extend frame format attribute. */
168 } flexcan_frame_format_t;
169
170 /*! @brief FlexCAN frame type. */
171 typedef enum _flexcan_frame_type
172 {
173 kFLEXCAN_FrameTypeData = 0x0U, /*!< Data frame type attribute. */
174 kFLEXCAN_FrameTypeRemote = 0x1U, /*!< Remote frame type attribute. */
175 } flexcan_frame_type_t;
176
177 #if (!defined(FSL_FEATURE_FLEXCAN_SUPPORT_ENGINE_CLK_SEL_REMOVE)) || !FSL_FEATURE_FLEXCAN_SUPPORT_ENGINE_CLK_SEL_REMOVE
178 /*! @brief FlexCAN clock source. */
179 typedef enum _flexcan_clock_source
180 {
181 kFLEXCAN_ClkSrcOsc = 0x0U, /*!< FlexCAN Protocol Engine clock from Oscillator. */
182 kFLEXCAN_ClkSrcPeri = 0x1U, /*!< FlexCAN Protocol Engine clock from Peripheral Clock. */
183 } flexcan_clock_source_t;
184 #endif /* FSL_FEATURE_FLEXCAN_SUPPORT_ENGINE_CLK_SEL_REMOVE */
185
186 /*! @brief FlexCAN Rx Fifo Filter type. */
187 typedef enum _flexcan_rx_fifo_filter_type
188 {
189 kFLEXCAN_RxFifoFilterTypeA = 0x0U, /*!< One full ID (standard and extended) per ID Filter element. */
190 kFLEXCAN_RxFifoFilterTypeB =
191 0x1U, /*!< Two full standard IDs or two partial 14-bit ID slices per ID Filter Table element. */
192 kFLEXCAN_RxFifoFilterTypeC =
193 0x2U, /*!< Four partial 8-bit Standard or extended ID slices per ID Filter Table element. */
194 kFLEXCAN_RxFifoFilterTypeD = 0x3U, /*!< All frames rejected. */
195 } flexcan_rx_fifo_filter_type_t;
196
197 /*!
198 * @brief FlexCAN Rx FIFO priority.
199 *
200 * The matching process starts from the Rx MB(or Rx FIFO) with higher priority.
201 * If no MB(or Rx FIFO filter) is satisfied, the matching process goes on with
202 * the Rx FIFO(or Rx MB) with lower priority.
203 */
204 typedef enum _flexcan_rx_fifo_priority
205 {
206 kFLEXCAN_RxFifoPrioLow = 0x0U, /*!< Matching process start from Rx Message Buffer first*/
207 kFLEXCAN_RxFifoPrioHigh = 0x1U, /*!< Matching process start from Rx FIFO first*/
208 } flexcan_rx_fifo_priority_t;
209
210 /*!
211 * @brief FlexCAN interrupt configuration structure, default settings all disabled.
212 *
213 * This structure contains the settings for all of the FlexCAN Module interrupt configurations.
214 * Note: FlexCAN Message Buffers and Rx FIFO have their own interrupts.
215 */
216 enum _flexcan_interrupt_enable
217 {
218 kFLEXCAN_BusOffInterruptEnable = CAN_CTRL1_BOFFMSK_MASK, /*!< Bus Off interrupt. */
219 kFLEXCAN_ErrorInterruptEnable = CAN_CTRL1_ERRMSK_MASK, /*!< Error interrupt. */
220 kFLEXCAN_RxWarningInterruptEnable = CAN_CTRL1_RWRNMSK_MASK, /*!< Rx Warning interrupt. */
221 kFLEXCAN_TxWarningInterruptEnable = CAN_CTRL1_TWRNMSK_MASK, /*!< Tx Warning interrupt. */
222 kFLEXCAN_WakeUpInterruptEnable = CAN_MCR_WAKMSK_MASK, /*!< Wake Up interrupt. */
223 };
224
225 /*!
226 * @brief FlexCAN status flags.
227 *
228 * This provides constants for the FlexCAN status flags for use in the FlexCAN functions.
229 * Note: The CPU read action clears FlEXCAN_ErrorFlag, therefore user need to
230 * read FlEXCAN_ErrorFlag and distinguish which error is occur using
231 * @ref _flexcan_error_flags enumerations.
232 */
233 enum _flexcan_flags
234 {
235 kFLEXCAN_SynchFlag = CAN_ESR1_SYNCH_MASK, /*!< CAN Synchronization Status. */
236 kFLEXCAN_TxWarningIntFlag = CAN_ESR1_TWRNINT_MASK, /*!< Tx Warning Interrupt Flag. */
237 kFLEXCAN_RxWarningIntFlag = CAN_ESR1_RWRNINT_MASK, /*!< Rx Warning Interrupt Flag. */
238 kFLEXCAN_TxErrorWarningFlag = CAN_ESR1_TXWRN_MASK, /*!< Tx Error Warning Status. */
239 kFLEXCAN_RxErrorWarningFlag = CAN_ESR1_RXWRN_MASK, /*!< Rx Error Warning Status. */
240 kFLEXCAN_IdleFlag = CAN_ESR1_IDLE_MASK, /*!< CAN IDLE Status Flag. */
241 kFLEXCAN_FaultConfinementFlag = CAN_ESR1_FLTCONF_MASK, /*!< Fault Confinement State Flag. */
242 kFLEXCAN_TransmittingFlag = CAN_ESR1_TX_MASK, /*!< FlexCAN In Transmission Status. */
243 kFLEXCAN_ReceivingFlag = CAN_ESR1_RX_MASK, /*!< FlexCAN In Reception Status. */
244 kFLEXCAN_BusOffIntFlag = CAN_ESR1_BOFFINT_MASK, /*!< Bus Off Interrupt Flag. */
245 kFLEXCAN_ErrorIntFlag = CAN_ESR1_ERRINT_MASK, /*!< Error Interrupt Flag. */
246 kFLEXCAN_WakeUpIntFlag = CAN_ESR1_WAKINT_MASK, /*!< Wake-Up Interrupt Flag. */
247 kFLEXCAN_ErrorFlag = CAN_ESR1_BIT1ERR_MASK | /*!< All FlexCAN Error Status. */
248 CAN_ESR1_BIT0ERR_MASK |
249 CAN_ESR1_ACKERR_MASK | CAN_ESR1_CRCERR_MASK | CAN_ESR1_FRMERR_MASK | CAN_ESR1_STFERR_MASK,
250 };
251
252 /*!
253 * @brief FlexCAN error status flags.
254 *
255 * The FlexCAN Error Status enumerations is used to report current error of the FlexCAN bus.
256 * This enumerations should be used with KFLEXCAN_ErrorFlag in @ref _flexcan_flags enumerations
257 * to ditermine which error is generated.
258 */
259 enum _flexcan_error_flags
260 {
261 kFLEXCAN_StuffingError = CAN_ESR1_STFERR_MASK, /*!< Stuffing Error. */
262 kFLEXCAN_FormError = CAN_ESR1_FRMERR_MASK, /*!< Form Error. */
263 kFLEXCAN_CrcError = CAN_ESR1_CRCERR_MASK, /*!< Cyclic Redundancy Check Error. */
264 kFLEXCAN_AckError = CAN_ESR1_ACKERR_MASK, /*!< Received no ACK on transmission. */
265 kFLEXCAN_Bit0Error = CAN_ESR1_BIT0ERR_MASK, /*!< Unable to send dominant bit. */
266 kFLEXCAN_Bit1Error = CAN_ESR1_BIT1ERR_MASK, /*!< Unable to send recessive bit. */
267 };
268
269 /*!
270 * @brief FlexCAN Rx FIFO status flags.
271 *
272 * The FlexCAN Rx FIFO Status enumerations are used to determine the status of the
273 * Rx FIFO. Because Rx FIFO occupy the MB0 ~ MB7 (Rx Fifo filter also occupies
274 * more Message Buffer space), Rx FIFO status flags are mapped to the corresponding
275 * Message Buffer status flags.
276 */
277 enum _flexcan_rx_fifo_flags
278 {
279 kFLEXCAN_RxFifoOverflowFlag = CAN_IFLAG1_BUF7I_MASK, /*!< Rx FIFO overflow flag. */
280 kFLEXCAN_RxFifoWarningFlag = CAN_IFLAG1_BUF6I_MASK, /*!< Rx FIFO almost full flag. */
281 kFLEXCAN_RxFifoFrameAvlFlag = CAN_IFLAG1_BUF5I_MASK, /*!< Frames available in Rx FIFO flag. */
282 };
283
284 #if defined(__CC_ARM)
285 #pragma anon_unions
286 #endif
287 /*! @brief FlexCAN message frame structure. */
288 typedef struct _flexcan_frame
289 {
290 struct
291 {
292 uint32_t timestamp : 16; /*!< FlexCAN internal Free-Running Counter Time Stamp. */
293 uint32_t length : 4; /*!< CAN frame payload length in bytes(Range: 0~8). */
294 uint32_t type : 1; /*!< CAN Frame Type(DATA or REMOTE). */
295 uint32_t format : 1; /*!< CAN Frame Identifier(STD or EXT format). */
296 uint32_t : 1; /*!< Reserved. */
297 uint32_t idhit : 9; /*!< CAN Rx FIFO filter hit id(This value is only used in Rx FIFO receive mode). */
298 };
299 struct
300 {
301 uint32_t id : 29; /*!< CAN Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro. */
302 uint32_t : 3; /*!< Reserved. */
303 };
304 union
305 {
306 struct
307 {
308 uint32_t dataWord0; /*!< CAN Frame payload word0. */
309 uint32_t dataWord1; /*!< CAN Frame payload word1. */
310 };
311 struct
312 {
313 uint8_t dataByte3; /*!< CAN Frame payload byte3. */
314 uint8_t dataByte2; /*!< CAN Frame payload byte2. */
315 uint8_t dataByte1; /*!< CAN Frame payload byte1. */
316 uint8_t dataByte0; /*!< CAN Frame payload byte0. */
317 uint8_t dataByte7; /*!< CAN Frame payload byte7. */
318 uint8_t dataByte6; /*!< CAN Frame payload byte6. */
319 uint8_t dataByte5; /*!< CAN Frame payload byte5. */
320 uint8_t dataByte4; /*!< CAN Frame payload byte4. */
321 };
322 };
323 } flexcan_frame_t;
324
325 /*! @brief FlexCAN module configuration structure. */
326 typedef struct _flexcan_config
327 {
328 uint32_t baudRate; /*!< FlexCAN baud rate in bps. */
329 #if (!defined(FSL_FEATURE_FLEXCAN_SUPPORT_ENGINE_CLK_SEL_REMOVE)) || !FSL_FEATURE_FLEXCAN_SUPPORT_ENGINE_CLK_SEL_REMOVE
330 flexcan_clock_source_t clkSrc; /*!< Clock source for FlexCAN Protocol Engine. */
331 #endif /* FSL_FEATURE_FLEXCAN_SUPPORT_ENGINE_CLK_SEL_REMOVE */
332 uint8_t maxMbNum; /*!< The maximum number of Message Buffers used by user. */
333 bool enableLoopBack; /*!< Enable or Disable Loop Back Self Test Mode. */
334 bool enableSelfWakeup; /*!< Enable or Disable Self Wakeup Mode. */
335 bool enableIndividMask; /*!< Enable or Disable Rx Individual Mask. */
336 #if (defined(FSL_FEATURE_FLEXCAN_HAS_DOZE_MODE_SUPPORT) && FSL_FEATURE_FLEXCAN_HAS_DOZE_MODE_SUPPORT)
337 bool enableDoze; /*!< Enable or Disable Doze Mode. */
338 #endif
339 } flexcan_config_t;
340
341 /*! @brief FlexCAN protocol timing characteristic configuration structure. */
342 typedef struct _flexcan_timing_config
343 {
344 uint8_t preDivider; /*!< Clock Pre-scaler Division Factor. */
345 uint8_t rJumpwidth; /*!< Re-sync Jump Width. */
346 uint8_t phaseSeg1; /*!< Phase Segment 1. */
347 uint8_t phaseSeg2; /*!< Phase Segment 2. */
348 uint8_t propSeg; /*!< Propagation Segment. */
349 } flexcan_timing_config_t;
350
351 /*!
352 * @brief FlexCAN Receive Message Buffer configuration structure
353 *
354 * This structure is used as the parameter of FLEXCAN_SetRxMbConfig() function.
355 * The FLEXCAN_SetRxMbConfig() function is used to configure FlexCAN Receive
356 * Message Buffer. The function abort previous receiving process, clean the
357 * Message Buffer and activate the Rx Message Buffer using given Message Buffer
358 * setting.
359 */
360 typedef struct _flexcan_rx_mb_config
361 {
362 uint32_t id; /*!< CAN Message Buffer Frame Identifier, should be set using
363 FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro. */
364 flexcan_frame_format_t format; /*!< CAN Frame Identifier format(Standard of Extend). */
365 flexcan_frame_type_t type; /*!< CAN Frame Type(Data or Remote). */
366 } flexcan_rx_mb_config_t;
367
368 /*! @brief FlexCAN Rx FIFO configuration structure. */
369 typedef struct _flexcan_rx_fifo_config
370 {
371 uint32_t *idFilterTable; /*!< Pointer to the FlexCAN Rx FIFO identifier filter table. */
372 uint8_t idFilterNum; /*!< The quantity of filter elements. */
373 flexcan_rx_fifo_filter_type_t idFilterType; /*!< The FlexCAN Rx FIFO Filter type. */
374 flexcan_rx_fifo_priority_t priority; /*!< The FlexCAN Rx FIFO receive priority. */
375 } flexcan_rx_fifo_config_t;
376
377 /*! @brief FlexCAN Message Buffer transfer. */
378 typedef struct _flexcan_mb_transfer
379 {
380 flexcan_frame_t *frame; /*!< The buffer of CAN Message to be transfer. */
381 uint8_t mbIdx; /*!< The index of Message buffer used to transfer Message. */
382 } flexcan_mb_transfer_t;
383
384 /*! @brief FlexCAN Rx FIFO transfer. */
385 typedef struct _flexcan_fifo_transfer
386 {
387 flexcan_frame_t *frame; /*!< The buffer of CAN Message to be received from Rx FIFO. */
388 } flexcan_fifo_transfer_t;
389
390 /*! @brief FlexCAN handle structure definition. */
391 typedef struct _flexcan_handle flexcan_handle_t;
392
393 /*! @brief FlexCAN transfer callback function.
394 *
395 * The FlexCAN transfer callback returns a value from the underlying layer.
396 * If the status equals to kStatus_FLEXCAN_ErrorStatus, the result parameter is the Content of
397 * FlexCAN status register which can be used to get the working status(or error status) of FlexCAN module.
398 * If the status equals to other FlexCAN Message Buffer transfer status, the result is the index of
399 * Message Buffer that generate transfer event.
400 * If the status equals to other FlexCAN Message Buffer transfer status, the result is meaningless and should be
401 * Ignored.
402 */
403 typedef void (*flexcan_transfer_callback_t)(
404 CAN_Type *base, flexcan_handle_t *handle, status_t status, uint32_t result, void *userData);
405
406 /*! @brief FlexCAN handle structure. */
407 struct _flexcan_handle
408 {
409 flexcan_transfer_callback_t callback; /*!< Callback function. */
410 void *userData; /*!< FlexCAN callback function parameter.*/
411 flexcan_frame_t *volatile mbFrameBuf[CAN_WORD1_COUNT];
412 /*!< The buffer for received data from Message Buffers. */
413 flexcan_frame_t *volatile rxFifoFrameBuf; /*!< The buffer for received data from Rx FIFO. */
414 volatile uint8_t mbState[CAN_WORD1_COUNT]; /*!< Message Buffer transfer state. */
415 volatile uint8_t rxFifoState; /*!< Rx FIFO transfer state. */
416 };
417
418 /******************************************************************************
419 * API
420 *****************************************************************************/
421
422 #if defined(__cplusplus)
423 extern "C" {
424 #endif
425
426 /*!
427 * @name Initialization and deinitialization
428 * @{
429 */
430
431 /*!
432 * @brief Initializes a FlexCAN instance.
433 *
434 * This function initializes the FlexCAN module with user-defined settings.
435 * This example shows how to set up the flexcan_config_t parameters and how
436 * to call the FLEXCAN_Init function by passing in these parameters.
437 * @code
438 * flexcan_config_t flexcanConfig;
439 * flexcanConfig.clkSrc = kFLEXCAN_ClkSrcOsc;
440 * flexcanConfig.baudRate = 125000U;
441 * flexcanConfig.maxMbNum = 16;
442 * flexcanConfig.enableLoopBack = false;
443 * flexcanConfig.enableSelfWakeup = false;
444 * flexcanConfig.enableIndividMask = false;
445 * flexcanConfig.enableDoze = false;
446 * FLEXCAN_Init(CAN0, &flexcanConfig, 8000000UL);
447 * @endcode
448 *
449 * @param base FlexCAN peripheral base address.
450 * @param config Pointer to the user-defined configuration structure.
451 * @param sourceClock_Hz FlexCAN Protocol Engine clock source frequency in Hz.
452 */
453 void FLEXCAN_Init(CAN_Type *base, const flexcan_config_t *config, uint32_t sourceClock_Hz);
454
455 /*!
456 * @brief De-initializes a FlexCAN instance.
457 *
458 * This function disables the FlexCAN module clock and sets all register values
459 * to the reset value.
460 *
461 * @param base FlexCAN peripheral base address.
462 */
463 void FLEXCAN_Deinit(CAN_Type *base);
464
465 /*!
466 * @brief Gets the default configuration structure.
467 *
468 * This function initializes the FlexCAN configuration structure to default values. The default
469 * values are as follows.
470 * flexcanConfig->clkSrc = KFLEXCAN_ClkSrcOsc;
471 * flexcanConfig->baudRate = 125000U;
472 * flexcanConfig->maxMbNum = 16;
473 * flexcanConfig->enableLoopBack = false;
474 * flexcanConfig->enableSelfWakeup = false;
475 * flexcanConfig->enableIndividMask = false;
476 * flexcanConfig->enableDoze = false;
477 *
478 * @param config Pointer to the FlexCAN configuration structure.
479 */
480 void FLEXCAN_GetDefaultConfig(flexcan_config_t *config);
481
482 /* @} */
483
484 /*!
485 * @name Configuration.
486 * @{
487 */
488
489 /*!
490 * @brief Sets the FlexCAN protocol timing characteristic.
491 *
492 * This function gives user settings to CAN bus timing characteristic.
493 * The function is for an experienced user. For less experienced users, call
494 * the FLEXCAN_Init() and fill the baud rate field with a desired value.
495 * This provides the default timing characteristics to the module.
496 *
497 * Note that calling FLEXCAN_SetTimingConfig() overrides the baud rate set
498 * in FLEXCAN_Init().
499 *
500 * @param base FlexCAN peripheral base address.
501 * @param config Pointer to the timing configuration structure.
502 */
503 void FLEXCAN_SetTimingConfig(CAN_Type *base, const flexcan_timing_config_t *config);
504
505 /*!
506 * @brief Sets the FlexCAN receive message buffer global mask.
507 *
508 * This function sets the global mask for the FlexCAN message buffer in a matching process.
509 * The configuration is only effective when the Rx individual mask is disabled in the FLEXCAN_Init().
510 *
511 * @param base FlexCAN peripheral base address.
512 * @param mask Rx Message Buffer Global Mask value.
513 */
514 void FLEXCAN_SetRxMbGlobalMask(CAN_Type *base, uint32_t mask);
515
516 /*!
517 * @brief Sets the FlexCAN receive FIFO global mask.
518 *
519 * This function sets the global mask for FlexCAN FIFO in a matching process.
520 *
521 * @param base FlexCAN peripheral base address.
522 * @param mask Rx Fifo Global Mask value.
523 */
524 void FLEXCAN_SetRxFifoGlobalMask(CAN_Type *base, uint32_t mask);
525
526 /*!
527 * @brief Sets the FlexCAN receive individual mask.
528 *
529 * This function sets the individual mask for the FlexCAN matching process.
530 * The configuration is only effective when the Rx individual mask is enabled in the FLEXCAN_Init().
531 * If the Rx FIFO is disabled, the individual mask is applied to the corresponding Message Buffer.
532 * If the Rx FIFO is enabled, the individual mask for Rx FIFO occupied Message Buffer is applied to
533 * the Rx Filter with the same index. Note that only the first 32
534 * individual masks can be used as the Rx FIFO filter mask.
535 *
536 * @param base FlexCAN peripheral base address.
537 * @param maskIdx The Index of individual Mask.
538 * @param mask Rx Individual Mask value.
539 */
540 void FLEXCAN_SetRxIndividualMask(CAN_Type *base, uint8_t maskIdx, uint32_t mask);
541
542 /*!
543 * @brief Configures a FlexCAN transmit message buffer.
544 *
545 * This function aborts the previous transmission, cleans the Message Buffer, and
546 * configures it as a Transmit Message Buffer.
547 *
548 * @param base FlexCAN peripheral base address.
549 * @param mbIdx The Message Buffer index.
550 * @param enable Enable/disable Tx Message Buffer.
551 * - true: Enable Tx Message Buffer.
552 * - false: Disable Tx Message Buffer.
553 */
554 void FLEXCAN_SetTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable);
555
556 /*!
557 * @brief Configures a FlexCAN Receive Message Buffer.
558 *
559 * This function cleans a FlexCAN build-in Message Buffer and configures it
560 * as a Receive Message Buffer.
561 *
562 * @param base FlexCAN peripheral base address.
563 * @param mbIdx The Message Buffer index.
564 * @param config Pointer to the FlexCAN Message Buffer configuration structure.
565 * @param enable Enable/disable Rx Message Buffer.
566 * - true: Enable Rx Message Buffer.
567 * - false: Disable Rx Message Buffer.
568 */
569 void FLEXCAN_SetRxMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_rx_mb_config_t *config, bool enable);
570
571 /*!
572 * @brief Configures the FlexCAN Rx FIFO.
573 *
574 * This function configures the Rx FIFO with given Rx FIFO configuration.
575 *
576 * @param base FlexCAN peripheral base address.
577 * @param config Pointer to the FlexCAN Rx FIFO configuration structure.
578 * @param enable Enable/disable Rx FIFO.
579 * - true: Enable Rx FIFO.
580 * - false: Disable Rx FIFO.
581 */
582 void FLEXCAN_SetRxFifoConfig(CAN_Type *base, const flexcan_rx_fifo_config_t *config, bool enable);
583
584 /* @} */
585
586 /*!
587 * @name Status
588 * @{
589 */
590
591 /*!
592 * @brief Gets the FlexCAN module interrupt flags.
593 *
594 * This function gets all FlexCAN status flags. The flags are returned as the logical
595 * OR value of the enumerators @ref _flexcan_flags. To check the specific status,
596 * compare the return value with enumerators in @ref _flexcan_flags.
597 *
598 * @param base FlexCAN peripheral base address.
599 * @return FlexCAN status flags which are ORed by the enumerators in the _flexcan_flags.
600 */
FLEXCAN_GetStatusFlags(CAN_Type * base)601 static inline uint32_t FLEXCAN_GetStatusFlags(CAN_Type *base)
602 {
603 return base->ESR1;
604 }
605
606 /*!
607 * @brief Clears status flags with the provided mask.
608 *
609 * This function clears the FlexCAN status flags with a provided mask. An automatically cleared flag
610 * can't be cleared by this function.
611 *
612 * @param base FlexCAN peripheral base address.
613 * @param mask The status flags to be cleared, it is logical OR value of @ref _flexcan_flags.
614 */
FLEXCAN_ClearStatusFlags(CAN_Type * base,uint32_t mask)615 static inline void FLEXCAN_ClearStatusFlags(CAN_Type *base, uint32_t mask)
616 {
617 /* Write 1 to clear status flag. */
618 base->ESR1 = mask;
619 }
620
621 /*!
622 * @brief Gets the FlexCAN Bus Error Counter value.
623 *
624 * This function gets the FlexCAN Bus Error Counter value for both Tx and
625 * Rx direction. These values may be needed in the upper layer error handling.
626 *
627 * @param base FlexCAN peripheral base address.
628 * @param txErrBuf Buffer to store Tx Error Counter value.
629 * @param rxErrBuf Buffer to store Rx Error Counter value.
630 */
FLEXCAN_GetBusErrCount(CAN_Type * base,uint8_t * txErrBuf,uint8_t * rxErrBuf)631 static inline void FLEXCAN_GetBusErrCount(CAN_Type *base, uint8_t *txErrBuf, uint8_t *rxErrBuf)
632 {
633 if (txErrBuf)
634 {
635 *txErrBuf = (uint8_t)((base->ECR & CAN_ECR_TXERRCNT_MASK) >> CAN_ECR_TXERRCNT_SHIFT);
636 }
637
638 if (rxErrBuf)
639 {
640 *rxErrBuf = (uint8_t)((base->ECR & CAN_ECR_RXERRCNT_MASK) >> CAN_ECR_RXERRCNT_SHIFT);
641 }
642 }
643
644 /*!
645 * @brief Gets the FlexCAN Message Buffer interrupt flags.
646 *
647 * This function gets the interrupt flags of a given Message Buffers.
648 *
649 * @param base FlexCAN peripheral base address.
650 * @param mask The ORed FlexCAN Message Buffer mask.
651 * @return The status of given Message Buffers.
652 */
653 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
FLEXCAN_GetMbStatusFlags(CAN_Type * base,uint64_t mask)654 static inline uint64_t FLEXCAN_GetMbStatusFlags(CAN_Type *base, uint64_t mask)
655 #else
656 static inline uint32_t FLEXCAN_GetMbStatusFlags(CAN_Type *base, uint32_t mask)
657 #endif
658 {
659 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
660 return ((((uint64_t)base->IFLAG1) & mask) | ((((uint64_t)base->IFLAG2) << 32) & mask));
661 #else
662 return (base->IFLAG1 & mask);
663 #endif
664 }
665
666 /*!
667 * @brief Clears the FlexCAN Message Buffer interrupt flags.
668 *
669 * This function clears the interrupt flags of a given Message Buffers.
670 *
671 * @param base FlexCAN peripheral base address.
672 * @param mask The ORed FlexCAN Message Buffer mask.
673 */
674 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
FLEXCAN_ClearMbStatusFlags(CAN_Type * base,uint64_t mask)675 static inline void FLEXCAN_ClearMbStatusFlags(CAN_Type *base, uint64_t mask)
676 #else
677 static inline void FLEXCAN_ClearMbStatusFlags(CAN_Type *base, uint32_t mask)
678 #endif
679 {
680 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
681 base->IFLAG1 = (uint32_t)(mask & 0xFFFFFFFFU);
682 base->IFLAG2 = (uint32_t)(mask >> 32);
683 #else
684 base->IFLAG1 = mask;
685 #endif
686 }
687
688 /* @} */
689
690 /*!
691 * @name Interrupts
692 * @{
693 */
694
695 /*!
696 * @brief Enables FlexCAN interrupts according to the provided mask.
697 *
698 * This function enables the FlexCAN interrupts according to the provided mask. The mask
699 * is a logical OR of enumeration members, see @ref _flexcan_interrupt_enable.
700 *
701 * @param base FlexCAN peripheral base address.
702 * @param mask The interrupts to enable. Logical OR of @ref _flexcan_interrupt_enable.
703 */
FLEXCAN_EnableInterrupts(CAN_Type * base,uint32_t mask)704 static inline void FLEXCAN_EnableInterrupts(CAN_Type *base, uint32_t mask)
705 {
706 /* Solve Wake Up Interrupt. */
707 if (mask & kFLEXCAN_WakeUpInterruptEnable)
708 {
709 base->MCR |= CAN_MCR_WAKMSK_MASK;
710 }
711
712 /* Solve others. */
713 base->CTRL1 |= (mask & (~((uint32_t)kFLEXCAN_WakeUpInterruptEnable)));
714 }
715
716 /*!
717 * @brief Disables FlexCAN interrupts according to the provided mask.
718 *
719 * This function disables the FlexCAN interrupts according to the provided mask. The mask
720 * is a logical OR of enumeration members, see @ref _flexcan_interrupt_enable.
721 *
722 * @param base FlexCAN peripheral base address.
723 * @param mask The interrupts to disable. Logical OR of @ref _flexcan_interrupt_enable.
724 */
FLEXCAN_DisableInterrupts(CAN_Type * base,uint32_t mask)725 static inline void FLEXCAN_DisableInterrupts(CAN_Type *base, uint32_t mask)
726 {
727 /* Solve Wake Up Interrupt. */
728 if (mask & kFLEXCAN_WakeUpInterruptEnable)
729 {
730 base->MCR &= ~CAN_MCR_WAKMSK_MASK;
731 }
732
733 /* Solve others. */
734 base->CTRL1 &= ~(mask & (~((uint32_t)kFLEXCAN_WakeUpInterruptEnable)));
735 }
736
737 /*!
738 * @brief Enables FlexCAN Message Buffer interrupts.
739 *
740 * This function enables the interrupts of given Message Buffers.
741 *
742 * @param base FlexCAN peripheral base address.
743 * @param mask The ORed FlexCAN Message Buffer mask.
744 */
745 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
FLEXCAN_EnableMbInterrupts(CAN_Type * base,uint64_t mask)746 static inline void FLEXCAN_EnableMbInterrupts(CAN_Type *base, uint64_t mask)
747 #else
748 static inline void FLEXCAN_EnableMbInterrupts(CAN_Type *base, uint32_t mask)
749 #endif
750 {
751 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
752 base->IMASK1 |= (uint32_t)(mask & 0xFFFFFFFFU);
753 base->IMASK2 |= (uint32_t)(mask >> 32);
754 #else
755 base->IMASK1 |= mask;
756 #endif
757 }
758
759 /*!
760 * @brief Disables FlexCAN Message Buffer interrupts.
761 *
762 * This function disables the interrupts of given Message Buffers.
763 *
764 * @param base FlexCAN peripheral base address.
765 * @param mask The ORed FlexCAN Message Buffer mask.
766 */
767 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
FLEXCAN_DisableMbInterrupts(CAN_Type * base,uint64_t mask)768 static inline void FLEXCAN_DisableMbInterrupts(CAN_Type *base, uint64_t mask)
769 #else
770 static inline void FLEXCAN_DisableMbInterrupts(CAN_Type *base, uint32_t mask)
771 #endif
772 {
773 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
774 base->IMASK1 &= ~((uint32_t)(mask & 0xFFFFFFFFU));
775 base->IMASK2 &= ~((uint32_t)(mask >> 32));
776 #else
777 base->IMASK1 &= ~mask;
778 #endif
779 }
780
781 /* @} */
782
783 #if (defined(FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA) && FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA)
784 /*!
785 * @name DMA Control
786 * @{
787 */
788
789 /*!
790 * @brief Enables or disables the FlexCAN Rx FIFO DMA request.
791 *
792 * This function enables or disables the DMA feature of FlexCAN build-in Rx FIFO.
793 *
794 * @param base FlexCAN peripheral base address.
795 * @param enable true to enable, false to disable.
796 */
797 void FLEXCAN_EnableRxFifoDMA(CAN_Type *base, bool enable);
798
799 /*!
800 * @brief Gets the Rx FIFO Head address.
801 *
802 * This function returns the FlexCAN Rx FIFO Head address, which is mainly used for the DMA/eDMA use case.
803 *
804 * @param base FlexCAN peripheral base address.
805 * @return FlexCAN Rx FIFO Head address.
806 */
FLEXCAN_GetRxFifoHeadAddr(CAN_Type * base)807 static inline uint32_t FLEXCAN_GetRxFifoHeadAddr(CAN_Type *base)
808 {
809 return (uint32_t) & (base->MB[0].CS);
810 }
811
812 /* @} */
813 #endif /* FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA */
814
815 /*!
816 * @name Bus Operations
817 * @{
818 */
819
820 /*!
821 * @brief Enables or disables the FlexCAN module operation.
822 *
823 * This function enables or disables the FlexCAN module.
824 *
825 * @param base FlexCAN base pointer.
826 * @param enable true to enable, false to disable.
827 */
FLEXCAN_Enable(CAN_Type * base,bool enable)828 static inline void FLEXCAN_Enable(CAN_Type *base, bool enable)
829 {
830 if (enable)
831 {
832 base->MCR &= ~CAN_MCR_MDIS_MASK;
833
834 /* Wait FlexCAN exit from low-power mode. */
835 while (base->MCR & CAN_MCR_LPMACK_MASK)
836 {
837 }
838 }
839 else
840 {
841 base->MCR |= CAN_MCR_MDIS_MASK;
842
843 /* Wait FlexCAN enter low-power mode. */
844 while (!(base->MCR & CAN_MCR_LPMACK_MASK))
845 {
846 }
847 }
848 }
849
850 /*!
851 * @brief Writes a FlexCAN Message to the Transmit Message Buffer.
852 *
853 * This function writes a CAN Message to the specified Transmit Message Buffer
854 * and changes the Message Buffer state to start CAN Message transmit. After
855 * that the function returns immediately.
856 *
857 * @param base FlexCAN peripheral base address.
858 * @param mbIdx The FlexCAN Message Buffer index.
859 * @param txFrame Pointer to CAN message frame to be sent.
860 * @retval kStatus_Success - Write Tx Message Buffer Successfully.
861 * @retval kStatus_Fail - Tx Message Buffer is currently in use.
862 */
863 status_t FLEXCAN_WriteTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_frame_t *txFrame);
864
865 /*!
866 * @brief Reads a FlexCAN Message from Receive Message Buffer.
867 *
868 * This function reads a CAN message from a specified Receive Message Buffer.
869 * The function fills a receive CAN message frame structure with
870 * just received data and activates the Message Buffer again.
871 * The function returns immediately.
872 *
873 * @param base FlexCAN peripheral base address.
874 * @param mbIdx The FlexCAN Message Buffer index.
875 * @param rxFrame Pointer to CAN message frame structure for reception.
876 * @retval kStatus_Success - Rx Message Buffer is full and has been read successfully.
877 * @retval kStatus_FLEXCAN_RxOverflow - Rx Message Buffer is already overflowed and has been read successfully.
878 * @retval kStatus_Fail - Rx Message Buffer is empty.
879 */
880 status_t FLEXCAN_ReadRxMb(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *rxFrame);
881
882 /*!
883 * @brief Reads a FlexCAN Message from Rx FIFO.
884 *
885 * This function reads a CAN message from the FlexCAN build-in Rx FIFO.
886 *
887 * @param base FlexCAN peripheral base address.
888 * @param rxFrame Pointer to CAN message frame structure for reception.
889 * @retval kStatus_Success - Read Message from Rx FIFO successfully.
890 * @retval kStatus_Fail - Rx FIFO is not enabled.
891 */
892 status_t FLEXCAN_ReadRxFifo(CAN_Type *base, flexcan_frame_t *rxFrame);
893
894 /* @} */
895
896 /*!
897 * @name Transactional
898 * @{
899 */
900
901 /*!
902 * @brief Performs a polling send transaction on the CAN bus.
903 *
904 * Note that a transfer handle does not need to be created before calling this API.
905 *
906 * @param base FlexCAN peripheral base pointer.
907 * @param mbIdx The FlexCAN Message Buffer index.
908 * @param txFrame Pointer to CAN message frame to be sent.
909 * @retval kStatus_Success - Write Tx Message Buffer Successfully.
910 * @retval kStatus_Fail - Tx Message Buffer is currently in use.
911 */
912 status_t FLEXCAN_TransferSendBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *txFrame);
913
914 /*!
915 * @brief Performs a polling receive transaction on the CAN bus.
916 *
917 * Note that a transfer handle does not need to be created before calling this API.
918 *
919 * @param base FlexCAN peripheral base pointer.
920 * @param mbIdx The FlexCAN Message Buffer index.
921 * @param rxFrame Pointer to CAN message frame structure for reception.
922 * @retval kStatus_Success - Rx Message Buffer is full and has been read successfully.
923 * @retval kStatus_FLEXCAN_RxOverflow - Rx Message Buffer is already overflowed and has been read successfully.
924 * @retval kStatus_Fail - Rx Message Buffer is empty.
925 */
926 status_t FLEXCAN_TransferReceiveBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *rxFrame);
927
928 /*!
929 * @brief Performs a polling receive transaction from Rx FIFO on the CAN bus.
930 *
931 * Note that a transfer handle does not need to be created before calling this API.
932 *
933 * @param base FlexCAN peripheral base pointer.
934 * @param rxFrame Pointer to CAN message frame structure for reception.
935 * @retval kStatus_Success - Read Message from Rx FIFO successfully.
936 * @retval kStatus_Fail - Rx FIFO is not enabled.
937 */
938 status_t FLEXCAN_TransferReceiveFifoBlocking(CAN_Type *base, flexcan_frame_t *rxFrame);
939
940 /*!
941 * @brief Initializes the FlexCAN handle.
942 *
943 * This function initializes the FlexCAN handle, which can be used for other FlexCAN
944 * transactional APIs. Usually, for a specified FlexCAN instance,
945 * call this API once to get the initialized handle.
946 *
947 * @param base FlexCAN peripheral base address.
948 * @param handle FlexCAN handle pointer.
949 * @param callback The callback function.
950 * @param userData The parameter of the callback function.
951 */
952 void FLEXCAN_TransferCreateHandle(CAN_Type *base,
953 flexcan_handle_t *handle,
954 flexcan_transfer_callback_t callback,
955 void *userData);
956
957 /*!
958 * @brief Sends a message using IRQ.
959 *
960 * This function sends a message using IRQ. This is a non-blocking function, which returns
961 * right away. When messages have been sent out, the send callback function is called.
962 *
963 * @param base FlexCAN peripheral base address.
964 * @param handle FlexCAN handle pointer.
965 * @param xfer FlexCAN Message Buffer transfer structure. See the #flexcan_mb_transfer_t.
966 * @retval kStatus_Success Start Tx Message Buffer sending process successfully.
967 * @retval kStatus_Fail Write Tx Message Buffer failed.
968 * @retval kStatus_FLEXCAN_TxBusy Tx Message Buffer is in use.
969 */
970 status_t FLEXCAN_TransferSendNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *xfer);
971
972 /*!
973 * @brief Receives a message using IRQ.
974 *
975 * This function receives a message using IRQ. This is non-blocking function, which returns
976 * right away. When the message has been received, the receive callback function is called.
977 *
978 * @param base FlexCAN peripheral base address.
979 * @param handle FlexCAN handle pointer.
980 * @param xfer FlexCAN Message Buffer transfer structure. See the #flexcan_mb_transfer_t.
981 * @retval kStatus_Success - Start Rx Message Buffer receiving process successfully.
982 * @retval kStatus_FLEXCAN_RxBusy - Rx Message Buffer is in use.
983 */
984 status_t FLEXCAN_TransferReceiveNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *xfer);
985
986 /*!
987 * @brief Receives a message from Rx FIFO using IRQ.
988 *
989 * This function receives a message using IRQ. This is a non-blocking function, which returns
990 * right away. When all messages have been received, the receive callback function is called.
991 *
992 * @param base FlexCAN peripheral base address.
993 * @param handle FlexCAN handle pointer.
994 * @param xfer FlexCAN Rx FIFO transfer structure. See the @ref flexcan_fifo_transfer_t.
995 * @retval kStatus_Success - Start Rx FIFO receiving process successfully.
996 * @retval kStatus_FLEXCAN_RxFifoBusy - Rx FIFO is currently in use.
997 */
998 status_t FLEXCAN_TransferReceiveFifoNonBlocking(CAN_Type *base,
999 flexcan_handle_t *handle,
1000 flexcan_fifo_transfer_t *xfer);
1001
1002 /*!
1003 * @brief Aborts the interrupt driven message send process.
1004 *
1005 * This function aborts the interrupt driven message send process.
1006 *
1007 * @param base FlexCAN peripheral base address.
1008 * @param handle FlexCAN handle pointer.
1009 * @param mbIdx The FlexCAN Message Buffer index.
1010 */
1011 void FLEXCAN_TransferAbortSend(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx);
1012
1013 /*!
1014 * @brief Aborts the interrupt driven message receive process.
1015 *
1016 * This function aborts the interrupt driven message receive process.
1017 *
1018 * @param base FlexCAN peripheral base address.
1019 * @param handle FlexCAN handle pointer.
1020 * @param mbIdx The FlexCAN Message Buffer index.
1021 */
1022 void FLEXCAN_TransferAbortReceive(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx);
1023
1024 /*!
1025 * @brief Aborts the interrupt driven message receive from Rx FIFO process.
1026 *
1027 * This function aborts the interrupt driven message receive from Rx FIFO process.
1028 *
1029 * @param base FlexCAN peripheral base address.
1030 * @param handle FlexCAN handle pointer.
1031 */
1032 void FLEXCAN_TransferAbortReceiveFifo(CAN_Type *base, flexcan_handle_t *handle);
1033
1034 /*!
1035 * @brief FlexCAN IRQ handle function.
1036 *
1037 * This function handles the FlexCAN Error, the Message Buffer, and the Rx FIFO IRQ request.
1038 *
1039 * @param base FlexCAN peripheral base address.
1040 * @param handle FlexCAN handle pointer.
1041 */
1042 void FLEXCAN_TransferHandleIRQ(CAN_Type *base, flexcan_handle_t *handle);
1043
1044 /* @} */
1045
1046 #if defined(__cplusplus)
1047 }
1048 #endif
1049
1050 /*! @}*/
1051
1052 #endif /* _FSL_FLEXCAN_H_ */
1053