1 /* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
2
3 * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
4 * the the People's Republic of China and other countries.
5 * All Allwinner Technology Co.,Ltd. trademarks are used with permission.
6
7 * DISCLAIMER
8 * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
9 * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
10 * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
11 * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
12 * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
13 * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
14 * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY.
15
16
17 * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
18 * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
19 * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
20 * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
21 * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
22 * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
29 * OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <stdio.h>
33 #include "stdint.h"
34 #include "mbus.h"
35
mbus_get_cpu_ddr(void)36 uint32_t mbus_get_cpu_ddr(void)
37 {
38 return MBUS_PMU->MC_CPU_BWCR;
39 }
40
mbus_get_gpu_ddr(void)41 uint32_t mbus_get_gpu_ddr(void)
42 {
43 #ifdef CONFIG_DRIVERS_MBUS_GPU_BW
44 return MBUS_PMU->MC_GPU_BWCR;
45 #else
46 return 0;
47 #endif
48 }
49
mbus_get_rv_sys_ddr(void)50 uint32_t mbus_get_rv_sys_ddr(void)
51 {
52 #ifdef CONFIG_DRIVERS_MBUS_RV_SYS_BW
53 return MBUS_PMU->MC_RV_SYS_BWCR;
54 #else
55 return 0;
56 #endif
57 }
58
mbus_get_mahb_ddr(void)59 uint32_t mbus_get_mahb_ddr(void)
60 {
61 #ifdef CONFIG_DRIVERS_MBUS_MAHB_BW
62 return MBUS_PMU->MC_MAHB_BWCR;
63 #else
64 return 0;
65 #endif
66 }
67
mbus_get_dma_ddr(void)68 uint32_t mbus_get_dma_ddr(void)
69 {
70 #ifdef CONFIG_DRIVERS_MBUS_DMA_BW
71 return MBUS_PMU->MC_DMA_BWCR;
72 #else
73 return 0;
74 #endif
75 }
76
mbus_get_ce_ddr(void)77 uint32_t mbus_get_ce_ddr(void)
78 {
79 #ifdef CONFIG_DRIVERS_MBUS_CE_BW
80 return MBUS_PMU->MC_CE_BWCR;
81 #else
82 return 0;
83 #endif
84 }
85
mbus_get_tvd_ddr(void)86 uint32_t mbus_get_tvd_ddr(void)
87 {
88 #ifdef CONFIG_DRIVERS_MBUS_TVD_BW
89 return MBUS_PMU->MC_TVD_BWCR;
90 #else
91 return 0;
92 #endif
93 }
94
mbus_get_csi_ddr(void)95 uint32_t mbus_get_csi_ddr(void)
96 {
97 #ifdef CONFIG_DRIVERS_MBUS_CSI_BW
98 return MBUS_PMU->MC_CSI_BWCR;
99 #else
100 return 0;
101 #endif
102 }
103
mbus_get_dsp_sys_ddr(void)104 uint32_t mbus_get_dsp_sys_ddr(void)
105 {
106 #ifdef CONFIG_DRIVERS_MBUS_DSP_SYS_BW
107 return MBUS_PMU->MC_DSP_SYS_BWCR;
108 #else
109 return 0;
110 #endif
111 }
112
mbus_get_g2d_ddr(void)113 uint32_t mbus_get_g2d_ddr(void)
114 {
115 #ifdef CONFIG_DRIVERS_MBUS_G2D_BW
116 return MBUS_PMU->MC_G2D_BWCR;
117 #else
118 return 0;
119 #endif
120 }
121
mbus_get_di_ddr(void)122 uint32_t mbus_get_di_ddr(void)
123 {
124 #ifdef CONFIG_DRIVERS_MBUS_DI_BW
125 return MBUS_PMU->MC_DI_BWCR;
126 #else
127 return 0;
128 #endif
129 }
130
mbus_get_iommu_ddr(void)131 uint32_t mbus_get_iommu_ddr(void)
132 {
133 #ifdef CONFIG_DRIVERS_MBUS_DI_BW
134 return MBUS_PMU->MC_IOMMU_BWCR;
135 #else
136 return 0;
137 #endif
138 }
139
mbus_get_ve_ddr(void)140 uint32_t mbus_get_ve_ddr(void)
141 {
142 return MBUS_PMU->MC_VE_BWCR;
143 }
144
mbus_get_de_ddr(void)145 uint32_t mbus_get_de_ddr(void)
146 {
147 return MBUS_PMU->MC_DE_BWCR;
148 }
149
mbus_get_oth_ddr(void)150 uint32_t mbus_get_oth_ddr(void)
151 {
152 return MBUS_PMU->MC_OTHER_BWCR;
153 }
154
mbus_get_total_ddr(void)155 uint32_t mbus_get_total_ddr(void)
156 {
157 return MBUS_PMU->MC_TOTAL_BWCR;
158 }
159
mbus_pmu_enable(void)160 void mbus_pmu_enable(void)
161 {
162 //unit : 1Byte.
163 MBUS_PMU->MC_MCGCR = 0x10000001;
164 }
165