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/bsp/microchip/samd51-adafruit-metro-m4/bsp/hal/utils/include/
A Dutils_repeat_macro.h53 #define REPEAT_MACRO(macro, arg, n) REPEAT_MACRO_I(macro, arg, n) argument
59 #define REPEAT_MACRO_I(macro, arg, n) REPEAT##n(macro, arg, 0) argument
61 #define REPEAT1(macro, arg, n) macro(arg, n) argument
62 #define REPEAT2(macro, arg, n) macro(arg, n) REPEAT1(macro, arg, INC_VALUE(n)) argument
63 #define REPEAT3(macro, arg, n) macro(arg, n) REPEAT2(macro, arg, INC_VALUE(n)) argument
64 #define REPEAT4(macro, arg, n) macro(arg, n) REPEAT3(macro, arg, INC_VALUE(n)) argument
65 #define REPEAT5(macro, arg, n) macro(arg, n) REPEAT4(macro, arg, INC_VALUE(n)) argument
66 #define REPEAT6(macro, arg, n) macro(arg, n) REPEAT5(macro, arg, INC_VALUE(n)) argument
67 #define REPEAT7(macro, arg, n) macro(arg, n) REPEAT6(macro, arg, INC_VALUE(n)) argument
68 #define REPEAT8(macro, arg, n) macro(arg, n) REPEAT7(macro, arg, INC_VALUE(n)) argument
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/bsp/microchip/samc21/bsp/hal/utils/include/
A Dutils_repeat_macro.h53 #define REPEAT_MACRO(macro, arg, n) REPEAT_MACRO_I(macro, arg, n) argument
59 #define REPEAT_MACRO_I(macro, arg, n) REPEAT##n(macro, arg, 0) argument
61 #define REPEAT1(macro, arg, n) macro(arg, n) argument
62 #define REPEAT2(macro, arg, n) macro(arg, n) REPEAT1(macro, arg, INC_VALUE(n)) argument
63 #define REPEAT3(macro, arg, n) macro(arg, n) REPEAT2(macro, arg, INC_VALUE(n)) argument
64 #define REPEAT4(macro, arg, n) macro(arg, n) REPEAT3(macro, arg, INC_VALUE(n)) argument
65 #define REPEAT5(macro, arg, n) macro(arg, n) REPEAT4(macro, arg, INC_VALUE(n)) argument
66 #define REPEAT6(macro, arg, n) macro(arg, n) REPEAT5(macro, arg, INC_VALUE(n)) argument
67 #define REPEAT7(macro, arg, n) macro(arg, n) REPEAT6(macro, arg, INC_VALUE(n)) argument
68 #define REPEAT8(macro, arg, n) macro(arg, n) REPEAT7(macro, arg, INC_VALUE(n)) argument
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/bsp/microchip/samd51-seeed-wio-terminal/bsp/hal/utils/include/
A Dutils_repeat_macro.h53 #define REPEAT_MACRO(macro, arg, n) REPEAT_MACRO_I(macro, arg, n) argument
59 #define REPEAT_MACRO_I(macro, arg, n) REPEAT##n(macro, arg, 0) argument
61 #define REPEAT1(macro, arg, n) macro(arg, n) argument
62 #define REPEAT2(macro, arg, n) macro(arg, n) REPEAT1(macro, arg, INC_VALUE(n)) argument
63 #define REPEAT3(macro, arg, n) macro(arg, n) REPEAT2(macro, arg, INC_VALUE(n)) argument
64 #define REPEAT4(macro, arg, n) macro(arg, n) REPEAT3(macro, arg, INC_VALUE(n)) argument
65 #define REPEAT5(macro, arg, n) macro(arg, n) REPEAT4(macro, arg, INC_VALUE(n)) argument
66 #define REPEAT6(macro, arg, n) macro(arg, n) REPEAT5(macro, arg, INC_VALUE(n)) argument
67 #define REPEAT7(macro, arg, n) macro(arg, n) REPEAT6(macro, arg, INC_VALUE(n)) argument
68 #define REPEAT8(macro, arg, n) macro(arg, n) REPEAT7(macro, arg, INC_VALUE(n)) argument
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/bsp/microchip/saml10/bsp/hal/utils/include/
A Dutils_repeat_macro.h53 #define REPEAT_MACRO(macro, arg, n) REPEAT_MACRO_I(macro, arg, n) argument
59 #define REPEAT_MACRO_I(macro, arg, n) REPEAT##n(macro, arg, 0) argument
61 #define REPEAT1(macro, arg, n) macro(arg, n) argument
62 #define REPEAT2(macro, arg, n) macro(arg, n) REPEAT1(macro, arg, INC_VALUE(n)) argument
63 #define REPEAT3(macro, arg, n) macro(arg, n) REPEAT2(macro, arg, INC_VALUE(n)) argument
64 #define REPEAT4(macro, arg, n) macro(arg, n) REPEAT3(macro, arg, INC_VALUE(n)) argument
65 #define REPEAT5(macro, arg, n) macro(arg, n) REPEAT4(macro, arg, INC_VALUE(n)) argument
66 #define REPEAT6(macro, arg, n) macro(arg, n) REPEAT5(macro, arg, INC_VALUE(n)) argument
67 #define REPEAT7(macro, arg, n) macro(arg, n) REPEAT6(macro, arg, INC_VALUE(n)) argument
68 #define REPEAT8(macro, arg, n) macro(arg, n) REPEAT7(macro, arg, INC_VALUE(n)) argument
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/bsp/microchip/same70/bsp/hal/utils/include/
A Dutils_repeat_macro.h53 #define REPEAT_MACRO(macro, arg, n) REPEAT_MACRO_I(macro, arg, n) argument
59 #define REPEAT_MACRO_I(macro, arg, n) REPEAT##n(macro, arg, 0) argument
61 #define REPEAT1(macro, arg, n) macro(arg, n) argument
62 #define REPEAT2(macro, arg, n) macro(arg, n) REPEAT1(macro, arg, INC_VALUE(n)) argument
63 #define REPEAT3(macro, arg, n) macro(arg, n) REPEAT2(macro, arg, INC_VALUE(n)) argument
64 #define REPEAT4(macro, arg, n) macro(arg, n) REPEAT3(macro, arg, INC_VALUE(n)) argument
65 #define REPEAT5(macro, arg, n) macro(arg, n) REPEAT4(macro, arg, INC_VALUE(n)) argument
66 #define REPEAT6(macro, arg, n) macro(arg, n) REPEAT5(macro, arg, INC_VALUE(n)) argument
67 #define REPEAT7(macro, arg, n) macro(arg, n) REPEAT6(macro, arg, INC_VALUE(n)) argument
68 #define REPEAT8(macro, arg, n) macro(arg, n) REPEAT7(macro, arg, INC_VALUE(n)) argument
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/bsp/microchip/same54/bsp/hal/utils/include/
A Dutils_repeat_macro.h53 #define REPEAT_MACRO(macro, arg, n) REPEAT_MACRO_I(macro, arg, n) argument
59 #define REPEAT_MACRO_I(macro, arg, n) REPEAT##n(macro, arg, 0) argument
61 #define REPEAT1(macro, arg, n) macro(arg, n) argument
62 #define REPEAT2(macro, arg, n) macro(arg, n) REPEAT1(macro, arg, INC_VALUE(n)) argument
63 #define REPEAT3(macro, arg, n) macro(arg, n) REPEAT2(macro, arg, INC_VALUE(n)) argument
64 #define REPEAT4(macro, arg, n) macro(arg, n) REPEAT3(macro, arg, INC_VALUE(n)) argument
65 #define REPEAT5(macro, arg, n) macro(arg, n) REPEAT4(macro, arg, INC_VALUE(n)) argument
66 #define REPEAT6(macro, arg, n) macro(arg, n) REPEAT5(macro, arg, INC_VALUE(n)) argument
67 #define REPEAT7(macro, arg, n) macro(arg, n) REPEAT6(macro, arg, INC_VALUE(n)) argument
68 #define REPEAT8(macro, arg, n) macro(arg, n) REPEAT7(macro, arg, INC_VALUE(n)) argument
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/bsp/nxp/imx/imxrt/libraries/drivers/usb/include/
A Dusb_misc.h102 #define SWAP4BYTE_CONST(n) \ argument
140 #define USB_SHORT_TO_BIG_ENDIAN(n) (n) argument
141 #define USB_LONG_TO_BIG_ENDIAN(n) (n) argument
142 #define USB_SHORT_FROM_BIG_ENDIAN(n) (n) argument
143 #define USB_LONG_FROM_BIG_ENDIAN(n) (n) argument
203 #define USB_SHORT_FROM_LITTLE_ENDIAN_DATA(n) \ argument
208 #define USB_SHORT_TO_LITTLE_ENDIAN(n) (n) argument
209 #define USB_LONG_TO_LITTLE_ENDIAN(n) (n) argument
210 #define USB_SHORT_FROM_LITTLE_ENDIAN(n) (n) argument
211 #define USB_LONG_FROM_LITTLE_ENDIAN(n) (n) argument
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/bsp/apollo2/libraries/drivers/hal/
A Dam_hal_gpio.h77 #define AM_HAL_GPIO_BIT(n) (((uint64_t) 0x1) << n) argument
248 #define AM_HAL_GPIO_PADREG(n) \ argument
251 #define AM_HAL_GPIO_PADREG_S(n) \ argument
254 #define AM_HAL_GPIO_PADREG_M(n) \ argument
257 #define AM_HAL_GPIO_PADREG_FIELD(n, configval) \ argument
260 #define AM_HAL_GPIO_PADREG_W(n, configval) \ argument
265 #define AM_HAL_GPIO_PADREG_R(n) \ argument
276 #define AM_HAL_GPIO_ALTPADREG(n) \ argument
279 #define AM_HAL_GPIO_ALTPADREG_S(n) \ argument
282 #define AM_HAL_GPIO_ALTPADREG_M(n) \ argument
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/bsp/apollo2/libraries/drivers/regs/
A Dam_reg_sysctrl.h53 #define AM_REG_SYSCTRLn(n) \ argument
91 #define AM_REG_SYSCTRL_ICTR_INTLINESNUM(n) (((uint32_t)(n) << 0) & 0x0000000F) argument
101 #define AM_REG_SYSCTRL_ACTLR_DISFPCA(n) (((uint32_t)(n) << 9) & 0x00000200) argument
107 #define AM_REG_SYSCTRL_ACTLR_DISOOFP(n) (((uint32_t)(n) << 8) & 0x00000100) argument
112 #define AM_REG_SYSCTRL_ACTLR_DISFOLD(n) (((uint32_t)(n) << 2) & 0x00000004) argument
117 #define AM_REG_SYSCTRL_ACTLR_DISDEFWBUF(n) (((uint32_t)(n) << 1) & 0x00000002) argument
122 #define AM_REG_SYSCTRL_ACTLR_DISMCYCINT(n) (((uint32_t)(n) << 0) & 0x00000001) argument
132 #define AM_REG_SYSCTRL_ICSR_NMIPENDSET(n) (((uint32_t)(n) << 31) & 0x80000000) argument
137 #define AM_REG_SYSCTRL_ICSR_PENDSVSET(n) (((uint32_t)(n) << 28) & 0x10000000) argument
179 #define AM_REG_SYSCTRL_ICSR_VECTACTIVE(n) (((uint32_t)(n) << 0) & 0x000001FF) argument
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A Dam_reg_uart.h53 #define AM_REG_UARTn(n) \ argument
83 #define AM_REG_UART_DR_OEDATA(n) (((uint32_t)(n) << 11) & 0x00000800) argument
90 #define AM_REG_UART_DR_BEDATA(n) (((uint32_t)(n) << 10) & 0x00000400) argument
97 #define AM_REG_UART_DR_PEDATA(n) (((uint32_t)(n) << 9) & 0x00000200) argument
104 #define AM_REG_UART_DR_FEDATA(n) (((uint32_t)(n) << 8) & 0x00000100) argument
111 #define AM_REG_UART_DR_DATA(n) (((uint32_t)(n) << 0) & 0x000000FF) argument
121 #define AM_REG_UART_RSR_OESTAT(n) (((uint32_t)(n) << 3) & 0x00000008) argument
128 #define AM_REG_UART_RSR_BESTAT(n) (((uint32_t)(n) << 2) & 0x00000004) argument
135 #define AM_REG_UART_RSR_PESTAT(n) (((uint32_t)(n) << 1) & 0x00000002) argument
142 #define AM_REG_UART_RSR_FESTAT(n) (((uint32_t)(n) << 0) & 0x00000001) argument
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A Dam_reg_ioslave.h53 #define AM_REG_IOSLAVEn(n) \ argument
88 #define AM_REG_IOSLAVE_INTEN_XCMPWR(n) (((uint32_t)(n) << 9) & 0x00000200) argument
93 #define AM_REG_IOSLAVE_INTEN_XCMPWF(n) (((uint32_t)(n) << 8) & 0x00000100) argument
98 #define AM_REG_IOSLAVE_INTEN_XCMPRR(n) (((uint32_t)(n) << 7) & 0x00000080) argument
103 #define AM_REG_IOSLAVE_INTEN_XCMPRF(n) (((uint32_t)(n) << 6) & 0x00000040) argument
108 #define AM_REG_IOSLAVE_INTEN_IOINTW(n) (((uint32_t)(n) << 5) & 0x00000020) argument
113 #define AM_REG_IOSLAVE_INTEN_GENAD(n) (((uint32_t)(n) << 4) & 0x00000010) argument
118 #define AM_REG_IOSLAVE_INTEN_FRDERR(n) (((uint32_t)(n) << 3) & 0x00000008) argument
123 #define AM_REG_IOSLAVE_INTEN_FUNDFL(n) (((uint32_t)(n) << 2) & 0x00000004) argument
128 #define AM_REG_IOSLAVE_INTEN_FOVFL(n) (((uint32_t)(n) << 1) & 0x00000002) argument
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A Dam_reg_iomstr.h53 #define AM_REG_IOMSTRn(n) \ argument
85 #define AM_REG_IOMSTR_INTEN_ARB(n) (((uint32_t)(n) << 10) & 0x00000400) argument
90 #define AM_REG_IOMSTR_INTEN_STOP(n) (((uint32_t)(n) << 9) & 0x00000200) argument
96 #define AM_REG_IOMSTR_INTEN_START(n) (((uint32_t)(n) << 8) & 0x00000100) argument
103 #define AM_REG_IOMSTR_INTEN_ICMD(n) (((uint32_t)(n) << 7) & 0x00000080) argument
110 #define AM_REG_IOMSTR_INTEN_IACC(n) (((uint32_t)(n) << 6) & 0x00000040) argument
115 #define AM_REG_IOMSTR_INTEN_WTLEN(n) (((uint32_t)(n) << 5) & 0x00000020) argument
121 #define AM_REG_IOMSTR_INTEN_NAK(n) (((uint32_t)(n) << 4) & 0x00000010) argument
127 #define AM_REG_IOMSTR_INTEN_FOVFL(n) (((uint32_t)(n) << 3) & 0x00000008) argument
133 #define AM_REG_IOMSTR_INTEN_FUNDFL(n) (((uint32_t)(n) << 2) & 0x00000004) argument
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A Dam_reg_gpio.h53 #define AM_REG_GPIOn(n) \ argument
142 #define AM_REG_GPIO_INT0EN_GPIO31(n) (((uint32_t)(n) << 31) & 0x80000000) argument
147 #define AM_REG_GPIO_INT0EN_GPIO30(n) (((uint32_t)(n) << 30) & 0x40000000) argument
152 #define AM_REG_GPIO_INT0EN_GPIO29(n) (((uint32_t)(n) << 29) & 0x20000000) argument
157 #define AM_REG_GPIO_INT0EN_GPIO28(n) (((uint32_t)(n) << 28) & 0x10000000) argument
162 #define AM_REG_GPIO_INT0EN_GPIO27(n) (((uint32_t)(n) << 27) & 0x08000000) argument
167 #define AM_REG_GPIO_INT0EN_GPIO26(n) (((uint32_t)(n) << 26) & 0x04000000) argument
252 #define AM_REG_GPIO_INT0EN_GPIO9(n) (((uint32_t)(n) << 9) & 0x00000200) argument
257 #define AM_REG_GPIO_INT0EN_GPIO8(n) (((uint32_t)(n) << 8) & 0x00000100) argument
262 #define AM_REG_GPIO_INT0EN_GPIO7(n) (((uint32_t)(n) << 7) & 0x00000080) argument
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A Dam_reg_ctimer.h53 #define AM_REG_CTIMERn(n) \ argument
112 #define AM_REG_CTIMER_INTEN_CTMRB3C1INT(n) (((uint32_t)(n) << 15) & 0x00008000) argument
117 #define AM_REG_CTIMER_INTEN_CTMRA3C1INT(n) (((uint32_t)(n) << 14) & 0x00004000) argument
142 #define AM_REG_CTIMER_INTEN_CTMRB0C1INT(n) (((uint32_t)(n) << 9) & 0x00000200) argument
147 #define AM_REG_CTIMER_INTEN_CTMRA0C1INT(n) (((uint32_t)(n) << 8) & 0x00000100) argument
152 #define AM_REG_CTIMER_INTEN_CTMRB3C0INT(n) (((uint32_t)(n) << 7) & 0x00000080) argument
157 #define AM_REG_CTIMER_INTEN_CTMRA3C0INT(n) (((uint32_t)(n) << 6) & 0x00000040) argument
162 #define AM_REG_CTIMER_INTEN_CTMRB2C0INT(n) (((uint32_t)(n) << 5) & 0x00000020) argument
167 #define AM_REG_CTIMER_INTEN_CTMRA2C0INT(n) (((uint32_t)(n) << 4) & 0x00000010) argument
172 #define AM_REG_CTIMER_INTEN_CTMRB1C0INT(n) (((uint32_t)(n) << 3) & 0x00000008) argument
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A Dam_reg_nvic.h53 #define AM_REG_NVICn(n) \ argument
83 #define AM_REG_NVIC_ISER0_BITS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
93 #define AM_REG_NVIC_ICER0_BITS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
103 #define AM_REG_NVIC_ISPR0_BITS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
113 #define AM_REG_NVIC_ICPR0_BITS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
123 #define AM_REG_NVIC_IABR0_BITS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
143 #define AM_REG_NVIC_IPR0_PRI_N1(n) (((uint32_t)(n) << 8) & 0x0000FF00) argument
148 #define AM_REG_NVIC_IPR0_PRI_N0(n) (((uint32_t)(n) << 0) & 0x000000FF) argument
168 #define AM_REG_NVIC_IPR1_PRI_N1(n) (((uint32_t)(n) << 8) & 0x0000FF00) argument
173 #define AM_REG_NVIC_IPR1_PRI_N0(n) (((uint32_t)(n) << 0) & 0x000000FF) argument
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A Dam_reg_cachectrl.h53 #define AM_REG_CACHECTRLn(n) \ argument
88 #define AM_REG_CACHECTRL_CACHECFG_ENABLE_MONITOR(n) (((uint32_t)(n) << 24) & 0x01000000) argument
94 #define AM_REG_CACHECTRL_CACHECFG_DATA_CLKGATE(n) (((uint32_t)(n) << 20) & 0x00100000) argument
99 #define AM_REG_CACHECTRL_CACHECFG_SMDLY(n) (((uint32_t)(n) << 16) & 0x000F0000) argument
104 #define AM_REG_CACHECTRL_CACHECFG_DLY(n) (((uint32_t)(n) << 12) & 0x0000F000) argument
125 #define AM_REG_CACHECTRL_CACHECFG_DCACHE_ENABLE(n) (((uint32_t)(n) << 9) & 0x00000200) argument
131 #define AM_REG_CACHECTRL_CACHECFG_ICACHE_ENABLE(n) (((uint32_t)(n) << 8) & 0x00000100) argument
136 #define AM_REG_CACHECTRL_CACHECFG_SERIAL(n) (((uint32_t)(n) << 7) & 0x00000080) argument
141 #define AM_REG_CACHECTRL_CACHECFG_CONFIG(n) (((uint32_t)(n) << 4) & 0x00000070) argument
148 #define AM_REG_CACHECTRL_CACHECFG_ENABLE_NC1(n) (((uint32_t)(n) << 3) & 0x00000008) argument
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A Dam_reg_itm.h53 #define AM_REG_ITMn(n) \ argument
126 #define AM_REG_ITM_STIM0_STIM0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
136 #define AM_REG_ITM_STIM1_STIM1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
146 #define AM_REG_ITM_STIM2_STIM2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
156 #define AM_REG_ITM_STIM3_STIM3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
166 #define AM_REG_ITM_STIM4_STIM4(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
176 #define AM_REG_ITM_STIM5_STIM5(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
186 #define AM_REG_ITM_STIM6_STIM6(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
196 #define AM_REG_ITM_STIM7_STIM7(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
206 #define AM_REG_ITM_STIM8_STIM8(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
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A Dam_reg_mcuctrl.h53 #define AM_REG_MCUCTRLn(n) \ argument
102 #define AM_REG_MCUCTRL_CHIP_INFO_PARTNUM(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
115 #define AM_REG_MCUCTRL_CHIPID0_VALUE(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
126 #define AM_REG_MCUCTRL_CHIPID1_VALUE(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
137 #define AM_REG_MCUCTRL_CHIPREV_REVMAJ(n) (((uint32_t)(n) << 4) & 0x000000F0) argument
144 #define AM_REG_MCUCTRL_CHIPREV_REVMIN(n) (((uint32_t)(n) << 0) & 0x0000000F) argument
156 #define AM_REG_MCUCTRL_VENDORID_VALUE(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
167 #define AM_REG_MCUCTRL_DEBUGGER_LOCKOUT(n) (((uint32_t)(n) << 0) & 0x00000001) argument
179 #define AM_REG_MCUCTRL_BUCK_MEMBUCKRST(n) (((uint32_t)(n) << 7) & 0x00000080) argument
186 #define AM_REG_MCUCTRL_BUCK_COREBUCKRST(n) (((uint32_t)(n) << 6) & 0x00000040) argument
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A Dam_reg_rtc.h53 #define AM_REG_RTCn(n) \ argument
79 #define AM_REG_RTC_INTEN_ALM(n) (((uint32_t)(n) << 3) & 0x00000008) argument
84 #define AM_REG_RTC_INTEN_OF(n) (((uint32_t)(n) << 2) & 0x00000004) argument
89 #define AM_REG_RTC_INTEN_ACC(n) (((uint32_t)(n) << 1) & 0x00000002) argument
94 #define AM_REG_RTC_INTEN_ACF(n) (((uint32_t)(n) << 0) & 0x00000001) argument
104 #define AM_REG_RTC_INTSTAT_ALM(n) (((uint32_t)(n) << 3) & 0x00000008) argument
109 #define AM_REG_RTC_INTSTAT_OF(n) (((uint32_t)(n) << 2) & 0x00000004) argument
114 #define AM_REG_RTC_INTSTAT_ACC(n) (((uint32_t)(n) << 1) & 0x00000002) argument
119 #define AM_REG_RTC_INTSTAT_ACF(n) (((uint32_t)(n) << 0) & 0x00000001) argument
129 #define AM_REG_RTC_INTCLR_ALM(n) (((uint32_t)(n) << 3) & 0x00000008) argument
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A Dam_reg_pwrctrl.h53 #define AM_REG_PWRCTRLn(n) \ argument
88 #define AM_REG_PWRCTRL_SUPPLYSRC_COREBUCKEN(n) (((uint32_t)(n) << 1) & 0x00000002) argument
95 #define AM_REG_PWRCTRL_SUPPLYSRC_MEMBUCKEN(n) (((uint32_t)(n) << 0) & 0x00000001) argument
107 #define AM_REG_PWRCTRL_POWERSTATUS_COREBUCKON(n) (((uint32_t)(n) << 1) & 0x00000002) argument
115 #define AM_REG_PWRCTRL_POWERSTATUS_MEMBUCKON(n) (((uint32_t)(n) << 0) & 0x00000001) argument
134 #define AM_REG_PWRCTRL_DEVICEEN_ADC(n) (((uint32_t)(n) << 9) & 0x00000200) argument
141 #define AM_REG_PWRCTRL_DEVICEEN_UART1(n) (((uint32_t)(n) << 8) & 0x00000100) argument
148 #define AM_REG_PWRCTRL_DEVICEEN_UART0(n) (((uint32_t)(n) << 7) & 0x00000080) argument
155 #define AM_REG_PWRCTRL_DEVICEEN_IO_MASTER5(n) (((uint32_t)(n) << 6) & 0x00000040) argument
162 #define AM_REG_PWRCTRL_DEVICEEN_IO_MASTER4(n) (((uint32_t)(n) << 5) & 0x00000020) argument
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A Dam_reg_pdm.h53 #define AM_REG_PDMn(n) \ argument
80 #define AM_REG_PDM_INTEN_UNDFL(n) (((uint32_t)(n) << 2) & 0x00000004) argument
85 #define AM_REG_PDM_INTEN_OVF(n) (((uint32_t)(n) << 1) & 0x00000002) argument
90 #define AM_REG_PDM_INTEN_THR(n) (((uint32_t)(n) << 0) & 0x00000001) argument
100 #define AM_REG_PDM_INTSTAT_UNDFL(n) (((uint32_t)(n) << 2) & 0x00000004) argument
105 #define AM_REG_PDM_INTSTAT_OVF(n) (((uint32_t)(n) << 1) & 0x00000002) argument
110 #define AM_REG_PDM_INTSTAT_THR(n) (((uint32_t)(n) << 0) & 0x00000001) argument
120 #define AM_REG_PDM_INTCLR_UNDFL(n) (((uint32_t)(n) << 2) & 0x00000004) argument
125 #define AM_REG_PDM_INTCLR_OVF(n) (((uint32_t)(n) << 1) & 0x00000002) argument
130 #define AM_REG_PDM_INTCLR_THR(n) (((uint32_t)(n) << 0) & 0x00000001) argument
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A Dam_reg_adc.h53 #define AM_REG_ADCn(n) \ argument
88 #define AM_REG_ADC_INTEN_WCINC(n) (((uint32_t)(n) << 5) & 0x00000020) argument
94 #define AM_REG_ADC_INTEN_WCEXC(n) (((uint32_t)(n) << 4) & 0x00000010) argument
100 #define AM_REG_ADC_INTEN_FIFOOVR2(n) (((uint32_t)(n) << 3) & 0x00000008) argument
106 #define AM_REG_ADC_INTEN_FIFOOVR1(n) (((uint32_t)(n) << 2) & 0x00000004) argument
112 #define AM_REG_ADC_INTEN_SCNCMP(n) (((uint32_t)(n) << 1) & 0x00000002) argument
118 #define AM_REG_ADC_INTEN_CNVCMP(n) (((uint32_t)(n) << 0) & 0x00000001) argument
129 #define AM_REG_ADC_INTSTAT_WCINC(n) (((uint32_t)(n) << 5) & 0x00000020) argument
135 #define AM_REG_ADC_INTSTAT_WCEXC(n) (((uint32_t)(n) << 4) & 0x00000010) argument
141 #define AM_REG_ADC_INTSTAT_FIFOOVR2(n) (((uint32_t)(n) << 3) & 0x00000008) argument
[all …]
A Dam_reg_rstgen.h53 #define AM_REG_RSTGENn(n) \ argument
80 #define AM_REG_RSTGEN_INTEN_BODH(n) (((uint32_t)(n) << 0) & 0x00000001) argument
90 #define AM_REG_RSTGEN_INTSTAT_BODH(n) (((uint32_t)(n) << 0) & 0x00000001) argument
100 #define AM_REG_RSTGEN_INTCLR_BODH(n) (((uint32_t)(n) << 0) & 0x00000001) argument
110 #define AM_REG_RSTGEN_INTSET_BODH(n) (((uint32_t)(n) << 0) & 0x00000001) argument
121 #define AM_REG_RSTGEN_CFG_WDREN(n) (((uint32_t)(n) << 1) & 0x00000002) argument
126 #define AM_REG_RSTGEN_CFG_BODHREN(n) (((uint32_t)(n) << 0) & 0x00000001) argument
136 #define AM_REG_RSTGEN_SWPOI_SWPOIKEY(n) (((uint32_t)(n) << 0) & 0x000000FF) argument
147 #define AM_REG_RSTGEN_SWPOR_SWPORKEY(n) (((uint32_t)(n) << 0) & 0x000000FF) argument
158 #define AM_REG_RSTGEN_STAT_WDRSTAT(n) (((uint32_t)(n) << 6) & 0x00000040) argument
[all …]
/bsp/nxp/imx/imx6ull-smart/drivers/usb/include/
A Dusb_misc.h105 #define USB_MEM4_ALIGN(n) ((n + 3U) & (0xFFFFFFFCu)) argument
111 #define SWAP4BYTE_CONST(n) \ argument
217 #define USB_SHORT_TO_LITTLE_ENDIAN(n) (n) argument
218 #define USB_LONG_TO_LITTLE_ENDIAN(n) (n) argument
219 #define USB_SHORT_FROM_LITTLE_ENDIAN(n) (n) argument
220 #define USB_LONG_FROM_LITTLE_ENDIAN(n) (n) argument
223 #define USB_LONG_TO_BIG_ENDIAN(n) SWAP4BYTE_CONST(n) argument
227 #define USB_LONG_TO_LITTLE_ENDIAN_ADDRESS(n, m) \ argument
239 #define USB_LONG_TO_BIG_ENDIAN_ADDRESS(n, m) \ argument
251 #define USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(n, m) \ argument
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/bsp/nxp/lpc/lpc178x/drivers/
A Dlpc177x_8x_emc.h91 #define EMC_DynamicControl_I(n) ((uint32_t )(n<<7)) argument
105 #define EMC_DynamicReadConfig_RD(n) ((uint32_t )(n & 0x03)) argument
111 #define EMC_DynamictRP_tRP(n) ((uint32_t )(n & 0x0f)) argument
117 #define EMC_DynamictRP_tRAS(n) ((uint32_t )(n & 0x0f)) argument
135 #define EMC_DynamictWR_tWR(n) (uint32_t )(n & 0x0f) argument
141 #define EMC_DynamictRC_tRC(n) (uint32_t )(n & 0x1f) argument
178 #define EMC_DynamicConfig_MD(n) ((uint32_t )(n << 3)) argument
180 #define EMC_DynamicConfig_AM1(n) ((uint32_t )(n << 7)) argument
261 #define EMC_DLYCTL_CMDDLY(n) ((uint32_t)(n&0x1F)) argument
262 #define EMC_DLYCTL_FBCLKDLY(n) ((uint32_t)((n&0x1F)<<8)) argument
[all …]

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