1 /* all about gd factory */
2
3 #include <string.h>
4 #include <stdlib.h>
5 #include <time.h>
6 #include <pthread.h>
7 #include <errno.h>
8 #include <unistd.h>
9 #include <hal_timer.h>
10
11 #include "inter.h"
12
13 #define NOR_PUYA_QE_BIT BIT(1)
14 #define NOR_PUYA_CMD_RDSR2 0x35
15 #define NOR_PUYA_CMD_WRSR2 0x31
16
17 static struct nor_info idt_puya[] =
18 {
19 {
20 .model = "P25Q64H",
21 .id = {0x85, 0x60, 0x17},
22 .total_size = SZ_8M,
23 .flag = SUPPORT_GENERAL,
24 },
25 };
26
nor_puya_quad_mode(struct nor_flash * unused)27 static int nor_puya_quad_mode(struct nor_flash *unused)
28 {
29 int ret;
30 unsigned char cmd[3];
31 char reg[2] = {0};
32
33 cmd[0] = NOR_PUYA_CMD_RDSR2;
34 ret = nor_transfer(1, cmd, 1, reg, 2);
35 if (ret) {
36 SPINOR_ERR("read status register2 fail\n");
37 return ret;
38 }
39
40 if (reg[1] & NOR_PUYA_QE_BIT)
41 return 0;
42
43 ret = nor_write_enable();
44 if (ret)
45 return ret;
46
47 cmd[0] = NOR_PUYA_CMD_WRSR2;
48 cmd[1] = reg[1] | NOR_PUYA_QE_BIT;
49 ret = nor_transfer(2, cmd, 2, NULL, 0);
50 if (ret) {
51 SPINOR_ERR("set status register fail\n");
52 return ret;
53 }
54
55 if (nor_wait_ready(0, 500)) {
56 SPINOR_ERR("wait set qd mode failed\n");
57 return -EBUSY;
58 }
59
60 reg[0] = 0;
61 reg[1] = 0;
62 cmd[0] = NOR_PUYA_CMD_RDSR2;
63 ret = nor_transfer(1, cmd, 1, reg, 2);
64 if (ret) {
65 SPINOR_ERR("read status register2 fail\n");
66 return ret;
67 }
68
69
70 if (!(reg[1] & NOR_PUYA_QE_BIT)) {
71 SPINOR_ERR("set gd QE failed\n");
72 return -EINVAL;
73 }
74 return 0;
75 }
76
77 static struct nor_factory nor_puya = {
78 .factory = FACTORY_PUYA,
79 .idt = idt_puya,
80 .idt_cnt = sizeof(idt_puya),
81
82 .init = NULL,
83 .deinit = NULL,
84 .init_lock = NULL,
85 .deinit_lock = NULL,
86 .lock = NULL,
87 .unlock = NULL,
88 .islock = NULL,
89 .set_quad_mode = nor_puya_quad_mode,
90 .set_4bytes_addr = NULL,
91 };
92
nor_register_factory_puya(void)93 int nor_register_factory_puya(void)
94 {
95 return nor_register_factory(&nor_puya);
96 }
97