1 /*
2 * Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
3 *
4 * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
5 * the the People's Republic of China and other countries.
6 * All Allwinner Technology Co.,Ltd. trademarks are used with permission.
7 *
8 * DISCLAIMER
9 * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
10 * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
11 * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
12 * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
13 * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
14 * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
15 * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY.
16 *
17 *
18 * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
19 * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
20 * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
21 * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
22 * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
23 * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
26 * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
28 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
30 * OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 //#include <config.h>
34 //#include <common.h>
35 #include <stdio.h>
36 #include <hal_thread.h>
37 #include <hal_mem.h>
38 #include <string.h>
39 #include <typedef.h>
40 #include <rtthread.h>
41 //#include <drivers/sys_fsys.h>
42 //#include <net.h>
43 //#include <command.h>
44 #include <sunxi_hal_miiphy.h>
45 #include <sunxi_hal_phy.h>
46 #include <errno.h>
47 //#include <linux/err.h>
48 //#include <linux/compiler.h>
49
50 /* Generic PHY support and helper functions */
51
52 /**
53 * genphy_config_advert - sanitize and advertise auto-negotation parameters
54 * @phydev: target phy_device struct
55 *
56 * Description: Writes MII_ADVERTISE with the appropriate values,
57 * after sanitizing the values to make sure we only advertise
58 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
59 * hasn't changed, and > 0 if it has changed.
60 */
genphy_config_advert(struct phy_device * phydev)61 static int genphy_config_advert(struct phy_device *phydev)
62 {
63 uint32_t advertise;
64 int oldadv, adv;
65 int err, changed = 0;
66
67 /* Only allow advertising what
68 * this PHY supports */
69 phydev->advertising &= phydev->supported;
70 advertise = phydev->advertising;
71
72 /* Setup standard advertisement */
73 oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
74
75 if (adv < 0)
76 return adv;
77
78 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
79 ADVERTISE_PAUSE_ASYM);
80 if (advertise & ADVERTISED_10baseT_Half)
81 adv |= ADVERTISE_10HALF;
82 if (advertise & ADVERTISED_10baseT_Full)
83 adv |= ADVERTISE_10FULL;
84 if (advertise & ADVERTISED_100baseT_Half)
85 adv |= ADVERTISE_100HALF;
86 if (advertise & ADVERTISED_100baseT_Full)
87 adv |= ADVERTISE_100FULL;
88 if (advertise & ADVERTISED_Pause)
89 adv |= ADVERTISE_PAUSE_CAP;
90 if (advertise & ADVERTISED_Asym_Pause)
91 adv |= ADVERTISE_PAUSE_ASYM;
92 if (advertise & ADVERTISED_1000baseX_Half)
93 adv |= ADVERTISE_1000XHALF;
94 if (advertise & ADVERTISED_1000baseX_Full)
95 adv |= ADVERTISE_1000XFULL;
96
97 if (adv != oldadv) {
98 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
99
100 if (err < 0)
101 return err;
102 changed = 1;
103 }
104
105 /* Configure gigabit if it's supported */
106 if (phydev->supported & (SUPPORTED_1000baseT_Half |
107 SUPPORTED_1000baseT_Full)) {
108 oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
109
110 if (adv < 0)
111 return adv;
112
113 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
114 if (advertise & SUPPORTED_1000baseT_Half)
115 adv |= ADVERTISE_1000HALF;
116 if (advertise & SUPPORTED_1000baseT_Full)
117 adv |= ADVERTISE_1000FULL;
118
119 if (adv != oldadv) {
120 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000,
121 adv);
122
123 if (err < 0)
124 return err;
125 changed = 1;
126 }
127 }
128
129 return changed;
130 }
131
132
133 /**
134 * genphy_setup_forced - configures/forces speed/duplex from @phydev
135 * @phydev: target phy_device struct
136 *
137 * Description: Configures MII_BMCR to force speed/duplex
138 * to the values in phydev. Assumes that the values are valid.
139 */
genphy_setup_forced(struct phy_device * phydev)140 static int genphy_setup_forced(struct phy_device *phydev)
141 {
142 int err;
143 int ctl = 0;
144
145 phydev->pause = phydev->asym_pause = 0;
146
147 if (SPEED_1000 == phydev->speed)
148 ctl |= BMCR_SPEED1000;
149 else if (SPEED_100 == phydev->speed)
150 ctl |= BMCR_SPEED100;
151
152 if (DUPLEX_FULL == phydev->duplex)
153 ctl |= BMCR_FULLDPLX;
154
155 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
156
157 return err;
158 }
159
160
161 /**
162 * genphy_restart_aneg - Enable and Restart Autonegotiation
163 * @phydev: target phy_device struct
164 */
genphy_restart_aneg(struct phy_device * phydev)165 int genphy_restart_aneg(struct phy_device *phydev)
166 {
167 int ctl;
168
169 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
170
171 if (ctl < 0)
172 return ctl;
173
174 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
175
176 /* Don't isolate the PHY if we're negotiating */
177 ctl &= ~(BMCR_ISOLATE);
178
179 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
180
181 return ctl;
182 }
183
184
185 /**
186 * genphy_config_aneg - restart auto-negotiation or write BMCR
187 * @phydev: target phy_device struct
188 *
189 * Description: If auto-negotiation is enabled, we configure the
190 * advertising, and then restart auto-negotiation. If it is not
191 * enabled, then we write the BMCR.
192 */
genphy_config_aneg(struct phy_device * phydev)193 int genphy_config_aneg(struct phy_device *phydev)
194 {
195 int result;
196
197 if (AUTONEG_ENABLE != phydev->autoneg)
198 return genphy_setup_forced(phydev);
199
200 result = genphy_config_advert(phydev);
201
202 if (result < 0) /* error */
203 return result;
204
205 if (result == 0) {
206 /* Advertisment hasn't changed, but maybe aneg was never on to
207 * begin with? Or maybe phy was isolated? */
208 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
209
210 if (ctl < 0)
211 return ctl;
212
213 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
214 result = 1; /* do restart aneg */
215 }
216
217 /* Only restart aneg if we are advertising something different
218 * than we were before. */
219 if (result > 0)
220 result = genphy_restart_aneg(phydev);
221
222 return result;
223 }
224
225 /**
226 * genphy_update_link - update link status in @phydev
227 * @phydev: target phy_device struct
228 *
229 * Description: Update the value in phydev->link to reflect the
230 * current link value. In order to do this, we need to read
231 * the status register twice, keeping the second value.
232 */
genphy_update_link(struct phy_device * phydev)233 int genphy_update_link(struct phy_device *phydev)
234 {
235 unsigned int mii_reg;
236
237 /*
238 * Wait if the link is up, and autonegotiation is in progress
239 * (ie - we're capable and it's not done)
240 */
241 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
242
243 /*
244 * If we already saw the link up, and it hasn't gone down, then
245 * we don't need to wait for autoneg again
246 */
247 if (phydev->link && mii_reg & BMSR_LSTATUS)
248 return 0;
249
250 if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) {
251 int i = 0;
252
253 printf("%s Waiting for PHY auto negotiation to complete",
254 "eth0");
255 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
256 /*
257 * Timeout reached ?
258 */
259 if (i > PHY_ANEG_TIMEOUT) {
260 printf(" TIMEOUT !\n");
261 phydev->link = 0;
262 return 0;
263 }
264
265 /*if (ctrlc()) {
266 puts("user interrupt!\n");
267 phydev->link = 0;
268 return -EINTR;
269 }*/
270
271 if ((i++ % 500) == 0)
272 printf(".");
273
274 udelay(1000); /* 1 ms */
275 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
276 }
277 printf(" done\n");
278 phydev->link = 1;
279 } else {
280 /* Read the link a second time to clear the latched state */
281 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
282
283 if (mii_reg & BMSR_LSTATUS)
284 phydev->link = 1;
285 else
286 phydev->link = 0;
287 }
288
289 return 0;
290 }
291
292 /*
293 * Generic function which updates the speed and duplex. If
294 * autonegotiation is enabled, it uses the AND of the link
295 * partner's advertised capabilities and our advertised
296 * capabilities. If autonegotiation is disabled, we use the
297 * appropriate bits in the control register.
298 *
299 * Stolen from Linux's mii.c and phy_device.c
300 */
genphy_parse_link(struct phy_device * phydev)301 int genphy_parse_link(struct phy_device *phydev)
302 {
303 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
304
305 /* We're using autonegotiation */
306 if (phydev->supported & SUPPORTED_Autoneg) {
307 uint32_t lpa = 0;
308 int gblpa = 0;
309 uint32_t estatus = 0;
310
311 /* Check for gigabit capability */
312 if (phydev->supported & (SUPPORTED_1000baseT_Full |
313 SUPPORTED_1000baseT_Half)) {
314 /* We want a list of states supported by
315 * both PHYs in the link
316 */
317 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
318 if (gblpa < 0) {
319 printf("Could not read MII_STAT1000. Ignoring gigabit capability\n");
320 gblpa = 0;
321 }
322 gblpa &= phy_read(phydev,
323 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
324 }
325
326 /* Set the baseline so we only have to set them
327 * if they're different
328 */
329 phydev->speed = SPEED_10;
330 phydev->duplex = DUPLEX_HALF;
331
332 /* Check the gigabit fields */
333 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
334 phydev->speed = SPEED_1000;
335
336 if (gblpa & PHY_1000BTSR_1000FD)
337 phydev->duplex = DUPLEX_FULL;
338
339 /* We're done! */
340 return 0;
341 }
342
343 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
344 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
345
346 if (lpa & (LPA_100FULL | LPA_100HALF)) {
347 phydev->speed = SPEED_100;
348
349 if (lpa & LPA_100FULL)
350 phydev->duplex = DUPLEX_FULL;
351
352 } else if (lpa & LPA_10FULL)
353 phydev->duplex = DUPLEX_FULL;
354
355 /*
356 * Extended status may indicate that the PHY supports
357 * 1000BASE-T/X even though the 1000BASE-T registers
358 * are missing. In this case we can't tell whether the
359 * peer also supports it, so we only check extended
360 * status if the 1000BASE-T registers are actually
361 * missing.
362 */
363 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
364 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
365 MII_ESTATUS);
366
367 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
368 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
369 phydev->speed = SPEED_1000;
370 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
371 phydev->duplex = DUPLEX_FULL;
372 }
373
374 } else {
375 uint32_t bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
376
377 phydev->speed = SPEED_10;
378 phydev->duplex = DUPLEX_HALF;
379
380 if (bmcr & BMCR_FULLDPLX)
381 phydev->duplex = DUPLEX_FULL;
382
383 if (bmcr & BMCR_SPEED1000)
384 phydev->speed = SPEED_1000;
385 else if (bmcr & BMCR_SPEED100)
386 phydev->speed = SPEED_100;
387 }
388
389 return 0;
390 }
391
genphy_config(struct phy_device * phydev)392 int genphy_config(struct phy_device *phydev)
393 {
394 int val;
395 uint32_t features;
396
397 /* For now, I'll claim that the generic driver supports
398 * all possible port types */
399 features = (SUPPORTED_TP | SUPPORTED_MII
400 | SUPPORTED_AUI | SUPPORTED_FIBRE |
401 SUPPORTED_BNC);
402
403 /* Do we support autonegotiation? */
404 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
405
406 if (val < 0)
407 return val;
408
409 if (val & BMSR_ANEGCAPABLE)
410 features |= SUPPORTED_Autoneg;
411
412 if (val & BMSR_100FULL)
413 features |= SUPPORTED_100baseT_Full;
414 if (val & BMSR_100HALF)
415 features |= SUPPORTED_100baseT_Half;
416 if (val & BMSR_10FULL)
417 features |= SUPPORTED_10baseT_Full;
418 if (val & BMSR_10HALF)
419 features |= SUPPORTED_10baseT_Half;
420
421 if (val & BMSR_ESTATEN) {
422 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
423
424 if (val < 0)
425 return val;
426
427 if (val & ESTATUS_1000_TFULL)
428 features |= SUPPORTED_1000baseT_Full;
429 if (val & ESTATUS_1000_THALF)
430 features |= SUPPORTED_1000baseT_Half;
431 if (val & ESTATUS_1000_XFULL)
432 features |= SUPPORTED_1000baseX_Full;
433 if (val & ESTATUS_1000_XHALF)
434 features |= SUPPORTED_1000baseX_Half;
435 }
436
437 phydev->supported = features;
438 phydev->advertising = features;
439
440 genphy_config_aneg(phydev);
441
442 return 0;
443 }
444
genphy_startup(struct phy_device * phydev)445 int genphy_startup(struct phy_device *phydev)
446 {
447 genphy_update_link(phydev);
448 genphy_parse_link(phydev);
449
450 return 0;
451 }
452
genphy_shutdown(struct phy_device * phydev)453 int genphy_shutdown(struct phy_device *phydev)
454 {
455 return 0;
456 }
457
458 static struct phy_driver genphy_driver = {
459 .uid = 0xffffffff,
460 .mask = 0xffffffff,
461 .name = "Generic PHY",
462 .features = 0,
463 .config = genphy_config,
464 .startup = genphy_startup,
465 .shutdown = genphy_shutdown,
466 };
467
468 static LIST_HEAD(phy_drivers);
469
phy_init(void)470 int phy_init(void)
471 {
472 #ifdef CONFIG_PHY_ATHEROS
473 phy_atheros_init();
474 #endif
475 #ifdef CONFIG_PHY_BROADCOM
476 phy_broadcom_init();
477 #endif
478 #ifdef CONFIG_PHY_DAVICOM
479 phy_davicom_init();
480 #endif
481 #ifdef CONFIG_PHY_ET1011C
482 phy_et1011c_init();
483 #endif
484 #ifdef CONFIG_PHY_ICPLUS
485 phy_icplus_init();
486 #endif
487 #ifdef CONFIG_PHY_LXT
488 phy_lxt_init();
489 #endif
490 #ifdef CONFIG_PHY_MARVELL
491 phy_marvell_init();
492 #endif
493 #ifdef CONFIG_PHY_MICREL
494 phy_micrel_init();
495 #endif
496 #ifdef CONFIG_PHY_NATSEMI
497 phy_natsemi_init();
498 #endif
499 #ifdef CONFIG_PHY_REALTEK
500 phy_realtek_init();
501 #endif
502 #ifdef CONFIG_PHY_SMSC
503 phy_smsc_init();
504 #endif
505 #ifdef CONFIG_PHY_TERANETICS
506 phy_teranetics_init();
507 #endif
508 #ifdef CONFIG_PHY_VITESSE
509 phy_vitesse_init();
510 #endif
511
512 return 0;
513 }
514
phy_register(struct phy_driver * drv)515 int phy_register(struct phy_driver *drv)
516 {
517 INIT_LIST_HEAD(&drv->list);
518 list_add_tail(&drv->list, &phy_drivers);
519
520 return 0;
521 }
522
phy_probe(struct phy_device * phydev)523 static int phy_probe(struct phy_device *phydev)
524 {
525 int err = 0;
526
527 phydev->advertising = phydev->supported = phydev->drv->features;
528 phydev->mmds = phydev->drv->mmds;
529
530 if (phydev->drv->probe)
531 err = phydev->drv->probe(phydev);
532
533 return err;
534 }
535
generic_for_interface(phy_interface_t interface)536 static struct phy_driver *generic_for_interface(phy_interface_t interface)
537 {
538 #ifdef CONFIG_PHYLIB_10G
539 if (is_10g_interface(interface))
540 return &gen10g_driver;
541 #endif
542
543 return &genphy_driver;
544 }
545
get_phy_driver(struct phy_device * phydev,phy_interface_t interface)546 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
547 phy_interface_t interface)
548 {
549 struct list_head *entry;
550 int phy_id = phydev->phy_id;
551 struct phy_driver *drv = NULL;
552
553 list_for_each(entry, &phy_drivers) {
554 drv = list_entry(entry, struct phy_driver, list);
555 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
556 return drv;
557 }
558
559 /* If we made it here, there's no driver for this PHY */
560 return generic_for_interface(interface);
561 }
562
phy_device_create(struct mii_dev * bus,int addr,int phy_id,phy_interface_t interface)563 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
564 int phy_id,
565 phy_interface_t interface)
566 {
567 struct phy_device *dev;
568
569 /* We allocate the device, and initialize the
570 * default values */
571 dev = hal_malloc(sizeof(*dev));
572 if (!dev) {
573 printf("Failed to allocate PHY device for %s:%d\n",
574 bus->name, addr);
575 return NULL;
576 }
577
578 memset(dev, 0, sizeof(*dev));
579
580 dev->duplex = -1;
581 dev->link = 1;
582 dev->interface = interface;
583
584 dev->autoneg = AUTONEG_ENABLE;
585
586 dev->addr = addr;
587 dev->phy_id = phy_id;
588 dev->bus = bus;
589
590 dev->drv = get_phy_driver(dev, interface);
591
592 phy_probe(dev);
593
594 bus->phymap[addr] = dev;
595
596 return dev;
597 }
598
599 /**
600 * get_phy_id - reads the specified addr for its ID.
601 * @bus: the target MII bus
602 * @addr: PHY address on the MII bus
603 * @phy_id: where to store the ID retrieved.
604 *
605 * Description: Reads the ID registers of the PHY at @addr on the
606 * @bus, stores it in @phy_id and returns zero on success.
607 */
608 //int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, uint32_t *phy_id)
get_phy_id(struct mii_dev * bus,int addr,int devad,uint32_t * phy_id)609 int get_phy_id(struct mii_dev *bus, int addr, int devad, uint32_t *phy_id)
610 {
611 int phy_reg;
612
613 /* Grab the bits from PHYIR1, and put them
614 * in the upper half */
615 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
616
617 if (phy_reg < 0)
618 return -EIO;
619
620 *phy_id = (phy_reg & 0xffff) << 16;
621
622 /* Grab the bits from PHYIR2, and put them in the lower half */
623 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
624
625 if (phy_reg < 0)
626 return -EIO;
627
628 *phy_id |= (phy_reg & 0xffff);
629
630 return 0;
631 }
632
create_phy_by_mask(struct mii_dev * bus,unsigned phy_mask,int devad,phy_interface_t interface)633 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
634 unsigned phy_mask, int devad, phy_interface_t interface)
635 {
636 uint32_t phy_id = 0xffffffff;
637 while (phy_mask) {
638 int addr = ffs(phy_mask) - 1;
639 int r = get_phy_id(bus, addr, devad, &phy_id);
640 /* If the PHY ID is mostly f's, we didn't find anything */
641 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
642 return phy_device_create(bus, addr, phy_id, interface);
643 phy_mask &= ~(1 << addr);
644 }
645 return NULL;
646 }
647
search_for_existing_phy(struct mii_dev * bus,unsigned phy_mask,phy_interface_t interface)648 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
649 unsigned phy_mask, phy_interface_t interface)
650 {
651 /* If we have one, return the existing device, with new interface */
652 while (phy_mask) {
653 int addr = ffs(phy_mask) - 1;
654 if (bus->phymap[addr]) {
655 bus->phymap[addr]->interface = interface;
656 return bus->phymap[addr];
657 }
658 phy_mask &= ~(1 << addr);
659 }
660 return NULL;
661 }
662
get_phy_device_by_mask(struct mii_dev * bus,unsigned phy_mask,phy_interface_t interface)663 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
664 unsigned phy_mask, phy_interface_t interface)
665 {
666 int i;
667 struct phy_device *phydev;
668
669 phydev = search_for_existing_phy(bus, phy_mask, interface);
670 if (phydev)
671 return phydev;
672 /* Try Standard (ie Clause 22) access */
673 /* Otherwise we have to try Clause 45 */
674 for (i = 0; i < 5; i++) {
675 phydev = create_phy_by_mask(bus, phy_mask,
676 i ? i : MDIO_DEVAD_NONE, interface);
677 if (IS_ERR(phydev))
678 return NULL;
679 if (phydev)
680 return phydev;
681 }
682 printf("Phy not found\n");
683 return phy_device_create(bus, ffs(phy_mask) - 1, 0xffffffff, interface);
684 }
685
686 /**
687 * get_phy_device - reads the specified PHY device and returns its @phy_device struct
688 * @bus: the target MII bus
689 * @addr: PHY address on the MII bus
690 *
691 * Description: Reads the ID registers of the PHY at @addr on the
692 * @bus, then allocates and returns the phy_device to represent it.
693 */
get_phy_device(struct mii_dev * bus,int addr,phy_interface_t interface)694 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
695 phy_interface_t interface)
696 {
697 return get_phy_device_by_mask(bus, 1 << addr, interface);
698 }
699
phy_reset(struct phy_device * phydev)700 int phy_reset(struct phy_device *phydev)
701 {
702 int reg;
703 int timeout = 500;
704 int devad = MDIO_DEVAD_NONE;
705
706 #ifdef CONFIG_PHYLIB_10G
707 /* If it's 10G, we need to issue reset through one of the MMDs */
708 if (is_10g_interface(phydev->interface)) {
709 if (!phydev->mmds)
710 gen10g_discover_mmds(phydev);
711
712 devad = ffs(phydev->mmds) - 1;
713 }
714 #endif
715
716 reg = phy_read(phydev, devad, MII_BMCR);
717 if (reg < 0) {
718 printf("PHY status read failed\n");
719 return -1;
720 }
721
722 reg |= BMCR_RESET;
723
724 if (phy_write(phydev, devad, MII_BMCR, reg) < 0) {
725 printf("PHY reset failed\n");
726 return -1;
727 }
728
729 #ifdef CONFIG_PHY_RESET_DELAY
730 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
731 #endif
732 /*
733 * Poll the control register for the reset bit to go to 0 (it is
734 * auto-clearing). This should happen within 0.5 seconds per the
735 * IEEE spec.
736 */
737 while ((reg & BMCR_RESET) && timeout--) {
738 reg = phy_read(phydev, devad, MII_BMCR);
739
740 if (reg < 0) {
741 printf("PHY status read failed\n");
742 return -1;
743 }
744 udelay(1000);
745 }
746
747 if (reg & BMCR_RESET) {
748 printf("PHY reset timed out\n");
749 return -1;
750 }
751
752 return 0;
753 }
754
miiphy_reset(const char * devname,unsigned char addr)755 int miiphy_reset(const char *devname, unsigned char addr)
756 {
757 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
758 struct phy_device *phydev;
759
760 /*
761 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
762 * If later code tries to connect with the right interface, this will
763 * be corrected by get_phy_device in phy_connect()
764 */
765 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
766
767 return phy_reset(phydev);
768 }
769
phy_find_by_mask(struct mii_dev * bus,unsigned phy_mask,phy_interface_t interface)770 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
771 phy_interface_t interface)
772 {
773 /* Reset the bus */
774 if (bus->reset)
775 bus->reset(bus);
776
777 /* Wait 15ms to make sure the PHY has come out of hard reset */
778 udelay(15000);
779 return get_phy_device_by_mask(bus, phy_mask, interface);
780 }
781
phy_connect_dev(struct phy_device * phydev,struct eth_device * dev)782 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
783 {
784 /* Soft Reset the PHY */
785 phy_reset(phydev);
786 if (phydev->dev) {
787 printf("%s:%d is connected to %s. Reconnecting to %s\n",
788 phydev->bus->name, phydev->addr,
789 "eth0", "eth0");
790 }
791 phydev->dev = dev;
792 printf("%s connected to %s\n", "eth0", "eth0");
793 }
794
phy_connect(struct mii_dev * bus,int addr,struct eth_device * dev,phy_interface_t interface)795 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
796 struct eth_device *dev, phy_interface_t interface)
797 {
798 struct phy_device *phydev;
799
800 phydev = phy_find_by_mask(bus, 1 << addr, interface);
801 if (phydev)
802 phy_connect_dev(phydev, dev);
803 else
804 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
805 return phydev;
806 }
807
808 /*
809 * Start the PHY. Returns 0 on success, or a negative error code.
810 */
phy_startup(struct phy_device * phydev)811 int phy_startup(struct phy_device *phydev)
812 {
813 if (phydev->drv->startup)
814 return phydev->drv->startup(phydev);
815
816 return 0;
817 }
818
__board_phy_config(struct phy_device * phydev)819 static int __board_phy_config(struct phy_device *phydev)
820 {
821 if (phydev->drv->config)
822 return phydev->drv->config(phydev);
823 return 0;
824 }
825
826 int board_phy_config(struct phy_device *phydev)
827 __attribute__((weak, alias("__board_phy_config")));
828
phy_config(struct phy_device * phydev)829 int phy_config(struct phy_device *phydev)
830 {
831 /* Invoke an optional board-specific helper */
832 board_phy_config(phydev);
833
834 return 0;
835 }
836
phy_shutdown(struct phy_device * phydev)837 int phy_shutdown(struct phy_device *phydev)
838 {
839 if (phydev->drv->shutdown)
840 phydev->drv->shutdown(phydev);
841
842 return 0;
843 }
844