1 /*
2 * Copyright (c) 2006-2023, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Email: opensource_embedded@phytium.com.cn
7 *
8 * Change Logs:
9 * Date Author Notes
10 * 2022-10-26 huanghe first commit
11 *
12 */
13
14 #include "rtconfig.h"
15 #include <rtthread.h>
16 #include "gicv3.h"
17 #include "fcpu_info.h"
18 #include "phytium_cpu.h"
19
20 rt_uint64_t rt_cpu_mpidr_table[] =
21 {
22 #if defined(TARGET_PE2202)
23 [0] = RT_CORE_AFF(0),
24 [1] = RT_CORE_AFF(1),
25 #elif defined(TARGET_PE2204)
26 [0] = RT_CORE_AFF(0),
27 [1] = RT_CORE_AFF(1),
28 [2] = RT_CORE_AFF(2),
29 [3] = RT_CORE_AFF(3),
30 #elif defined(TARGET_PD2408)
31 [0] = RT_CORE_AFF(0),
32 [1] = RT_CORE_AFF(1),
33 [2] = RT_CORE_AFF(2),
34 [3] = RT_CORE_AFF(3),
35 [4] = RT_CORE_AFF(4),
36 [5] = RT_CORE_AFF(5),
37 [6] = RT_CORE_AFF(6),
38 [7] = RT_CORE_AFF(7),
39 #endif
40 [RT_CPUS_NR] = 0
41 };
42
43 /**
44 @name: phytium_cpu_id_mapping
45 @msg: Map Phytium CPU ID
46 @brief: Map the input CPU ID to a new CPU ID based on the type and quantity of CPUs on the target board.
47 @param {int} cpu_id Input CPU ID
48 @return {int} Mapped CPU ID
49 */
phytium_cpu_id_mapping(int cpu_id)50 int phytium_cpu_id_mapping(int cpu_id)
51 {
52 #if defined(TARGET_PE2204)
53 switch (cpu_id)
54 {
55 case 0:
56 return 2;
57 case 1:
58 return 3;
59 case 2:
60 return 0;
61 case 3:
62 return 1;
63 default:
64 RT_ASSERT(0);
65 return 0;
66 break;
67 }
68 #else
69 return (int)cpu_id;
70 #endif
71 }
72
73 #if defined(TARGET_ARMV8_AARCH32)
74
rt_hw_cpu_id(void)75 int rt_hw_cpu_id(void)
76 {
77 FError ret;
78 u32 cpu_id;
79 ret = GetCpuId(&cpu_id);
80
81 if (ret != ERR_SUCCESS)
82 {
83 RT_ASSERT(0);
84 }
85 return phytium_cpu_id_mapping(cpu_id);
86 }
87
get_main_cpu_affval(void)88 rt_uint64_t get_main_cpu_affval(void)
89 {
90 #if defined(TARGET_PE2204)
91 return CORE2_AFF;
92 #else
93 return CORE0_AFF;
94 #endif
95 }
96
97 extern u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list);
arm_gic_cpumask_to_affval(rt_uint32_t * cpu_mask,rt_uint32_t * cluster_id,rt_uint32_t * target_list)98 rt_uint32_t arm_gic_cpumask_to_affval(rt_uint32_t *cpu_mask, rt_uint32_t *cluster_id, rt_uint32_t *target_list)
99 {
100 return GetCpuMaskToAffval(cpu_mask, cluster_id, target_list);
101 }
102
103 #ifdef RT_USING_SMP
104
send_core_isg(void)105 void send_core_isg(void)
106 {
107 for (rt_size_t i = 0; i <= 0xf; i++)
108 {
109 /* code */
110 rt_kprintf("i %x \r\n", i);
111 arm_gic_send_affinity_sgi(0, 0, i, 0);
112 rt_thread_mdelay(100);
113 }
114 }
115 MSH_CMD_EXPORT(send_core_isg, send_core_isg);
116
117 #endif
118
119 #endif
120