1 /*
2  * g2d_driver_i/g2d_driver_i.h
3  *
4  * Copyright (c) 2007-2019 Allwinnertech Co., Ltd.
5  * Author: zhengxiaobin <zhengxiaobin@allwinnertech.com>
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17 #ifndef __G2D_DRIVER_I_H
18 #define __G2D_DRIVER_I_H
19 #include <typedef.h>
20 #include <hal_sem.h>
21 #include <hal_clk.h>
22 #include <hal_reset.h>
23 #include "g2d_bsp.h"
24 
25 /* #include "g2d_bsp_v2.h" */
26 
27 #define INFO(format, args...) printf("%s: " format, "G2D", ## args)
28 
29 #if defined(CONFIG_FPGA_V4_PLATFORM) || defined(CONFIG_FPGA_V7_PLATFORM)
30 #define WAIT_CMD_TIME_MS 500
31 #else
32 #define WAIT_CMD_TIME_MS 100
33 #endif
34 
35 #define G2D_CLK_NUM 3
36 
37 #define G2DALIGN(value, align) ((align == 0) ? \
38 				value : \
39 				(((value) + ((align) - 1)) & ~((align) - 1)))
40 
41 
42 
43 struct test
44 {
45 int i;
46  hal_sem_t mutex;
47 
48 
49 };
50 
51 struct info_mem {
52 	unsigned long phy_addr;
53 	void *virt_addr;
54 	__u32 b_used;
55 	__u32 mem_len;
56 };
57 
58 typedef struct {
59 	__u32 io;
60 	__u32 irq;
61 	 hal_sem_t mutex;
62 	bool opened;
63 	__u32 user_cnt;
64 	hal_clk_t clk[G2D_CLK_NUM];
65 	hal_clk_t clk_parent;
66 	struct reset_control *reset;
67 	u32 clk_rate;
68 } __g2d_info_t;
69 
70 typedef struct {
71 	__u32 mid;
72 	__u32 used;
73 	__u32 status;
74 	hal_sem_t queue_sem;
75 	__u32 finish_flag;
76 } __g2d_drv_t;
77 
78 struct g2d_alloc_struct {
79 	__u32 address;
80 	__u32 size;
81 	__u32 u_size;
82 	struct g2d_alloc_struct *next;
83 };
84 
85 /* g2d_format_attr - g2d format attribute
86  *
87  * @format: pixel format
88  * @bits: bits of each component
89  * @hor_rsample_u: reciprocal of horizontal sample rate
90  * @hor_rsample_v: reciprocal of horizontal sample rate
91  * @ver_rsample_u: reciprocal of vertical sample rate
92  * @hor_rsample_v: reciprocal of vertical sample rate
93  * @uvc: 1: u & v component combined
94  * @interleave: 0: progressive, 1: interleave
95  * @factor & div: bytes of pixel = factor / div (bytes)
96  * @addr[out]: address for each plane
97  * @trd_addr[out]: address for each plane of right eye buffer
98  */
99 struct g2d_format_attr {
100 	g2d_fmt_enh format;
101 	unsigned int bits;
102 	unsigned int hor_rsample_u;
103 	unsigned int hor_rsample_v;
104 	unsigned int ver_rsample_u;
105 	unsigned int ver_rsample_v;
106 	unsigned int uvc;
107 	unsigned int interleave;
108 	unsigned int factor;
109 	unsigned int div;
110 };
111 
112 
113 int g2d_wait_cmd_finish(unsigned int timeout);
114 void *g2d_malloc(__u32 bytes_num, __u32 *phy_addr);
115 void g2d_free(void *virt_addr, void *phy_addr, unsigned int size);
116 __s32 g2d_image_check(g2d_image_enh *p_image);
117 __s32 g2d_byte_cal(__u32 format, __u32 *ycnt, __u32 *ucnt, __u32 *vcnt);
118 __u32 cal_align(__u32 width, __u32 align);
119 
120 #endif /* __G2D_DRIVER_I_H */
121