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Searched defs:reg (Results 1 – 25 of 724) sorted by relevance

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/bsp/smartfusion2/CMSIS/
A Dhw_reg_io.h36 static __INLINE void write_reg32(volatile uint32_t * reg, uint32_t val) in write_reg32()
40 static __INLINE void write_reg16(volatile uint16_t * reg, uint16_t val) in write_reg16()
44 static __INLINE void write_reg8(volatile uint8_t * reg, uint8_t val) in write_reg8()
49 static __INLINE uint32_t read_reg32(volatile uint32_t * reg) in read_reg32()
53 static __INLINE uint16_t read_reg16(volatile uint16_t * reg) in read_reg16()
57 static __INLINE uint8_t read_reg8(volatile uint8_t * reg) in read_reg8()
70 static __INLINE void set_bit_reg32(volatile uint32_t * reg, uint8_t bit) in set_bit_reg32()
74 static __INLINE void set_bit_reg16(volatile uint16_t * reg, uint8_t bit) in set_bit_reg16()
78 static __INLINE void set_bit_reg8(volatile uint8_t * reg, uint8_t bit) in set_bit_reg8()
85 static __INLINE void clear_bit_reg32(volatile uint32_t * reg, uint8_t bit) in clear_bit_reg32()
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/bsp/apollo2/libraries/drivers/regs/
A Dam_reg_macros.h121 #define AM_REG(module, reg) \ argument
214 #define AM_REGan(module, instance, reg, operator, value) \ argument
219 #define AM_REGan_SET(module, instance, reg, mask) \ argument
224 #define AM_REGan_CLR(module, instance, reg, mask) \ argument
229 #define AM_REGa(module, reg, operator, value) \ argument
232 #define AM_REGa_CLR(module, reg, mask) \ argument
235 #define AM_REGa_SET(module, reg, mask) \ argument
238 #define AM_BFWa(module, reg, field, value) \ argument
243 #define AM_BFWae(module, reg, field, enumval) \ argument
248 #define AM_BFWan(module, instance, reg, field, value) \ argument
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/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_msmc.c21 uint32_t reg; in SMC_SetPowerModeRun() local
34 uint32_t reg; in SMC_SetPowerModeHsrun() local
59 uint32_t reg; in SMC_SetPowerModeStop() local
93 uint32_t reg; in SMC_SetPowerModeVlpr() local
119 uint32_t reg; in SMC_SetPowerModeVlps() local
153 uint32_t reg; in SMC_SetPowerModeLls() local
190 uint32_t reg; in SMC_SetPowerModeVlls0() local
214 uint32_t reg; in SMC_SetPowerModeVlls2() local
238 uint32_t reg; in SMC_SetPowerModeVlls() local
279 uint32_t reg; in SMC_ConfigureResetPinFilter() local
/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/src/
A Dapm32e10x_usb.c52 __IOM uint32_t reg; in USBD_SetEPType() local
72 __IOM uint32_t reg; in USBD_SetEPKind() local
91 __IOM uint32_t reg; in USBD_ResetEPKind() local
111 __IOM uint32_t reg; in USBD_ResetEPRxFlag() local
130 __IOM uint32_t reg; in USBD_ResetEPTxFlag() local
149 __IOM uint32_t reg; in USBD_ToggleTx() local
168 __IOM uint32_t reg; in USBD_ToggleRx() local
219 __IOM uint32_t reg; in USBD_SetEpAddr() local
241 __IOM uint32_t reg; in USBD_SetEPTxStatus() local
265 __IOM uint32_t reg; in USBD_SetEPRxStatus() local
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/bsp/apm32/libraries/APM32F0xx_Library/USB_Device_Lib/Driver/src/
A Ddrv_usb_device.c64 __IOM uint32_t reg; in USBD_SetEPType() local
84 __IOM uint32_t reg; in USBD_SetEPKind() local
103 __IOM uint32_t reg; in USBD_ResetEPKind() local
123 __IOM uint32_t reg; in USBD_ResetEPRxFlag() local
142 __IOM uint32_t reg; in USBD_ResetEPTxFlag() local
161 __IOM uint32_t reg; in USBD_ToggleTx() local
180 __IOM uint32_t reg; in USBD_ToggleRx() local
231 __IOM uint32_t reg; in USBD_SetEpAddr() local
253 __IOM uint32_t reg; in USBD_SetEPTxStatus() local
276 __IOM uint32_t reg; in USBD_SetEPRxStatus() local
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/bsp/k230/drivers/interdrv/sysctl/sysctl_power/
A Dsysctl_pwr.c44 bool sysctl_pwr_set_ack_to_tim(volatile uint32_t *reg, uint32_t ack_to_tim) in sysctl_pwr_set_ack_to_tim()
60 bool sysctl_pwr_set_idle_to_tim(volatile uint32_t *reg, uint32_t idle_to_tim) in sysctl_pwr_set_idle_to_tim()
76 bool sysctl_pwr_set_idle_hd_tim(volatile uint32_t *reg, uint32_t idle_hd_tim) in sysctl_pwr_set_idle_hd_tim()
95 bool sysctl_pwr_set_iso_su_tim(volatile uint32_t *reg, uint32_t iso_su_tim) in sysctl_pwr_set_iso_su_tim()
114 bool sysctl_pwr_set_pd_hd_tim(volatile uint32_t *reg, uint32_t pd_hd_tim) in sysctl_pwr_set_pd_hd_tim()
134 bool sysctl_pwr_set_pwr_su_tim(volatile uint32_t *reg, uint32_t pwr_su_tim) in sysctl_pwr_set_pwr_su_tim()
150 bool sysctl_pwr_set_wfi_tim(volatile uint32_t *reg, uint32_t wfi_tim) in sysctl_pwr_set_wfi_tim()
240 bool sysctl_pwr_get_ack_to_tim(volatile uint32_t *reg, uint32_t *ack_to_tim) in sysctl_pwr_get_ack_to_tim()
273 bool sysctl_pwr_get_iso_su_tim(volatile uint32_t *reg, uint32_t *iso_su_tim) in sysctl_pwr_get_iso_su_tim()
286 bool sysctl_pwr_get_pd_hd_tim(volatile uint32_t *reg, uint32_t *pd_hd_tim) in sysctl_pwr_get_pd_hd_tim()
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/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/GD32VF103_standard_peripheral/Source/
A Dgd32vf103_rcu.c246 uint32_t reg; in rcu_system_clock_source_config() local
278 uint32_t reg; in rcu_ahb_clock_config() local
301 uint32_t reg; in rcu_apb1_clock_config() local
324 uint32_t reg; in rcu_apb2_clock_config() local
351 uint32_t reg; in rcu_ckout0_config() local
516 uint32_t reg; in rcu_usb_clock_config() local
538 uint32_t reg; in rcu_rtc_clock_config() local
557 uint32_t reg; in rcu_i2s1_clock_config() local
576 uint32_t reg; in rcu_i2s2_clock_config() local
875 uint32_t reg; in rcu_osci_bypass_mode_enable() local
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/bsp/zynqmp-a53-dfzu2eg/drivers/zynqmp/
A Dzynqmp_reg.h16 #define readb(reg) (*((volatile unsigned char *)(reg))) argument
17 #define readw(reg) (*((volatile unsigned short *)(reg))) argument
18 #define readl(reg) (*((volatile unsigned int *)(reg))) argument
19 #define readq(reg) (*((volatile unsigned long long *)(reg))) argument
21 #define writeb(data, reg) ((*((volatile unsigned char *)(reg))) = (unsigned char)(data)) argument
22 #define writew(data, reg) ((*((volatile unsigned short *)(reg))) = (unsigned short)(data)) argument
23 #define writel(data, reg) ((*((volatile unsigned int *)(reg))) = (unsigned int)(data)) argument
24 #define writeq(data, reg) ((*((volatile unsigned long long *)(reg))) = (unsigned long long)… argument
30 #define DUMP_REG(base, reg) \ argument
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dmtb.h50 uint32_t reg; /*!< Type used for register access */ member
76 uint32_t reg; /*!< Type used for register access */ member
109 uint32_t reg; /*!< Type used for register access */ member
128 uint32_t reg; /*!< Type used for register access */ member
138 uint32_t reg; /*!< Type used for register access */ member
148 uint32_t reg; /*!< Type used for register access */ member
158 uint32_t reg; /*!< Type used for register access */ member
168 uint32_t reg; /*!< Type used for register access */ member
178 uint32_t reg; /*!< Type used for register access */ member
188 uint32_t reg; /*!< Type used for register access */ member
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/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Dmtb.h64 uint32_t reg; /*!< Type used for register access */ member
90 uint32_t reg; /*!< Type used for register access */ member
123 uint32_t reg; /*!< Type used for register access */ member
142 uint32_t reg; /*!< Type used for register access */ member
152 uint32_t reg; /*!< Type used for register access */ member
162 uint32_t reg; /*!< Type used for register access */ member
172 uint32_t reg; /*!< Type used for register access */ member
182 uint32_t reg; /*!< Type used for register access */ member
192 uint32_t reg; /*!< Type used for register access */ member
202 uint32_t reg; /*!< Type used for register access */ member
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/bsp/frdm-k64f/device/MK64F12/
A Dfsl_smc.c37 uint32_t reg = base->PARAM; in SMC_GetParam() local
80 uint8_t reg; in SMC_SetPowerModeRun() local
94 uint8_t reg; in SMC_SetPowerModeHsrun() local
119 uint8_t reg; in SMC_SetPowerModeStop() local
162 uint8_t reg; in SMC_SetPowerModeVlpr() local
201 uint8_t reg; in SMC_SetPowerModeVlps() local
238 uint8_t reg; in SMC_SetPowerModeLls() local
289 uint8_t reg; in SMC_SetPowerModeVlls() local
A Dfsl_ftm.c105 uint32_t reg = 0, syncReg = 0; in FTM_SetPwmSync() local
162 uint32_t reg = 0; in FTM_SetReloadPoints() local
224 uint32_t reg; in FTM_Init() local
343 uint32_t mod, reg; in FTM_SetupPwm() local
538 uint32_t reg = base->CONTROLS[chnlNumber].CnSC; in FTM_UpdateChnlEdgeLevelSelect() local
552 uint32_t reg; in FTM_SetupInputCapture() local
586 uint32_t reg; in FTM_SetupOutputCompare() local
617 uint32_t reg; in FTM_SetupDualEdgeCapture() local
661 uint32_t reg; in FTM_SetupQuadDecode() local
697 uint32_t reg; in FTM_SetupFault() local
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl602/std/include/
A Dbl602_sdu.h131 #define BL_READ_REGS8(reg, val) ((val) = BL_REGS8(reg)) argument
132 #define BL_READ_REGS16(reg, val) ((val) = BL_REGS16(reg)) argument
133 #define BL_READ_REGS32(reg, val) ((val) = BL_REGS32(reg)) argument
134 #define BL_READ_BYTE(reg, val) ((val) = BL_REGS8(reg)) argument
138 #define BL_WRITE_REGS8(reg, val) (BL_REGS8(reg) = (val)) argument
139 #define BL_WRITE_REGS16(reg, val) (BL_REGS16(reg) = (val)) argument
140 #define BL_WRITE_REGS32(reg, val) (BL_REGS32(reg) = (val)) argument
141 #define BL_WRITE_BYTE(reg, val) (BL_REGS8(reg) = (val)) argument
149 #define BL_REGS8_SETBITS(reg, val) (BL_REGS8(reg) |= (uint8)(val)) argument
150 #define BL_REGS16_SETBITS(reg, val) (BL_REGS16(reg) |= (uint16)(val)) argument
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/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl616/std/include/
A Dbl616_sdu.h138 #define BL_READ_REGS8(reg,val) ((val) = BL_REGS8(reg)) argument
139 #define BL_READ_REGS16(reg,val) ((val) = BL_REGS16(reg)) argument
140 #define BL_READ_REGS32(reg,val) ((val) = BL_REGS32(reg)) argument
141 #define BL_READ_BYTE(reg,val) ((val) = BL_REGS8(reg)) argument
145 #define BL_WRITE_REGS8(reg,val) (BL_REGS8(reg) = (val)) argument
146 #define BL_WRITE_REGS16(reg,val) (BL_REGS16(reg) = (val)) argument
147 #define BL_WRITE_REGS32(reg,val) (BL_REGS32(reg) = (val)) argument
148 #define BL_WRITE_BYTE(reg,val) (BL_REGS8(reg) = (val)) argument
156 #define BL_REGS8_SETBITS(reg, val) (BL_REGS8(reg) |= (uint8)(val)) argument
157 #define BL_REGS16_SETBITS(reg, val) (BL_REGS16(reg) |= (uint16)(val)) argument
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/bsp/allwinner/libraries/sunxi-hal/hal/source/msgbox/msgbox_sx/
A Dmsgbox_sx.c23 unsigned long *reg = (unsigned long *)(mb->base + offset_reg); in msg_queue_t_set() local
46 unsigned long *reg = (unsigned long *)(mb->base + offset_reg); in msg_queue_r_set() local
66 long *reg = (long *)(mb->base + MSGBOX_IRQ_EN_REG_OFFSET + user * 0x20); in msg_queue_irq_t() local
83 long *reg = (long *)(mb->base + MSGBOX_IRQ_EN_REG_OFFSET + user * 0x20); in msg_queue_irq_r() local
111 long *reg = (long *)(mb->base + MSGBOX_FIFO_STATUS_OFFSET + queue * 4); in msg_queue_is_full() local
124 long *reg = (long *)(mb->base + MSGBOX_MSG_STATUS_OFFSET + 4 * queue); in msg_queue_msg_cnt_sx() local
134 long *reg = (long *)(mb->base + MSGBOX_MSG_QUEUE_OFFSET + 4 * queue); in msg_queue_read_sx() local
144 long *reg = (long *)(mb->base + MSGBOX_MSG_QUEUE_OFFSET + 4 * queue); in msg_queue_write_sx() local
154 long *reg = (long *)(mb->base + MSGBOX_IRQ_EN_REG_OFFSET + user * 0x20); in msg_irq_enable_get() local
162 long *reg = (long *)(mb->base + MSGBOX_IRQ_STATUS_OFFSET + 0x20 * user); in msg_irq_status() local
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/bsp/allwinner_tina/drivers/
A Ddrv_clock.h31 #define PLL_CPU_DIV_P(reg) ((reg>>16)&0x3) argument
32 #define PLL_CPU_FACTOR_N(reg) ((reg>>8)&0x1f) argument
33 #define PLL_CPU_FACTOR_K(reg) ((reg>>4)&0x3) argument
34 #define PLL_CPU_FACTOR_M(reg) ((reg)&0x3) argument
38 #define PLL_AUDIO_FACTOR_N(reg) ((reg>>8)&0x7f) argument
39 #define PLL_AUDIO_PREDIV_M(reg) ((reg)&0x1f) argument
47 #define PLL_VIDEO_FACTOR_N(reg) ((reg>>8)&0x7f) argument
48 #define PLL_VIDEO_PREDIV_M(reg) (reg&0xf) argument
55 #define PLL_VE_PREDIV_M(reg) (reg&0xf) argument
63 #define PLL_DDR_FACTOR_M(reg) ((reg)&0x3) argument
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/bsp/k230/drivers/interdrv/gpio/
A Ddrv_gpio.c76 static void kd_gpio_reg_writel(void* reg, rt_size_t offset, rt_uint32_t value) in kd_gpio_reg_writel()
87 static rt_uint32_t kd_gpio_reg_readl(void* reg, rt_size_t offset) in kd_gpio_reg_readl()
105 void* reg; in kd_pin_mode() local
145 void* reg; in kd_pin_mode_get() local
169 void* reg; in kd_pin_write() local
195 void* reg; in kd_pin_read() local
219 void* reg; in kd_set_pin_edge() local
260 void* reg; in debounce_work() local
273 void* reg; in pin_irq() local
340 void* reg; in kd_pin_detach_irq() local
/bsp/xuantie/libraries/xuantie_libraries/csi/csi2/include/drv/
A Dio.h47 #define HAL_FEXT(reg, PER_REG_FIELD) \ argument
51 #define HAL_FINS(reg, PER_REG_FIELD, val) \ argument
58 #define HAL_BIT_SET(reg, bit) ((reg) = ((reg) | (1U << (bit)))) argument
61 #define HAL_BIT_CLR(reg, bit) ((reg) = ((reg) & (~(1U << (bit))))) argument
64 #define HAL_GET_BIT_VAL(reg, bit) (((reg)>> (bit)) & 1U) argument
67 #define HAL_IS_BIT_SET(reg, pos) (((reg) & (1U << (pos))) != 0x0U) argument
70 #define HAL_IS_BIT_CLR(reg, pos) (((reg) & (1U << (pos))) == 0x0U) argument
73 #define HAL_BIT_INSR(reg, bit, val) \ argument
/bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/
A Dclk_periph.c39 u32 reg = 0; in sunxi_clk_periph_get_parent() local
65 unsigned long reg, flags = 0; in sunxi_clk_periph_set_parent() local
91 unsigned long reg; in __sunxi_clk_periph_enable_shared() local
134 u32 reg; in __sunxi_clk_periph_enable() local
207 u32 state = 0, reg = 0; in sunxi_clk_periph_is_enabled() local
253 unsigned long reg; in __sunxi_clk_periph_disable_shared() local
302 u32 reg; in __sunxi_clk_periph_disable() local
369 u32 reg = 0, parent_rate = 0; in sunxi_clk_periph_recalc_rate() local
483 u32 reg = 0; in sunxi_clk_periph_set_rate() local
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/HPM6750/
A Dhpm_sdxc_soc_drv.h23 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_enable_tm_clock() local
48 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_enable_inverse_clock() local
58 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_is_inverse_clock_enabled() local
71 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_set_cardclk_delay_chain() local
79 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_set_data_strobe_delay() local
94 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_set_rxclk_delay_chain() local
/bsp/allwinner/libraries/sunxi-hal/hal/source/sound/core/
A Dsnd_io.c41 unsigned int snd_codec_read(struct snd_codec *codec, unsigned int reg) in snd_codec_read()
58 int snd_codec_write(struct snd_codec *codec, unsigned int reg, unsigned int val) in snd_codec_write()
75 int snd_codec_update_bits(struct snd_codec *codec, unsigned int reg, in snd_codec_update_bits()
105 unsigned int snd_platform_read(struct snd_platform *platform, unsigned int reg) in snd_platform_read()
119 int snd_platform_write(struct snd_platform *platform, unsigned int reg, unsigned int val) in snd_platform_write()
133 int snd_platform_update_bits(struct snd_platform *platform, unsigned int reg, in snd_platform_update_bits()
/bsp/essemi/es32f0654/libraries/ES32F065x_ALD_StdPeriph_Driver/Include/
A Dtype.h82 #define SET_BIT(reg, bit) ((reg) |= (bit)) argument
83 #define CLEAR_BIT(reg, bit) ((reg) &= ~(bit)) argument
84 #define READ_BIT(reg, bit) ((reg) & (bit)) argument
85 #define READ_BITS(reg, msk, s) (((reg) & (msk)) >> (s)) argument
86 #define CLEAR_REG(reg) ((reg) = (0x0)) argument
87 #define WRITE_REG(reg, val) ((reg) = (val)) argument
88 #define READ_REG(reg) ((reg)) argument
89 #define MODIFY_REG(reg, clearmask, setmask) \ argument
/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Include/
A Dtype.h82 #define SET_BIT(reg, bit) ((reg) |= (bit)) argument
83 #define CLEAR_BIT(reg, bit) ((reg) &= ~(bit)) argument
84 #define READ_BIT(reg, bit) ((reg) & (bit)) argument
85 #define READ_BITS(reg, msk, s) (((reg) & (msk)) >> (s)) argument
86 #define CLEAR_REG(reg) ((reg) = (0x0)) argument
87 #define WRITE_REG(reg, val) ((reg) = (val)) argument
88 #define READ_REG(reg) ((reg)) argument
89 #define MODIFY_REG(reg, clearmask, setmask) \ argument
/bsp/essemi/es32vf2264/libraries/ALD/ES32VF2264/Include/
A Dtype.h88 #define SET_BIT(reg, bit) ((reg) |= (bit)) argument
89 #define CLEAR_BIT(reg, bit) ((reg) &= ~(bit)) argument
90 #define READ_BIT(reg, bit) ((reg) & (bit)) argument
91 #define READ_BITS(reg, msk, s) (((reg) & (msk)) >> (s)) argument
92 #define CLEAR_REG(reg) ((reg) = (0x0)) argument
93 #define WRITE_REG(reg, val) ((reg) = (val)) argument
94 #define READ_REG(reg) ((reg)) argument
95 #define MODIFY_REG(reg, clearmask, setmask) \ argument
/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/
A Dyc3122.h270 …__IOM uint32_t reg; /*!< (@ 0x00000000) * CTRL * … member
291 …__IOM uint32_t reg; /*!< (@ 0x00000004) * WKUP_SRC * … member
299 …__IOM uint32_t reg; /*!< (@ 0x00000008) * ERROR_STATUS * … member
319 …__IOM uint32_t reg; /*!< (@ 0x00000020) * IRQ_ADDR0 * … member
327 …__IOM uint32_t reg; /*!< (@ 0x00000024) * CURR_CLK * … member
337 …__IOM uint32_t reg; /*!< (@ 0x00000100) * RV_CTRL * … member
364 …__IOM uint32_t reg; /*!< (@ 0x00000104) * RV_IRQ * … member
380 …__IOM uint32_t reg; /*!< (@ 0x00000108) * SW_IRQ * … member
391 …__IOM uint32_t reg; /*!< (@ 0x0000010C) * BIN_IRQ * … member
1386 …__IOM uint32_t reg; /*!< (@ 0x00000008) WDT KICK, 必须写 0x5937 … member
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