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Searched defs:reg_offset (Results 1 – 9 of 9) sorted by relevance

/bsp/core-v-mcu/Libraries/core_v_hal_libraries/core_v_hal/include/
A Dhal_soc_eu_periph.h140 uint32_t reg_offset = evt/32 * 4; in hal_soc_eu_set_fc_mask() local
149 uint32_t reg_offset = evt/32 * 4; in hal_soc_eu_set_pr_mask() local
158 uint32_t reg_offset = evt/32 * 4; in hal_soc_eu_set_cl_mask() local
167 uint32_t reg_offset = evt/32 * 4; in hal_soc_eu_clear_fc_mask() local
176 uint32_t reg_offset = evt/32 * 4; in hal_soc_eu_clear_pr_mask() local
185 uint32_t reg_offset = evt/32 * 4; in hal_soc_eu_clear_cl_mask() local
/bsp/at91/at91sam9260/platform/
A Dio.h27 rt_inline unsigned int at91_sys_read(unsigned int reg_offset) in at91_sys_read()
34 rt_inline void at91_sys_write(unsigned int reg_offset, unsigned long value) in at91_sys_write()
/bsp/allwinner/libraries/sunxi-hal/hal/source/g2d_rcq/
A Dg2d_rcq.h54 __u32 reg_offset; /* offset_addr based on g2d_reg_base */ member
/bsp/nxp/imx/imx6ull-smart/drivers/
A Ddrv_pin.c202 rt_int8_t port, pin_num, reg_offset; in imx6ull_pin_mode() local
/bsp/allwinner/libraries/sunxi-hal/hal/source/pwm/
A Dhal_pwm.c370 unsigned int reg_offset, reg_shift, reg_width; in hal_pwm_control() local
/bsp/nxp/imx/imxrt/libraries/drivers/
A Ddrv_gpio.c97 const rt_int32_t reg_offset[] = variable
/bsp/allwinner/libraries/sunxi-hal/hal/source/sound/platform/
A Dsunxi-mad.c801 int reg_offset = 0; in sunxi_mad_show_all_regs() local
/bsp/frdm-k64f/device/MK64F12/
A Dfsl_clock.h363 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
/bsp/allwinner/libraries/sunxi-hal/hal/source/sdmmc/
A Dhal_sdhost.c1210 int32_t __mci_check_bit_clear(struct mmc_host *host, uint32_t reg_offset, uint32_t bit_map) in __mci_check_bit_clear()

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