1  /*
2  * Copyright (C) 2017-2024 Alibaba Group Holding Limited
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Licensed under the Apache License, Version 2.0 (the "License");
7  * you may not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  *     http://www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an "AS IS" BASIS,
14  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  */
18 
19 #include <csi_config.h>
20 #include <stdbool.h>
21 #include <csi_core.h>
22 #include <soc.h>
23 
soc_irq_enable(uint32_t irq_num)24 void soc_irq_enable(uint32_t irq_num)
25 {
26     csi_vic_enable_irq((int32_t)irq_num);
27 }
28 
soc_irq_disable(uint32_t irq_num)29 void soc_irq_disable(uint32_t irq_num)
30 {
31     csi_vic_disable_irq((int32_t)irq_num);
32 }
33 
soc_irq_is_enabled(uint32_t irq_num)34 bool soc_irq_is_enabled(uint32_t irq_num)
35 {
36     bool ret;
37 
38     if (csi_vic_get_enabled_irq((int32_t)irq_num)) {
39         ret = true;
40     } else {
41         ret = false;
42     }
43 
44     return ret;
45 }
46 
soc_irq_priority(uint32_t irq_num,uint32_t priority)47 void soc_irq_priority(uint32_t irq_num, uint32_t priority)
48 {
49     csi_vic_set_prio((int32_t)irq_num, priority);
50 }
51 
52 /**
53  * @brief get external irq number only
54  * @return irq no
55  */
soc_irq_get_irq_num(void)56 uint32_t soc_irq_get_irq_num(void)
57 {
58 #if CONFIG_CPU_XUANTIE_E9XX
59     return (__get_MCAUSE() & 0x3FFU);
60 #else
61     uint32_t num;
62 #if CONFIG_INTC_CLIC_PLIC
63     uint32_t irqn = __get_MCAUSE() & 0x3FFU;
64     if (irqn == Machine_External_IRQn) {
65         num = PLIC_Hn_MSCLAIM_VAL(&PLIC->PLIC_H0_MCLAIM, csi_get_cpu_id());
66         num += PLIC_IRQ_OFFSET;
67     } else {
68         num = irqn;
69     }
70 #else
71 #if defined(CONFIG_RISCV_SMODE) && CONFIG_RISCV_SMODE
72     num = PLIC_Hn_MSCLAIM_VAL(&PLIC->PLIC_H0_SCLAIM, csi_get_cpu_id());
73 #else
74     num = PLIC_Hn_MSCLAIM_VAL(&PLIC->PLIC_H0_MCLAIM, csi_get_cpu_id());
75 #endif
76 #endif
77     return num;
78 #endif /* end exx */
79 }
80 
soc_irq_end(uint32_t irq_num)81 void soc_irq_end(uint32_t irq_num)
82 {
83 #if CONFIG_CPU_XUANTIE_E9XX
84     //TODO:
85 #else
86 #if CONFIG_INTC_CLIC_PLIC
87     if (irq_num <= PLIC_IRQ_OFFSET) {
88         return;
89     }
90     irq_num -= PLIC_IRQ_OFFSET;
91 #endif
92 #if defined(CONFIG_RISCV_SMODE) && CONFIG_RISCV_SMODE
93     PLIC_Hn_MSCLAIM_VAL(&PLIC->PLIC_H0_SCLAIM, csi_get_cpu_id()) = irq_num;
94 #else
95     PLIC_Hn_MSCLAIM_VAL(&PLIC->PLIC_H0_MCLAIM, csi_get_cpu_id()) = irq_num;
96 #endif
97 #endif /* end exx */
98 }
99