1 /*
2 * Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
3 *
4 * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
5 * the the people's Republic of China and other countries.
6 * All Allwinner Technology Co.,Ltd. trademarks are used with permission.
7 *
8 * DISCLAIMER
9 * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
10 * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
11 * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
12 * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
13 * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
14 * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
15 * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY.
16 *
17 *
18 * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
19 * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
20 * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
21 * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
22 * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
23 * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
26 * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
28 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
30 * OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32 #include <hal_timer.h>
33 #include <stdio.h>
34 #include <stdlib.h>
35 #include <string.h>
36 #include <init.h>
37 #include <log.h>
38 #include <sound/snd_core.h>
39 #include <sound/snd_pcm.h>
40 #include <sound/pcm_common.h>
41 #include <aw_common.h>
42 #include <hal_gpio.h>
43 #include <sound/snd_dma.h>
44 #include <sound/dma_wrap.h>
45 #include <hal_dma.h>
46 #include "hal_clk.h"
47
48 #include "sunxi-codec.h"
49 #include "sun8iw19-codec.h"
50 /* #include "../platform/sun8iw19-daudio.h" */
51
52 struct snd_codec sunxi_audiocodec;
53
54 static struct sunxi_codec_param default_param = {
55 .digital_vol = 0x0,
56 .lineout_vol = 0x1f,
57 .mic1gain = 0x1f,
58 .lineingain = 0x0,
59 .gpio_spk = GPIOH(4),
60 .pa_msleep_time = 160,
61 .pa_level = 1,
62 .adcdrc_cfg = 0,
63 .adchpf_cfg = 1,
64 .dacdrc_cfg = 0,
65 .dachpf_cfg = 0,
66 };
67
68 static const struct sample_rate sample_rate_conv[] = {
69 {44100, 0},
70 {48000, 0},
71 {8000, 5},
72 {32000, 1},
73 {22050, 2},
74 {24000, 2},
75 {16000, 3},
76 {11025, 4},
77 {12000, 4},
78 {192000, 6},
79 {96000, 7},
80 };
81
82 #ifdef SUNXI_ADC_DAUDIO_SYNC
83 struct snd_codec *adc_daudio_sync_codec;
84 static int substream_mode;
85 int adc_sync_flag;
86
sunxi_codec_get_pcm_trigger_substream_mode(void)87 int sunxi_codec_get_pcm_trigger_substream_mode(void)
88 {
89 return substream_mode;
90 }
91
sunxi_codec_set_pcm_trigger_substream_mode(int value)92 void sunxi_codec_set_pcm_trigger_substream_mode(int value)
93 {
94 if (!((adc_sync_flag >> ADC_I2S_RUNNING) & 0x1)) {
95 substream_mode = value;
96 } else {
97 pr_err("set the adc sync mode should be stop the record.\n");
98 }
99 }
100
sunxi_codec_set_pcm_adc_sync_flag(int value)101 void sunxi_codec_set_pcm_adc_sync_flag(int value)
102 {
103 adc_sync_flag = value;
104 }
105
sunxi_codec_get_pcm_adc_sync_flag(void)106 int sunxi_codec_get_pcm_adc_sync_flag(void)
107 {
108 return adc_sync_flag;
109 }
110
111 /* for adc and i2s rx sync */
sunxi_cpudai_adc_drq_enable(bool enable)112 void sunxi_cpudai_adc_drq_enable(bool enable)
113 {
114 if (enable) {
115 snd_codec_update_bits(adc_daudio_sync_codec, SUNXI_ADC_FIFOC,
116 (1 << ADC_DRQ_EN), (1 << ADC_DRQ_EN));
117 } else {
118 snd_codec_update_bits(adc_daudio_sync_codec, SUNXI_ADC_FIFOC,
119 (1 << ADC_DRQ_EN), (0 << ADC_DRQ_EN));
120 }
121 }
122 #endif
123
124 #ifdef SUNXI_CODEC_DAP_ENABLE
adcdrc_config(struct snd_codec * codec)125 static void adcdrc_config(struct snd_codec *codec)
126 {
127 /* Left peak filter attack time */
128 snd_codec_write(codec, SUNXI_ADC_DRC_LPFHAT, (0x000B77BF >> 16) & 0xFFFF);
129 snd_codec_write(codec, SUNXI_ADC_DRC_LPFLAT, 0x000B77BF & 0xFFFF);
130 /* Right peak filter attack time */
131 snd_codec_write(codec, SUNXI_ADC_DRC_RPFHAT, (0x000B77BF >> 16) & 0xFFFF);
132 snd_codec_write(codec, SUNXI_ADC_DRC_RPFLAT, 0x000B77BF & 0xFFFF);
133 /* Left peak filter release time */
134 snd_codec_write(codec, SUNXI_ADC_DRC_LPFHRT, (0x00FFE1F8 >> 16) & 0xFFFF);
135 snd_codec_write(codec, SUNXI_ADC_DRC_LPFLRT, 0x00FFE1F8 & 0xFFFF);
136 /* Right peak filter release time */
137 snd_codec_write(codec, SUNXI_ADC_DRC_RPFHRT, (0x00FFE1F8 >> 16) & 0xFFFF);
138 snd_codec_write(codec, SUNXI_ADC_DRC_RPFLRT, 0x00FFE1F8 & 0xFFFF);
139
140 /* Left RMS filter attack time */
141 snd_codec_write(codec, SUNXI_ADC_DRC_LPFHAT, (0x00012BAF >> 16) & 0xFFFF);
142 snd_codec_write(codec, SUNXI_ADC_DRC_LPFLAT, 0x00012BAF & 0xFFFF);
143 /* Right RMS filter attack time */
144 snd_codec_write(codec, SUNXI_ADC_DRC_RPFHAT, (0x00012BAF >> 16) & 0xFFFF);
145 snd_codec_write(codec, SUNXI_ADC_DRC_RPFLAT, 0x00012BAF & 0xFFFF);
146
147 /* smooth filter attack time */
148 snd_codec_write(codec, SUNXI_ADC_DRC_SFHAT, (0x00017665 >> 16) & 0xFFFF);
149 snd_codec_write(codec, SUNXI_ADC_DRC_SFLAT, 0x00017665 & 0xFFFF);
150 /* gain smooth filter release time */
151 snd_codec_write(codec, SUNXI_ADC_DRC_SFHRT, (0x00000F04 >> 16) & 0xFFFF);
152 snd_codec_write(codec, SUNXI_ADC_DRC_SFLRT, 0x00000F04 & 0xFFFF);
153
154 /* OPL */
155 snd_codec_write(codec, SUNXI_ADC_DRC_HOPL, (0xFBD8FBA7 >> 16) & 0xFFFF);
156 snd_codec_write(codec, SUNXI_ADC_DRC_LOPL, 0xFBD8FBA7 & 0xFFFF);
157 /* OPC */
158 snd_codec_write(codec, SUNXI_ADC_DRC_HOPC, (0xF95B2C3F >> 16) & 0xFFFF);
159 snd_codec_write(codec, SUNXI_ADC_DRC_LOPC, 0xF95B2C3F & 0xFFFF);
160 /* OPE */
161 snd_codec_write(codec, SUNXI_ADC_DRC_HOPE, (0xF45F8D6E >> 16) & 0xFFFF);
162 snd_codec_write(codec, SUNXI_ADC_DRC_LOPE, 0xF45F8D6E & 0xFFFF);
163 /* LT */
164 snd_codec_write(codec, SUNXI_ADC_DRC_HLT, (0x01A934F0 >> 16) & 0xFFFF);
165 snd_codec_write(codec, SUNXI_ADC_DRC_LLT, 0x01A934F0 & 0xFFFF);
166 /* CT */
167 snd_codec_write(codec, SUNXI_ADC_DRC_HCT, (0x06A4D3C0 >> 16) & 0xFFFF);
168 snd_codec_write(codec, SUNXI_ADC_DRC_LCT, 0x06A4D3C0 & 0xFFFF);
169 /* ET */
170 snd_codec_write(codec, SUNXI_ADC_DRC_HET, (0x0BA07291 >> 16) & 0xFFFF);
171 snd_codec_write(codec, SUNXI_ADC_DRC_LET, 0x0BA07291 & 0xFFFF);
172 /* Ki */
173 snd_codec_write(codec, SUNXI_ADC_DRC_HKI, (0x00051EB8 >> 16) & 0xFFFF);
174 snd_codec_write(codec, SUNXI_ADC_DRC_LKI, 0x00051EB8 & 0xFFFF);
175 /* Kc */
176 snd_codec_write(codec, SUNXI_ADC_DRC_HKC, (0x00800000 >> 16) & 0xFFFF);
177 snd_codec_write(codec, SUNXI_ADC_DRC_LKC, 0x00800000 & 0xFFFF);
178 /* Kn */
179 snd_codec_write(codec, SUNXI_ADC_DRC_HKN, (0x01000000 >> 16) & 0xFFFF);
180 snd_codec_write(codec, SUNXI_ADC_DRC_LKN, 0x01000000 & 0xFFFF);
181 /* Ke */
182 snd_codec_write(codec, SUNXI_ADC_DRC_HKE, (0x0000F45F >> 16) & 0xFFFF);
183 snd_codec_write(codec, SUNXI_ADC_DRC_LKE, 0x0000F45F & 0xFFFF);
184 }
185
adcdrc_enable(struct snd_codec * codec,bool on)186 static void adcdrc_enable(struct snd_codec *codec, bool on)
187 {
188 struct sunxi_codec_info *sunxi_codec = codec->private_data;
189
190 if (on) {
191 snd_codec_update_bits(codec, SUNXI_ADC_DAP_CTL,
192 (0x1 << ADC_DRC0_EN), (0x1 << ADC_DRC0_EN));
193 } else {
194 snd_codec_update_bits(codec, SUNXI_ADC_DAP_CTL,
195 (0x1 << ADC_DRC0_EN), (0x0 << ADC_DRC0_EN));
196 }
197 }
198
adchpf_config(struct snd_codec * codec)199 static void adchpf_config(struct snd_codec *codec)
200 {
201 /* HPF */
202 snd_codec_write(codec, SUNXI_ADC_DRC_HHPFC, (0xFFFAC1 >> 16) & 0xFFFF);
203 snd_codec_write(codec, SUNXI_ADC_DRC_LHPFC, 0xFFFAC1 & 0xFFFF);
204 }
205
adchpf_enable(struct snd_codec * codec,bool on)206 static void adchpf_enable(struct snd_codec *codec, bool on)
207 {
208 struct sunxi_codec_info *sunxi_codec = codec->private_data;
209
210 if (on) {
211 snd_codec_update_bits(codec, SUNXI_ADC_DAP_CTL,
212 (0x1 << ADC_HPF0_EN), (0x1 << ADC_HPF0_EN));
213 } else {
214 snd_codec_update_bits(codec, SUNXI_ADC_DAP_CTL,
215 (0x1 << ADC_HPF0_EN), (0x0 << ADC_HPF0_EN));
216 }
217 }
218
dacdrc_config(struct snd_codec * codec)219 static void dacdrc_config(struct snd_codec *codec)
220 {
221 /* Left peak filter attack time */
222 snd_codec_write(codec, SUNXI_DAC_DRC_LPFHAT, (0x000B77BF >> 16) & 0xFFFF);
223 snd_codec_write(codec, SUNXI_DAC_DRC_LPFLAT, 0x000B77BF & 0xFFFF);
224 /* Right peak filter attack time */
225 snd_codec_write(codec, SUNXI_DAC_DRC_RPFHAT, (0x000B77F0 >> 16) & 0xFFFF);
226 snd_codec_write(codec, SUNXI_DAC_DRC_RPFLAT, 0x000B77F0 & 0xFFFF);
227
228 /* Left peak filter release time */
229 snd_codec_write(codec, SUNXI_DAC_DRC_LPFHRT, (0x00FFE1F8 >> 16) & 0xFFFF);
230 snd_codec_write(codec, SUNXI_DAC_DRC_LPFLRT, 0x00FFE1F8 & 0xFFFF);
231 /* Right peak filter release time */
232 snd_codec_write(codec, SUNXI_DAC_DRC_RPFHRT, (0x00FFE1F8 >> 16) & 0xFFFF);
233 snd_codec_write(codec, SUNXI_DAC_DRC_RPFLRT, 0x00FFE1F8 & 0xFFFF);
234
235 /* Left RMS filter attack time */
236 snd_codec_write(codec, SUNXI_DAC_DRC_LRMSHAT, (0x00012BB0 >> 16) & 0xFFFF);
237 snd_codec_write(codec, SUNXI_DAC_DRC_LRMSLAT, 0x00012BB0 & 0xFFFF);
238 /* Right RMS filter attack time */
239 snd_codec_write(codec, SUNXI_DAC_DRC_RRMSHAT, (0x00012BB0 >> 16) & 0xFFFF);
240 snd_codec_write(codec, SUNXI_DAC_DRC_RRMSLAT, 0x00012BB0 & 0xFFFF);
241
242 /* smooth filter attack time */
243 snd_codec_write(codec, SUNXI_DAC_DRC_SFHAT, (0x00017665 >> 16) & 0xFFFF);
244 snd_codec_write(codec, SUNXI_DAC_DRC_SFLAT, 0x00017665 & 0xFFFF);
245 /* gain smooth filter release time */
246 snd_codec_write(codec, SUNXI_DAC_DRC_SFHRT, (0x00000F04 >> 16) & 0xFFFF);
247 snd_codec_write(codec, SUNXI_DAC_DRC_SFLRT, 0x00000F04 & 0xFFFF);
248
249 /* OPL */
250 snd_codec_write(codec, SUNXI_DAC_DRC_HOPL, (0xFF641741 >> 16) & 0xFFFF);
251 snd_codec_write(codec, SUNXI_DAC_DRC_LOPL, 0xFF641741 & 0xFFFF);
252 /* OPC */
253 snd_codec_write(codec, SUNXI_DAC_DRC_HOPC, (0xF9E8E88C >> 16) & 0xFFFF);
254 snd_codec_write(codec, SUNXI_DAC_DRC_LOPC, 0xF9E8E88C & 0xFFFF);
255 /* OPE */
256 snd_codec_write(codec, SUNXI_DAC_DRC_HOPE, (0xF5DE3D14 >> 16) & 0xFFFF);
257 snd_codec_write(codec, SUNXI_DAC_DRC_LOPE, 0xF5DE3D14 & 0xFFFF);
258 /* LT */
259 snd_codec_write(codec, SUNXI_DAC_DRC_HLT, (0x0336110B >> 16) & 0xFFFF);
260 snd_codec_write(codec, SUNXI_DAC_DRC_LLT, 0x0336110B & 0xFFFF);
261 /* CT */
262 snd_codec_write(codec, SUNXI_DAC_DRC_HCT, (0x08BF6C28 >> 16) & 0xFFFF);
263 snd_codec_write(codec, SUNXI_DAC_DRC_LCT, 0x08BF6C28 & 0xFFFF);
264 /* ET */
265 snd_codec_write(codec, SUNXI_DAC_DRC_HET, (0x0C9F9255 >> 16) & 0xFFFF);
266 snd_codec_write(codec, SUNXI_DAC_DRC_LET, 0x0C9F9255 & 0xFFFF);
267 /* Ki */
268 snd_codec_write(codec, SUNXI_DAC_DRC_HKI, (0x001A7B96 >> 16) & 0xFFFF);
269 snd_codec_write(codec, SUNXI_DAC_DRC_LKI, 0x001A7B96 & 0xFFFF);
270 /* Kc */
271 snd_codec_write(codec, SUNXI_DAC_DRC_HKC, (0x00FD70A5 >> 16) & 0xFFFF);
272 snd_codec_write(codec, SUNXI_DAC_DRC_LKC, 0x00FD70A5 & 0xFFFF);
273 /* Kn */
274 snd_codec_write(codec, SUNXI_DAC_DRC_HKN, (0x010AF8B0 >> 16) & 0xFFFF);
275 snd_codec_write(codec, SUNXI_DAC_DRC_LKN, 0x010AF8B0 & 0xFFFF);
276 /* Ke */
277 snd_codec_write(codec, SUNXI_DAC_DRC_HKE, (0x06286BA0 >> 16) & 0xFFFF);
278 snd_codec_write(codec, SUNXI_DAC_DRC_LKE, 0x06286BA0 & 0xFFFF);
279 /* MXG */
280 snd_codec_write(codec, SUNXI_DAC_DRC_MXGHS, (0x035269E0 >> 16) & 0xFFFF);
281 snd_codec_write(codec, SUNXI_DAC_DRC_MXGLS, 0x035269E0 & 0xFFFF);
282 /* MNG */
283 snd_codec_write(codec, SUNXI_DAC_DRC_MNGHS, (0xF95B2C3F >> 16) & 0xFFFF);
284 snd_codec_write(codec, SUNXI_DAC_DRC_MNGLS, 0xF95B2C3F & 0xFFFF);
285 /* EPS */
286 snd_codec_write(codec, SUNXI_DAC_DRC_EPSHC, (0x00025600 >> 16) & 0xFFFF);
287 snd_codec_write(codec, SUNXI_DAC_DRC_EPSLC, 0x00025600 & 0xFFFF);
288 }
289
dacdrc_enable(struct snd_codec * codec,bool on)290 static void dacdrc_enable(struct snd_codec *codec, bool on)
291 {
292 struct sunxi_codec_info *sunxi_codec = codec->private_data;
293
294 if (on) {
295 /* detect noise when ET enable */
296 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
297 (0x1 << DAC_DRC_NOISE_DET_EN),
298 (0x1 << DAC_DRC_NOISE_DET_EN));
299
300 /* 0x0:RMS filter; 0x1:Peak filter */
301 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
302 (0x1 << DAC_DRC_SIGNAL_SEL),
303 (0x1 << DAC_DRC_SIGNAL_SEL));
304
305 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
306 (0x1 << DAC_DRC_GAIN_MAX_EN),
307 (0x1 << DAC_DRC_GAIN_MAX_EN));
308
309 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
310 (0x1 << DAC_DRC_GAIN_MIN_EN),
311 (0x1 << DAC_DRC_GAIN_MIN_EN));
312
313 /* delay function enable */
314 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
315 (0x1 << DAC_DRC_DELAY_BUF_EN),
316 (0x1 << DAC_DRC_DELAY_BUF_EN));
317
318 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
319 (0x1 << DAC_DRC_LT_EN),
320 (0x1 << DAC_DRC_LT_EN));
321 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
322 (0x1 << DAC_DRC_ET_EN),
323 (0x1 << DAC_DRC_ET_EN));
324
325 snd_codec_update_bits(codec, SUNXI_DAC_DAP_CTL,
326 (0x1 << DDAP_DRC_EN),
327 (0x1 << DDAP_DRC_EN));
328 } else {
329 snd_codec_update_bits(codec, SUNXI_DAC_DAP_CTL,
330 (0x1 << DDAP_DRC_EN),
331 (0x0 << DDAP_DRC_EN));
332
333 /* detect noise when ET enable */
334 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
335 (0x1 << DAC_DRC_NOISE_DET_EN),
336 (0x0 << DAC_DRC_NOISE_DET_EN));
337
338 /* 0x0:RMS filter; 0x1:Peak filter */
339 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
340 (0x1 << DAC_DRC_SIGNAL_SEL),
341 (0x0 << DAC_DRC_SIGNAL_SEL));
342
343 /* delay function enable */
344 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
345 (0x1 << DAC_DRC_DELAY_BUF_EN),
346 (0x0 << DAC_DRC_DELAY_BUF_EN));
347
348 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
349 (0x1 << DAC_DRC_GAIN_MAX_EN),
350 (0x0 << DAC_DRC_GAIN_MAX_EN));
351 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
352 (0x1 << DAC_DRC_GAIN_MIN_EN),
353 (0x0 << DAC_DRC_GAIN_MIN_EN));
354
355 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
356 (0x1 << DAC_DRC_LT_EN),
357 (0x0 << DAC_DRC_LT_EN));
358 snd_codec_update_bits(codec, SUNXI_DAC_DRC_CTRL,
359 (0x1 << DAC_DRC_ET_EN),
360 (0x0 << DAC_DRC_ET_EN));
361 }
362 }
363
dachpf_config(struct snd_codec * codec)364 static void dachpf_config(struct snd_codec *codec)
365 {
366 /* HPF */
367 snd_codec_write(codec, SUNXI_DAC_DRC_HHPFC, (0xFFFAC1 >> 16) & 0xFFFF);
368 snd_codec_write(codec, SUNXI_DAC_DRC_LHPFC, 0xFFFAC1 & 0xFFFF);
369 }
370
dachpf_enable(struct snd_codec * codec,bool on)371 static void dachpf_enable(struct snd_codec *codec, bool on)
372 {
373 struct sunxi_codec_info *sunxi_codec = codec->private_data;
374
375 if (on) {
376 snd_codec_update_bits(codec, SUNXI_DAC_DAP_CTL,
377 (0x1 << DDAP_HPF_EN),
378 (0x1 << DDAP_HPF_EN));
379 } else {
380 snd_codec_update_bits(codec, SUNXI_DAC_DAP_CTL,
381 (0x1 << DDAP_HPF_EN),
382 (0x0 << DDAP_HPF_EN));
383 }
384 }
385 #endif
386
387 /* for adc and i2s rx sync */
388 #ifdef SUNXI_ADC_DAUDIO_SYNC
sunxi_codec_get_substream_mode(struct snd_kcontrol * kcontrol,struct snd_ctl_info * info)389 static int sunxi_codec_get_substream_mode(struct snd_kcontrol *kcontrol,
390 struct snd_ctl_info *info)
391 {
392 unsigned int val = 0;
393 uint32_t __cpsr;
394
395 __cpsr = hal_spin_lock_irqsave();
396
397 if (kcontrol->type != SND_CTL_ELEM_TYPE_ENUMERATED)
398 return -EINVAL;
399
400 if (kcontrol->private_data_type == SND_MODULE_CODEC)
401 val = sunxi_codec_get_pcm_trigger_substream_mode();
402 else
403 return -EINVAL;
404
405 snd_kcontrol_to_snd_ctl_info(kcontrol, info, val);
406 hal_spin_unlock_irqrestore(__cpsr);
407
408 return 0;
409
410 }
411
sunxi_codec_set_substream_mode(struct snd_kcontrol * kcontrol,unsigned long value)412 static int sunxi_codec_set_substream_mode(struct snd_kcontrol *kcontrol,
413 unsigned long value)
414 {
415 uint32_t __cpsr;
416
417 __cpsr = hal_spin_lock_irqsave();
418
419 if (kcontrol->type != SND_CTL_ELEM_TYPE_ENUMERATED)
420 return -EINVAL;
421
422 if (value >= kcontrol->items)
423 return -EINVAL;
424
425 if (kcontrol->private_data_type == SND_MODULE_CODEC)
426 sunxi_codec_set_pcm_trigger_substream_mode(value);
427
428 hal_spin_unlock_irqrestore(__cpsr);
429 snd_info("mask:0x%x, items:%d, value:0x%x\n",
430 kcontrol->mask, kcontrol->items, value);
431
432 return 0;
433 }
434
435 static const char * const sunxi_codec_substream_mode_function[] = {"ADC_ASYNC",
436 "ADC_I2S_SYNC"};
437 #endif
438
439 static const char * const codec_format_function[] = {
440 "hub_disable", "hub_enable"};
441
442 static const char * const codec_output_mode_select[] = {
443 "DACL_SINGLE", "DACL_DIFFER"};
444
445 static const char * const codec_linein_switch[] = {
446 "Off", "On"};
447
448
449 static struct snd_kcontrol sunxi_codec_controls[] = {
450 SND_CTL_ENUM("codec hub mode",
451 ARRAY_SIZE(codec_format_function), codec_format_function,
452 SUNXI_DAC_DPC, DAC_HUB_EN),
453 SND_CTL_ENUM("Left LINEOUT Mux",
454 ARRAY_SIZE(codec_output_mode_select), codec_output_mode_select,
455 SUNXI_DAC_ANA_CTL, LINEOUTLDIFFEN),
456 SND_CTL_ENUM("Left Input Mixer LINEINL Switch",
457 ARRAY_SIZE(codec_linein_switch), codec_linein_switch,
458 SUNXI_ADCL_ANA_CTL, LINEINLEN),
459 #ifdef SUNXI_ADC_DAUDIO_SYNC
460 SND_CTL_ENUM_EXT("codec trigger substream mode",
461 ARRAY_SIZE(sunxi_codec_substream_mode_function),
462 sunxi_codec_substream_mode_function,
463 SND_CTL_ENUM_AUTO_MASK,
464 sunxi_codec_get_substream_mode,
465 sunxi_codec_set_substream_mode),
466 #endif
467 SND_CTL_KCONTROL("digital volume", SUNXI_DAC_DPC, DVOL, 0x3F),
468 SND_CTL_KCONTROL("LINEIN gain volume", SUNXI_ADCL_ANA_CTL, LINEINLG, 0x1),
469 SND_CTL_KCONTROL("MIC1 gain volume", SUNXI_ADCL_ANA_CTL, PGA_GAIN_CTRL, 0x1F),
470 SND_CTL_KCONTROL("LINEOUT volume", SUNXI_DAC_ANA_CTL, LINEOUT_VOL, 0x1F),
471 };
472
sunxi_codec_init(struct snd_codec * codec)473 static void sunxi_codec_init(struct snd_codec *codec)
474 {
475 struct sunxi_codec_info *sunxi_codec = codec->private_data;
476 struct sunxi_codec_param *param = &sunxi_codec->param;
477 unsigned int ret;
478
479 /* Enable ADCFDT to overcome niose at the beginning */
480 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
481 (0x7 << ADCDFEN), (0x7 << ADCDFEN));
482
483 /* init the mic pga and vol params */
484 snd_codec_update_bits(codec, SUNXI_DAC_ANA_CTL,
485 0x1F << LINEOUT_VOL,
486 param->lineout_vol << LINEOUT_VOL);
487
488 snd_codec_update_bits(codec, SUNXI_DAC_DPC,
489 0x3F << DVOL,
490 param->digital_vol << DVOL);
491
492 snd_codec_update_bits(codec, SUNXI_ADCL_ANA_CTL,
493 0x1F << PGA_GAIN_CTRL,
494 param->mic1gain << PGA_GAIN_CTRL);
495
496 snd_codec_update_bits(codec, SUNXI_ADCL_ANA_CTL,
497 0x1 << LINEINLG,
498 param->lineingain << LINEINLG);
499
500 snd_codec_update_bits(codec, SUNXI_ADCL_ANA_CTL,
501 0x3 << IOPLINE, 0x1 << IOPLINE);
502
503 #ifdef SUNXI_CODEC_DAP_ENABLE
504 if (param->dacdrc_cfg || param->dachpf_cfg) {
505 snd_codec_update_bits(codec, SUNXI_DAC_DAP_CTL,
506 (0x1 << DDAP_EN), (0x1 << DDAP_EN));
507 }
508
509 if (param->adcdrc_cfg || param->adchpf_cfg) {
510 snd_codec_update_bits(codec, SUNXI_ADC_DAP_CTL,
511 (0x1 << ADC_DAP0_EN), (0x1 << ADC_DAP0_EN));
512 }
513
514 if (param->adcdrc_cfg) {
515 adcdrc_config(codec);
516 adcdrc_enable(codec, 1);
517 }
518 if (param->adchpf_cfg) {
519 adchpf_config(codec);
520 adchpf_enable(codec, 1);
521 }
522 if (param->dacdrc_cfg) {
523 dacdrc_config(codec);
524 dacdrc_enable(codec, 1);
525 }
526 if (param->dachpf_cfg) {
527 dachpf_config(codec);
528 dachpf_enable(codec, 1);
529 }
530 #endif
531 }
532
sunxi_codec_dapm_control(struct snd_pcm_substream * substream,struct snd_dai * dai,int onoff)533 static int sunxi_codec_dapm_control(struct snd_pcm_substream *substream,
534 struct snd_dai *dai, int onoff)
535 {
536 struct snd_codec *codec = dai->component;
537 struct sunxi_codec_info *sunxi_codec = codec->private_data;
538 struct sunxi_codec_param *param = &sunxi_codec->param;
539
540 if (substream->dapm_state == onoff)
541 return 0;
542 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
543 /*
544 * Playback:
545 * Playback --> DACL --> Left LINEOUT Mux --> LINEOUTL --> External Speaker
546 *
547 */
548 if (onoff) {
549 /* Playback on */
550 /* analog DAC enable */
551 snd_codec_update_bits(codec, SUNXI_DAC_ANA_CTL,
552 (0x1<<DACLEN), (0x1<<DACLEN));
553 /* digital DAC enable */
554 snd_codec_update_bits(codec, SUNXI_DAC_DPC,
555 (0x1<<EN_DAC), (0x1<<EN_DAC));
556 hal_msleep(10);
557 snd_codec_update_bits(codec, SUNXI_DAC_ANA_CTL,
558 (0x1<<DACLMUTE), (0x1<<DACLMUTE));
559 /* LINEOUT */
560 snd_codec_update_bits(codec, SUNXI_DAC_ANA_CTL,
561 (0x1<<LINEOUTL_EN), (0x1<<LINEOUTL_EN));
562
563 if (param->gpio_spk > 0) {
564 hal_gpio_set_direction(param->gpio_spk, 1);
565 hal_gpio_set_data(param->gpio_spk, 1);
566 hal_msleep(param->pa_msleep_time);
567 }
568 } else {
569 /* Playback off */
570 if (param->gpio_spk > 0) {
571 hal_gpio_set_direction(param->gpio_spk, 0);
572 hal_gpio_set_data(param->gpio_spk, 0);
573 }
574 /* LINEOUT */
575 snd_codec_update_bits(codec, SUNXI_DAC_ANA_CTL,
576 (0x1<<LINEOUTL_EN), (0x0<<LINEOUTL_EN));
577
578 snd_codec_update_bits(codec, SUNXI_DAC_ANA_CTL,
579 (0x1<<DACLMUTE), (0x0<<DACLMUTE));
580
581 /* digital DAC */
582 snd_codec_update_bits(codec, SUNXI_DAC_DPC,
583 (0x1<<EN_DAC), (0x0<<EN_DAC));
584 /* analog DAC */
585 snd_codec_update_bits(codec, SUNXI_DAC_ANA_CTL,
586 (0x1<<DACLEN), (0x0<<DACLEN));
587 }
588 } else {
589 /*
590 * Capture:
591 * Capture <-- ADCL <-- Left Input Mixer <-- MIC1 PGA <-- MIC1 <-- MainMic Bias
592 *
593 */
594 unsigned int channels = 0;
595 channels = substream->runtime->channels;
596
597 snd_print("channels = %u\n", channels);
598 if (onoff) {
599 /* Capture on */
600 /* digital ADC enable */
601 hal_msleep(100);
602 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
603 (0x1<<EN_AD), (0x1<<EN_AD));
604 switch (channels) {
605 case 1:
606 /* analog ADCL enable */
607 snd_codec_update_bits(codec, SUNXI_ADCL_ANA_CTL,
608 (0x1<<ADCLEN), (0x1<<ADCLEN));
609
610 snd_codec_update_bits(codec, SUNXI_ADCL_ANA_CTL,
611 (0x1<<MIC1AMPEN), (0x1<<MIC1AMPEN));
612 break;
613 default:
614 snd_err("unknown channels:%u\n", channels);
615 return -1;
616 }
617 /* MainMic Bias */
618 snd_codec_update_bits(codec, SUNXI_MICBIAS_ANA_CTL,
619 (0x1<<MMICBIASEN), (0x1<<MMICBIASEN));
620 } else {
621 /* Capture off */
622 /* MainMic Bias */
623 snd_codec_update_bits(codec, SUNXI_MICBIAS_ANA_CTL,
624 (0x1<<MMICBIASEN), (0x0<<MMICBIASEN));
625 switch (channels) {
626 case 1:
627 /* MIC1 PGA */
628 snd_codec_update_bits(codec, SUNXI_ADCL_ANA_CTL,
629 (0x1<<MIC1AMPEN), (0x0<<MIC1AMPEN));
630
631 /* analog ADCL enable */
632 snd_codec_update_bits(codec, SUNXI_ADCL_ANA_CTL,
633 (0x1<<ADCLEN), (0x0<<ADCLEN));
634 break;
635 default:
636 snd_err("unknown channels:%u\n", channels);
637 return -1;
638 }
639 /* digital ADC enable */
640 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
641 (0x1<<EN_AD), (0x0<<EN_AD));
642 }
643 }
644 substream->dapm_state = onoff;
645 return 0;
646 }
647
sunxi_codec_startup(struct snd_pcm_substream * substream,struct snd_dai * dai)648 static int sunxi_codec_startup(struct snd_pcm_substream *substream,
649 struct snd_dai *dai)
650 {
651 struct snd_codec *codec = dai->component;
652 struct sunxi_codec_info *sunxi_codec = codec->private_data;
653 // struct sunxi_codec_param *param = codec->param;
654
655 snd_print("\n");
656
657 return 0;
658 }
659
660
sunxi_codec_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_dai * dai)661 static int sunxi_codec_hw_params(struct snd_pcm_substream *substream,
662 struct snd_pcm_hw_params *params, struct snd_dai *dai)
663 {
664 struct snd_codec *codec = dai->component;
665 struct sunxi_codec_info *sunxi_codec = codec->private_data;
666 struct sunxi_codec_param *codec_param = &sunxi_codec->param;
667 int i = 0;
668
669 snd_print("\n");
670 switch (params_format(params)) {
671 case SND_PCM_FORMAT_S16_LE:
672 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
673 snd_codec_update_bits(codec, SUNXI_DAC_FIFOC,
674 (3 << FIFO_MODE), (3 << FIFO_MODE));
675 snd_codec_update_bits(codec, SUNXI_DAC_FIFOC,
676 (1 << TX_SAMPLE_BITS), (0 << TX_SAMPLE_BITS));
677 } else {
678 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
679 (1 << RX_FIFO_MODE), (1 << RX_FIFO_MODE));
680 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
681 (1 << RX_SAMPLE_BITS), (0 << RX_SAMPLE_BITS));
682 }
683 break;
684 case SND_PCM_FORMAT_S24_LE:
685 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
686 snd_codec_update_bits(codec, SUNXI_DAC_FIFOC,
687 (3 << FIFO_MODE), (0 << FIFO_MODE));
688 snd_codec_update_bits(codec, SUNXI_DAC_FIFOC,
689 (1 << TX_SAMPLE_BITS), (1 << TX_SAMPLE_BITS));
690 } else {
691 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
692 (1 << RX_FIFO_MODE), (0 << RX_FIFO_MODE));
693 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
694 (1 << RX_SAMPLE_BITS), (1 << RX_SAMPLE_BITS));
695 }
696 break;
697 default:
698 break;
699 }
700
701 for (i = 0; i < ARRAY_SIZE(sample_rate_conv); i++) {
702 if (sample_rate_conv[i].samplerate == params_rate(params)) {
703 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
704 snd_codec_update_bits(codec, SUNXI_DAC_FIFOC,
705 (0x7 << DAC_FS),
706 (sample_rate_conv[i].rate_bit << DAC_FS));
707 } else {
708 if (sample_rate_conv[i].samplerate > 48000)
709 return -EINVAL;
710 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
711 (0x7 << ADC_FS),
712 (sample_rate_conv[i].rate_bit<<ADC_FS));
713 }
714 }
715 }
716
717 /* reset the adchpf func setting for different sampling */
718 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
719 if (codec_param->adchpf_cfg) {
720 if (params_rate(params) == 16000) {
721
722 snd_codec_write(codec, SUNXI_ADC_DRC_HHPFC,
723 (0x00F623A5 >> 16) & 0xFFFF);
724
725 snd_codec_write(codec, SUNXI_ADC_DRC_LHPFC,
726 0x00F623A5 & 0xFFFF);
727
728 } else if (params_rate(params) == 44100) {
729
730 snd_codec_write(codec, SUNXI_ADC_DRC_HHPFC,
731 (0x00FC60DB >> 16) & 0xFFFF);
732
733 snd_codec_write(codec, SUNXI_ADC_DRC_LHPFC,
734 0x00FC60DB & 0xFFFF);
735 } else {
736 snd_codec_write(codec, SUNXI_ADC_DRC_HHPFC,
737 (0x00FCABB3 >> 16) & 0xFFFF);
738
739 snd_codec_write(codec, SUNXI_ADC_DRC_LHPFC,
740 0x00FCABB3 & 0xFFFF);
741 }
742 }
743 }
744
745 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
746 switch (params_channels(params)) {
747 case 1:
748 snd_codec_update_bits(codec, SUNXI_DAC_FIFOC,
749 (1<<DAC_MONO_EN), 1<<DAC_MONO_EN);
750 break;
751 case 2:
752 snd_codec_update_bits(codec, SUNXI_DAC_FIFOC,
753 (1<<DAC_MONO_EN), (0<<DAC_MONO_EN));
754 break;
755 default:
756 snd_err("cannot support the channels:%u.\n",
757 params_channels(params));
758 return -EINVAL;
759 }
760 } else {
761 switch (params_channels(params)) {
762 case 1:
763 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
764 (0xf<<ADC_CHAN_SEL), (1<<ADC_CHAN_SEL));
765 break;
766 default:
767 snd_err("capture only support 1 channel\n");
768 return -EINVAL;
769 }
770 }
771
772 return 0;
773 }
774
sunxi_codec_set_sysclk(struct snd_dai * dai,int clk_id,unsigned int freq,int dir)775 static int sunxi_codec_set_sysclk(struct snd_dai *dai,
776 int clk_id, unsigned int freq, int dir)
777 {
778 struct snd_codec *codec = dai->component;
779 struct sunxi_codec_info *sunxi_codec = codec->private_data;
780
781 snd_print("\n");
782 if (hal_clk_set_rate(sunxi_codec->pllclk, freq)) {
783 snd_err("set pllclk rate %u failed\n", freq);
784 return -EINVAL;
785 }
786
787 return 0;
788 }
789
sunxi_codec_shutdown(struct snd_pcm_substream * substream,struct snd_dai * dai)790 static void sunxi_codec_shutdown(struct snd_pcm_substream *substream,
791 struct snd_dai *dai)
792 {
793 struct snd_codec *codec = dai->component;
794 struct sunxi_codec_info *sunxi_codec = codec->private_data;
795 struct sunxi_codec_param *param = &sunxi_codec->param;
796
797 snd_print("\n");
798 /*
799 * Playback:
800 * Playback --> DACL --> DACL_SINGLE --> LINEOUTL --> External Speaker
801 * Playback --> DACL --> DACL_DIFFER --> LINEOUTL --> External Speaker
802 *
803 * Capture:
804 * Capture <-- ADCL <-- Left Input Mixer <-- MIC1 PGA <-- MIC1 <-- MainMic Bias
805 * Capture <-- ADCL <-- Left Input Mixer <-- LINEINL PGA <-- LINEINL <-- MainMic Bias
806 *
807 */
808 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
809 if (param->gpio_spk > 0)
810 hal_gpio_set_data(param->gpio_spk, 0);
811
812 /* LINEOUT */
813 snd_codec_update_bits(codec, SUNXI_DAC_ANA_CTL,
814 (0x1<<LINEOUTL_EN), (0x0<<LINEOUTL_EN));
815
816 snd_codec_update_bits(codec, SUNXI_DAC_ANA_CTL,
817 (0x1<<DACLMUTE), (0x0<<DACLMUTE));
818
819 /* digital DAC enable */
820 snd_codec_update_bits(codec, SUNXI_DAC_DPC,
821 (0x1<<EN_DAC), (0x0<<EN_DAC));
822
823 /* analog DAC enable */
824 snd_codec_update_bits(codec, SUNXI_DAC_ANA_CTL,
825 (0x1<<DACLEN), (0x0<<DACLEN));
826 } else {
827 /* MainMic Bias */
828 snd_codec_update_bits(codec, SUNXI_MICBIAS_ANA_CTL,
829 (0x1<<MMICBIASEN), (0x0<MMICBIASEN));
830
831 /* MIC PGA */
832 snd_codec_update_bits(codec, SUNXI_ADCL_ANA_CTL,
833 (0x1<<MIC1AMPEN), (0x0<<MIC1AMPEN));
834
835 /* digital ADC enable */
836 snd_codec_update_bits(codec, SUNXI_ADCL_ANA_CTL,
837 (0x1<<EN_AD), (0x0<<EN_AD));
838
839 /* analog ADCL enable */
840 snd_codec_update_bits(codec, SUNXI_ADCL_ANA_CTL,
841 (0x1<<ADCLEN), (0x0<<ADCLEN));
842 }
843
844 return;
845 }
846
sunxi_codec_prepare(struct snd_pcm_substream * substream,struct snd_dai * dai)847 static int sunxi_codec_prepare(struct snd_pcm_substream *substream,
848 struct snd_dai *dai)
849 {
850 struct snd_codec *codec = dai->component;
851
852 snd_print("\n");
853
854 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
855 snd_codec_update_bits(codec, SUNXI_DAC_FIFOC,
856 (1 << FIFO_FLUSH), (1 << FIFO_FLUSH));
857 snd_codec_write(codec, SUNXI_DAC_FIFOS,
858 (1 << DAC_TXE_INT | 1 << DAC_TXU_INT | 1 << DAC_TXO_INT));
859 snd_codec_write(codec, SUNXI_DAC_CNT, 0);
860 } else {
861 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
862 (1 << ADC_FIFO_FLUSH), (1 << ADC_FIFO_FLUSH));
863 snd_codec_write(codec, SUNXI_ADC_FIFOS,
864 (1 << ADC_RXA_INT | 1 << ADC_RXO_INT));
865 snd_codec_write(codec, SUNXI_ADC_CNT, 0);
866 }
867
868 return 0;
869 }
870
sunxi_codec_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_dai * dai)871 static int sunxi_codec_trigger(struct snd_pcm_substream *substream,
872 int cmd, struct snd_dai *dai)
873 {
874 struct snd_codec *codec = dai->component;
875 struct sunxi_codec_info *sunxi_codec = codec->private_data;
876 unsigned int sync_mode = 0;
877 int adc_sync_flag = 0;
878 uint32_t __cpsr;
879
880 snd_print("\n");
881 switch (cmd) {
882 case SNDRV_PCM_TRIGGER_START:
883 case SNDRV_PCM_TRIGGER_RESUME:
884 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
885 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
886 snd_codec_update_bits(codec, SUNXI_DAC_FIFOC,
887 (1 << DAC_DRQ_EN), (1 << DAC_DRQ_EN));
888 }
889 else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
890 #ifndef SUNXI_ADC_DAUDIO_SYNC
891 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
892 (1 << ADC_DRQ_EN), (1 << ADC_DRQ_EN));
893 #else
894 __cpsr = hal_spin_lock_irqsave();
895 sync_mode = sunxi_codec_get_pcm_trigger_substream_mode();
896 if (sync_mode) {
897 adc_sync_flag = sunxi_codec_get_pcm_adc_sync_flag();
898 adc_sync_flag |= (0x1 << ADC_CODEC_SYNC);
899 if (adc_sync_flag & (0x1 << ADC_I2S_RUNNING)) {
900 sunxi_cpudai_adc_drq_enable(true);
901 } else if ((adc_sync_flag & (0x1 << ADC_CODEC_SYNC)) &&
902 (adc_sync_flag & (0x1 << ADC_I2S_SYNC))) {
903 adc_sync_flag |= (0x1 << ADC_I2S_RUNNING);
904 sunxi_cpudai_adc_drq_enable(true);
905 sunxi_daudio_rx_drq_enable(true);
906 }
907 sunxi_codec_set_pcm_adc_sync_flag(adc_sync_flag);
908 } else
909 sunxi_cpudai_adc_drq_enable(true);
910 hal_spin_unlock_irqrestore(__cpsr);
911 #endif
912 }
913 break;
914 case SNDRV_PCM_TRIGGER_STOP:
915 case SNDRV_PCM_TRIGGER_SUSPEND:
916 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
917 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
918 snd_codec_update_bits(codec, SUNXI_DAC_FIFOC,
919 (1 << DAC_DRQ_EN), (0 << DAC_DRQ_EN));
920 }
921 else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
922 #ifndef SUNXI_ADC_DAUDIO_SYNC
923 snd_codec_update_bits(codec, SUNXI_ADC_FIFOC,
924 (1 << ADC_DRQ_EN), (0 << ADC_DRQ_EN));
925 #else
926 __cpsr = hal_spin_lock_irqsave();
927 adc_sync_flag = sunxi_codec_get_pcm_adc_sync_flag();
928 adc_sync_flag &= ~(0x1 << ADC_CODEC_SYNC);
929 if (!((adc_sync_flag >> ADC_CODEC_SYNC) & 0x1) &&
930 (!((adc_sync_flag >> ADC_I2S_SYNC) & 0x1))) {
931 adc_sync_flag &= ~(0x1 << ADC_I2S_RUNNING);
932 }
933 sunxi_codec_set_pcm_adc_sync_flag(adc_sync_flag);
934 sunxi_cpudai_adc_drq_enable(false);
935 hal_spin_unlock_irqrestore(__cpsr);
936 #endif
937 }
938 break;
939 default:
940 return -EINVAL;
941 }
942
943 return 0;
944 }
945
946 static struct snd_dai_ops sun8iw19_codec_dai_ops = {
947 .startup = sunxi_codec_startup,
948 .hw_params = sunxi_codec_hw_params,
949 .shutdown = sunxi_codec_shutdown,
950 .set_sysclk = sunxi_codec_set_sysclk,
951 .trigger = sunxi_codec_trigger,
952 .prepare = sunxi_codec_prepare,
953 .dapm_control = sunxi_codec_dapm_control,
954 };
955
956 static struct snd_dai sun8iw19_codec_dai[] = {
957 {
958 .name = "sun8iw19codec",
959 .playback = {
960 .stream_name = "Playback",
961 .channels_min = 1,
962 .channels_max = 2,
963 .rates = SNDRV_PCM_RATE_8000_192000
964 | SNDRV_PCM_RATE_KNOT,
965 .formats = SNDRV_PCM_FMTBIT_S16_LE
966 | SNDRV_PCM_FMTBIT_S24_LE,
967 .rate_min = 8000,
968 .rate_max = 192000,
969 },
970 .capture = {
971 .stream_name = "Capture",
972 .channels_min = 1,
973 .channels_max = 1,
974 .rates = SNDRV_PCM_RATE_8000_48000
975 | SNDRV_PCM_RATE_KNOT,
976 .formats = SNDRV_PCM_FMTBIT_S16_LE
977 | SNDRV_PCM_FMTBIT_S24_LE,
978 .rate_min = 8000,
979 .rate_max = 48000,
980 },
981 .ops = &sun8iw19_codec_dai_ops,
982 },
983 };
984
sun8iw19_codec_probe(struct snd_codec * codec)985 static int sun8iw19_codec_probe(struct snd_codec *codec)
986 {
987 struct sunxi_codec_info *sunxi_codec = NULL;
988
989 if (!codec->codec_dai)
990 return -1;
991
992 sunxi_codec = snd_malloc(sizeof(struct sunxi_codec_info));
993 if (!sunxi_codec) {
994 snd_err("no memory\n");
995 return -ENOMEM;
996 }
997
998 codec->private_data = (void *)sunxi_codec;
999
1000 snd_print("codec para init\n");
1001 /* get codec para from board config? */
1002 sunxi_codec->param = default_param;
1003 codec->codec_base_addr = (void *)SUNXI_CODEC_BASE_ADDR;
1004 codec->codec_dai->component = codec;
1005
1006 sunxi_codec->pllclk = HAL_CLK_PLL_AUDIO;
1007 sunxi_codec->moduleclk = HAL_CLK_PERIPH_AUDIOCODEC_1X;
1008
1009 hal_clk_set_parent(sunxi_codec->moduleclk, sunxi_codec->pllclk);
1010 hal_clock_enable(sunxi_codec->pllclk);
1011 hal_clock_enable(sunxi_codec->moduleclk);
1012
1013 sunxi_codec_init(codec);
1014 #ifdef SUNXI_ADC_DAUDIO_SYNC
1015 adc_daudio_sync_codec = codec;
1016 #endif
1017
1018 return 0;
1019 }
1020
sun8iw19_codec_remove(struct snd_codec * codec)1021 static int sun8iw19_codec_remove(struct snd_codec *codec)
1022 {
1023 struct sunxi_codec_info *sunxi_codec = codec->private_data;
1024 struct sunxi_codec_param *param = &sunxi_codec->param;
1025
1026 if (param->adcdrc_cfg)
1027 adcdrc_enable(codec, 0);
1028 if (param->adchpf_cfg)
1029 adchpf_enable(codec, 0);
1030 if (param->dacdrc_cfg)
1031 dacdrc_enable(codec, 0);
1032 if (param->dachpf_cfg)
1033 dachpf_enable(codec, 0);
1034
1035 hal_clock_disable(sunxi_codec->moduleclk);
1036 hal_clock_disable(sunxi_codec->pllclk);
1037
1038 snd_free(sunxi_codec);
1039 codec->private_data = NULL;
1040
1041 return 0;
1042 }
1043
1044 struct snd_codec sunxi_audiocodec = {
1045 .name = "audiocodec",
1046 .codec_dai = sun8iw19_codec_dai,
1047 .codec_dai_num = ARRAY_SIZE(sun8iw19_codec_dai),
1048 .private_data = NULL,
1049 .probe = sun8iw19_codec_probe,
1050 .remove = sun8iw19_codec_remove,
1051 .controls = sunxi_codec_controls,
1052 .num_controls = ARRAY_SIZE(sunxi_codec_controls),
1053 };
1054
1055