1 #ifndef _BFLB_IR_H
2 #define _BFLB_IR_H
3 
4 #include "bflb_core.h"
5 
6 /** @addtogroup LHAL
7   * @{
8   */
9 
10 /** @addtogroup IR
11   * @{
12   */
13 
14 #if !defined(BL616)
15 /** @defgroup IR_TX_MODE ir tx mode definition
16   * @{
17   */
18 #define IR_TX_NEC       0
19 #define IR_TX_RC5       1
20 #define IR_TX_SWM       2
21 #define IR_TX_CUSTOMIZE 3
22 /**
23   * @}
24   */
25 
26 /** @defgroup IR_TX_FIFO_WIDTH ir tx fifo width valid width definition
27   * @{
28   */
29 #if !defined(BL602) && !defined(BL702)
30 #define IR_TX_FIFO_WIDTH_8BIT  0
31 #define IR_TX_FIFO_WIDTH_16BIT 1
32 #define IR_TX_FIFO_WIDTH_24BIT 2
33 #endif
34 #define IR_TX_FIFO_WIDTH_32BIT 3
35 /**
36   * @}
37   */
38 
39 /** @defgroup IR_TX_INTEN ir tx interrupt enable definition
40   * @{
41   */
42 #define IR_TX_INTEN_END (1 << 0)
43 #if !defined(BL602) && !defined(BL702)
44 #define IR_TX_INTEN_FIFO (1 << 1)
45 #define IR_TX_INTEN_FER  (1 << 2)
46 #endif
47 /**
48   * @}
49   */
50 
51 /** @defgroup IR_TX_INTSTS ir tx interrupt status definition
52   * @{
53   */
54 #define IR_TX_INTSTS_END (1 << 0)
55 #if !defined(BL602) && !defined(BL702)
56 #define IR_TX_INTSTS_FIFO (1 << 1)
57 #define IR_TX_INTSTS_FER  (1 << 2)
58 #endif
59 /**
60   * @}
61   */
62 
63 #endif
64 
65 #if !defined(BL702L)
66 /** @defgroup IR_RX_MODE ir rx mode definition
67   * @{
68   */
69 #define IR_RX_NEC 0
70 #define IR_RX_RC5 1
71 #define IR_RX_SWM 2
72 /**
73   * @}
74   */
75 
76 /** @defgroup IR_RX_INTEN ir rx interrupt enable definition
77   * @{
78   */
79 #define IR_RX_INTEN_END (1 << 0)
80 #if !defined(BL602) && !defined(BL702)
81 #define IR_RX_INTEN_FIFO (1 << 1)
82 #define IR_RX_INTEN_FER  (1 << 2)
83 #endif
84 /**
85   * @}
86   */
87 
88 /** @defgroup IR_RX_INTSTS ir rx interrupt status definition
89   * @{
90   */
91 #define IR_RX_INTSTS_END (1 << 0)
92 #if !defined(BL602) && !defined(BL702)
93 #define IR_RX_INTSTS_FIFO (1 << 1)
94 #define IR_RX_INTSTS_FER  (1 << 2)
95 #endif
96 /**
97   * @}
98   */
99 #endif
100 
101 #if !defined(BL616)
102 /**
103  * @brief IR TX configuration structure
104  *
105  * @param tx_mode              TX mode select, use @ref IR_TX_MODE
106  * @param data_bits            Bit count of data phase (don't care if tx freerun mode is enabled)
107  * @param tail_inverse         Enable or disable signal of tail pulse inverse (don't care if SWM is enabled)
108  * @param tail_enable          Enable or disable signal of tail pulse (don't care if SWM is enabled)
109  * @param head_inverse         Enable or disable signal of head pulse inverse (don't care if SWM is enabled)
110  * @param head_enable          Enable or disable signal of head pulse (don't care if SWM is enabled)
111  * @param logic1_inverse       Enable or disable signal of logic 1 pulse inverse (don't care if SWM is enabled)
112  * @param logic0_inverse       Enable or disable signal of logic 0 pulse inverse (don't care if SWM is enabled)
113  * @param data_enable          Enable or disable signal of data pulse (don't care if SWM is enabled)
114  * @param swm_enable           Enable or disable software mode(SWM)
115  * @param output_modulation    Enable or disable signal of output modulation
116  * @param output_inverse       Enable or disable signal of output inverse,0:output stays at low during idle state,1:stay at high
117  * @param freerun_enable       Enable or disable tx freerun mode (don't care if SWM is enabled)
118  * @param continue_enable      Disable:idle time between frames = (tailPulseWidth_0+tailPulseWidth_1)*pulseWidthUnit,Enable:no idle time between frames
119  * @param fifo_width           IR frame size(also the valid width for each fifo entry), use @ref IR_TX_FIFO_WIDTH
120  * @param fifo_threshold       TX FIFO threshold
121  * @param logic0_pulse_width_1 Pulse width of logic 0 pulse phase 1 (don't care if SWM is enabled)
122  * @param logic0_pulse_width_0 Pulse width of logic 0 pulse phase 0 (don't care if SWM is enabled)
123  * @param logic1_pulse_width_1 Pulse width of logic 1 pulse phase 1 (don't care if SWM is enabled)
124  * @param logic1_pulse_width_0 Pulse width of logic 1 pulse phase 0 (don't care if SWM is enabled)
125  * @param head_pulse_width_1   Pulse width of head pulse phase 1 (don't care if SWM is enabled)
126  * @param head_pulse_width_0   Pulse width of head pulse phase 0 (don't care if SWM is enabled)
127  * @param tail_pulse_width_1   Pulse width of tail pulse phase 1 (don't care if SWM is enabled)
128  * @param tail_pulse_width_0   Pulse width of tail pulse phase 0 (don't care if SWM is enabled)
129  * @param modu_width_1         Modulation phase 1 width
130  * @param modu_width_0         Modulation phase 0 width
131  * @param pulse_width_unit     Pulse width unit
132  */
133 struct bflb_ir_tx_config_s {
134     uint8_t tx_mode;
135     uint8_t data_bits;
136     uint8_t tail_inverse;
137     uint8_t tail_enable;
138     uint8_t head_inverse;
139     uint8_t head_enable;
140     uint8_t logic1_inverse;
141     uint8_t logic0_inverse;
142     uint8_t data_enable;
143     uint8_t swm_enable;
144     uint8_t output_modulation;
145     uint8_t output_inverse;
146     uint8_t freerun_enable;
147     uint8_t continue_enable;
148     uint8_t fifo_width;
149     uint8_t fifo_threshold;
150     uint8_t logic0_pulse_width_1;
151     uint8_t logic0_pulse_width_0;
152     uint8_t logic1_pulse_width_1;
153     uint8_t logic1_pulse_width_0;
154     uint8_t head_pulse_width_1;
155     uint8_t head_pulse_width_0;
156     uint8_t tail_pulse_width_1;
157     uint8_t tail_pulse_width_0;
158     uint8_t modu_width_1;
159     uint8_t modu_width_0;
160     uint16_t pulse_width_unit;
161 };
162 #endif
163 
164 #if !defined(BL702L)
165 /**
166  * @brief IR RX configuration structure
167  *
168  * @param rx_mode         RX mode select, use @ref IR_RX_MODE
169  * @param input_inverse   Enable or disable signal of input inverse
170  * @param deglitch_enable Enable or disable signal of rx input de-glitch function
171  * @param deglitch_cnt    De-glitch function cycle count
172  * @param  data_threshold Pulse width threshold for logic 0/1 detection (don't care if SWM is enabled)
173  * @param  end_threshold  Pulse width threshold to trigger end condition
174  * @param  fifo_threshold RX FIFO threshold
175  */
176 struct bflb_ir_rx_config_s {
177     uint8_t rx_mode;
178     uint8_t input_inverse;
179     uint8_t deglitch_enable;
180     uint8_t deglitch_cnt;
181     uint16_t data_threshold;
182     uint16_t end_threshold;
183     uint16_t fifo_threshold;
184 };
185 #endif
186 
187 #ifdef __cplusplus
188 extern "C" {
189 #endif
190 
191 #if !defined(BL616)
192 /**
193  * @brief Initialize ir tx.
194  *
195  * @param [in] dev device handle
196  * @param [in] config pointer to ir tx configure structure
197  */
198 void bflb_ir_tx_init(struct bflb_device_s *dev, const struct bflb_ir_tx_config_s *config);
199 
200 /**
201  * @brief Send data in NEC/RC5/customize mode.
202  *
203  * @param [in] dev device handle
204  * @param [in] data data buffer to send
205  * @param [in] length length of data buffer
206  */
207 void bflb_ir_send(struct bflb_device_s *dev, uint32_t *data, uint32_t length);
208 
209 /**
210  * @brief Send data in software mode.
211  *
212  * @param [in] dev device handle
213  * @param [in] data data data buffer to send
214  * @param [in] length length of data buffer
215  */
216 void bflb_ir_swm_send(struct bflb_device_s *dev, uint16_t *data, uint8_t length);
217 
218 /**
219  * @brief Enable or disable ir tx.
220  *
221  * @param [in] dev device handle
222  * @param [in] enable enable or disable
223  */
224 void bflb_ir_tx_enable(struct bflb_device_s *dev, bool enable);
225 
226 /**
227  * @brief Mask or unmask ir tx interrupt.
228  *
229  * @param [in] dev device handle
230  * @param [in] int_type ir tx interrupt type, use @ref IR_TX_INTEN
231  * @param [in] mask mask or unmask
232  */
233 void bflb_ir_txint_mask(struct bflb_device_s *dev, uint8_t int_type, bool mask);
234 
235 /**
236  * @brief Get ir tx interrupt status.
237  *
238  * @param [in] dev device handle
239  * @return Ir tx interrupt status
240  */
241 uint32_t bflb_ir_get_txint_status(struct bflb_device_s *dev);
242 
243 /**
244  * @brief Clear ir tx interrupt.
245  *
246  * @param [in] dev device handle
247  */
248 void bflb_ir_txint_clear(struct bflb_device_s *dev);
249 
250 #if !defined(BL602) && !defined(BL702)
251 /**
252  * @brief Enable or disable ir tx dma mode.
253  *
254  * @param [in] dev device handle
255  * @param [in] enable enable or disable
256  */
257 void bflb_ir_link_txdma(struct bflb_device_s *dev, bool enable);
258 
259 /**
260  * @brief Get ir tx fifo available count.
261  *
262  * @param [in] dev device handle
263  * @return Ir tx fifo available count
264  */
265 uint8_t bflb_ir_get_txfifo_cnt(struct bflb_device_s *dev);
266 
267 /**
268  * @brief Clear ir tx fifo.
269  *
270  * @param [in] dev device handle
271  */
272 void bflb_ir_txfifo_clear(struct bflb_device_s *dev);
273 #endif
274 #endif
275 
276 #if !defined(BL702L)
277 /**
278  * @brief Initialize ir rx.
279  *
280  * @param [in] dev device handle
281  * @param [in] config config pointer to ir rx configure structure
282  */
283 void bflb_ir_rx_init(struct bflb_device_s *dev, const struct bflb_ir_rx_config_s *config);
284 
285 /**
286  * @brief Receive data in NEC/RC5/customize mode.
287  *
288  * @param [in] dev device handle
289  * @param [out] data data received
290  * @return Bit count of data received
291  */
292 uint8_t bflb_ir_receive(struct bflb_device_s *dev, uint64_t *data);
293 
294 /**
295  * @brief Receive data in software mode.
296  *
297  * @param [in] dev device handle
298  * @param [out] data data buffer to receive
299  * @param [in] length of data buffer
300  * @return Length of data received
301  */
302 uint8_t bflb_ir_swm_receive(struct bflb_device_s *dev, uint16_t *data, uint8_t length);
303 
304 /**
305  * @brief Enable or disable ir rx.
306  *
307  * @param [in] dev device handle
308  * @param [in] enable enable or disable
309  */
310 void bflb_ir_rx_enable(struct bflb_device_s *dev, bool enable);
311 
312 /**
313  * @brief Get ir rx fifo available count.
314  *
315  * @param [in] dev device handle
316  * @return Ir rx fifo available count
317  */
318 uint8_t bflb_ir_get_rxfifo_cnt(struct bflb_device_s *dev);
319 
320 /**
321  * @brief Clear ir rx fifo.
322  *
323  * @param [in] dev device handle
324  */
325 void bflb_ir_rxfifo_clear(struct bflb_device_s *dev);
326 
327 /**
328  * @brief Mask ir rx interrupt.
329  *
330  * @param [in] dev device handle
331  * @param [in] int_type ir rx interrupt type, use @ref IR_RX_INTEN
332  * @param [in] mask mask or unmask
333  */
334 void bflb_ir_rxint_mask(struct bflb_device_s *dev, uint8_t int_type, bool mask);
335 
336 /**
337  * @brief Get ir rx interrupt status.
338  *
339  * @param [in] dev device handle
340  * @return Ir rx interrupt status
341  */
342 uint32_t bflb_ir_get_rxint_status(struct bflb_device_s *dev);
343 
344 /**
345  * @brief Clear ir rx interrupt.
346  *
347  * @param [in] dev device handle
348  */
349 void bflb_ir_rxint_clear(struct bflb_device_s *dev);
350 
351 #endif
352 
353 /**
354  * @brief Control ir feature.
355  *
356  * @param [in] dev device handle
357  * @param [in] cmd feature command
358  * @param [in] arg user data
359  * @return A negated errno value on failure
360  */
361 int bflb_ir_feature_control(struct bflb_device_s *dev, int cmd, size_t arg);
362 
363 #ifdef __cplusplus
364 }
365 #endif
366 
367 /**
368   * @}
369   */
370 
371 /**
372   * @}
373   */
374 
375 #endif
376