Home
last modified time | relevance | path

Searched defs:val (Results 1 – 25 of 701) sorted by relevance

12345678910>>...29

/bsp/nuvoton/libraries/nu_packages/NuUtils/inc/
A Dnu_bitutil.h105 uint16_t val; in nu_get16_le() local
114 __STATIC_INLINE void nu_set16_le(uint8_t *pos, uint16_t val) in nu_set16_le()
123 uint32_t val; in nu_get32_le() local
136 uint32_t val; in nu_get24_le() local
146 __STATIC_INLINE void nu_set24_le(uint8_t *pos, uint32_t val) in nu_set24_le()
154 __STATIC_INLINE void nu_set32_le(uint8_t *pos, uint32_t val) in nu_set32_le()
165 uint16_t val; in nu_get16_be() local
175 __STATIC_INLINE void nu_set16_be(uint8_t *pos, uint16_t val) in nu_set16_be()
184 uint32_t val; in nu_get24_be() local
196 __STATIC_INLINE void nu_set24_be(uint8_t *pos, uint32_t val) in nu_set24_be()
[all …]
/bsp/core-v-mcu/Libraries/core_v_hal_libraries/core_v_hal/include/
A Dhal_soc_ctrl_periph.h65 #define SOC_CTRL_INFO_NB_CL(val) (((uint32_t)(((uint32_t)(val))… argument
70 #define SOC_CTRL_INFO_NB_CORES(val) (((uint32_t)(((uint32_t)(val))… argument
79 #define SOC_CTRL_CL_ISOLATE_EN(val) (((uint32_t)(((uint32_t)(val))… argument
86 #define SOC_CTRL_CL_BUSY_BUSY(val) (((uint32_t)(((uint32_t)(val))… argument
95 #define SOC_CTRL_CL_BYPASS_BYP_POW(val) (((uint32_t)(((uint32_t)(val))… argument
102 #define SOC_CTRL_CL_BYPASS_BYP_CFG(val) (((uint32_t)(((uint32_t)(val))… argument
135 #define SOC_CTRL_CL_BYPASS_CG(val) (((uint32_t)(((uint32_t)(val))… argument
136 #define READ_SOC_CTRL_CL_BYPASS_CG(val) (((uint32_t)(((uint32_t)(val))… argument
157 #define SOC_CTRL_CL_BYPASS_RST(val) (((uint32_t)(((uint32_t)(val))… argument
167 #define SOC_CTRL_CL_BYPASS_PWISO(val) (((uint32_t)(((uint32_t)(val))… argument
[all …]
A Dhal_udma_core_periph.h55 #define UDMA_CORE_RX_SADDR_RX_SADDR(val) (((uint32_t)(((uint32_t)(val))… argument
69 #define UDMA_CORE_RX_SIZE_RX_SIZE(val) (((uint32_t)(((uint32_t)(val))… argument
84 #define UDMA_CORE_RX_CFG_CONTINOUS(val) (((uint32_t)(((uint32_t)(val))… argument
93 #define UDMA_CORE_RX_CFG_DATASIZE(val) (((uint32_t)(((uint32_t)(val))… argument
106 #define UDMA_CORE_RX_CFG_EN(val) (((uint32_t)(((uint32_t)(val))… argument
113 #define UDMA_CORE_RX_CFG_PENDING(val) (((uint32_t)(((uint32_t)(val))… argument
120 #define UDMA_CORE_RX_CFG_CLR(val) (((uint32_t)(((uint32_t)(val))… argument
155 #define UDMA_CORE_TX_SIZE_TX_SIZE(val) (((uint32_t)(((uint32_t)(val))… argument
192 #define UDMA_CORE_TX_CFG_EN(val) (((uint32_t)(((uint32_t)(val))… argument
199 #define UDMA_CORE_TX_CFG_PENDING(val) (((uint32_t)(((uint32_t)(val))… argument
[all …]
A Dhal_pwm_periph.h44 #define PWM_CMD_START(val) (((uint32_t)(((uint32_t)(val))… argument
49 #define PWM_CMD_STOP(val) (((uint32_t)(((uint32_t)(val))… argument
54 #define PWM_CMD_UPDATE(val) (((uint32_t)(((uint32_t)(val))… argument
59 #define PWM_CMD_RESET(val) (((uint32_t)(((uint32_t)(val))… argument
64 #define PWM_CMD_ARM(val) (((uint32_t)(((uint32_t)(val))… argument
76 #define PWM_CONFIG_INSEL(val) (((uint32_t)(((uint32_t)(val))… argument
89 #define PWM_CONFIG_MODE(val) (((uint32_t)(((uint32_t)(val))… argument
96 #define PWM_CONFIG_CLKSEL(val) (((uint32_t)(((uint32_t)(val))… argument
108 #define PWM_CONFIG_PRESC(val) (((uint32_t)(((uint32_t)(val))… argument
115 #define PWM_THRESHOLD_TH_LO(val) (((uint32_t)(((uint32_t)(val))… argument
[all …]
A Dhal_uart_periph.h45 #define UART_STATUS_TX_BUSY(val) (((uint32_t)(((uint32_t)(val))… argument
50 #define UART_STATUS_RX_BUSY(val) (((uint32_t)(((uint32_t)(val))… argument
55 #define UART_STATUS_RX_PE(val) (((uint32_t)(((uint32_t)(val))… argument
64 #define UART_SETUP_PARITY_ENA(val) (((uint32_t)(((uint32_t)(val))… argument
73 #define UART_SETUP_BIT_LENGTH(val) (((uint32_t)(((uint32_t)(val))… argument
80 #define UART_SETUP_STOP_BITS(val) (((uint32_t)(((uint32_t)(val))… argument
87 #define UART_SETUP_TX_ENA(val) (((uint32_t)(((uint32_t)(val))… argument
94 #define UART_SETUP_RX_ENA(val) (((uint32_t)(((uint32_t)(val))… argument
99 #define UART_SETUP_CLKDIV(val) (((uint32_t)(((uint32_t)(val))… argument
A Dhal_gpio_periph.h52 #define GPIO_PADDIR_DIR(val) (((uint32_t)(((uint32_t)(val))… argument
63 #define GPIO_GPIOEN_GPIOEN(val) (((uint32_t)(((uint32_t)(val))… argument
70 #define GPIO_PADIN_DATA_IN(val) (((uint32_t)(((uint32_t)(val))… argument
77 #define GPIO_PADOUT_DATA_OUT(val) (((uint32_t)(((uint32_t)(val))… argument
84 #define GPIO_PADOUTSET_DATA_OUT(val) (((uint32_t)(((uint32_t)(va… argument
91 #define GPIO_PADOUTCLR_DATA_OUT(val) (((uint32_t)(((uint32_t)(va… argument
100 #define GPIO_INTEN_INTEN(val) (((uint32_t)(((uint32_t)(val))… argument
111 #define GPIO_INTTYPE_INTTYPE(val) (((uint32_t)(((uint32_t)(val))… argument
118 #define GPIO_INTSTATUS_INTSTATUS(val) (((uint32_t)(((uint32_t)(val))… argument
127 #define GPIO_PADCFG_GPIO_PE(val) (((uint32_t)(((uint32_t)(val))… argument
[all …]
A Dhal_pwm_ctrl_periph.h58 #define PWM_CTRL_EVENT_CFG_SEL0(val) (((uint32_t)(((uint32_t)(val))… argument
79 #define PWM_CTRL_EVENT_CFG_SEL1(val) (((uint32_t)(((uint32_t)(val))… argument
100 #define PWM_CTRL_EVENT_CFG_SEL2(val) (((uint32_t)(((uint32_t)(val))… argument
121 #define PWM_CTRL_EVENT_CFG_SEL3(val) (((uint32_t)(((uint32_t)(val))… argument
126 #define PWM_CTRL_EVENT_CFG_ENA(val) (((uint32_t)(((uint32_t)(val))… argument
135 #define PWM_CTRL_CG_ENA(val) (((uint32_t)(((uint32_t)(val))… argument
/bsp/core-v-mcu/Libraries/core_v_hal_libraries/bmsis/core-v-mcu/include/
A Dpulp_io.h29 static inline void writeb(uint8_t val, uintptr_t addr) in writeb()
36 static inline void writeh(uint16_t val, uintptr_t addr) in writeh()
43 static inline void writew(uint32_t val, uintptr_t addr) in writew()
50 static inline void writed(uint64_t val, uintptr_t addr) in writed()
60 uint8_t val; in readb() local
70 uint16_t val; in readh() local
80 uint32_t val; in readw() local
90 uint64_t val; in readd() local
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl602/std/include/
A Dbl602_sdu.h131 #define BL_READ_REGS8(reg, val) ((val) = BL_REGS8(reg)) argument
132 #define BL_READ_REGS16(reg, val) ((val) = BL_REGS16(reg)) argument
133 #define BL_READ_REGS32(reg, val) ((val) = BL_REGS32(reg)) argument
134 #define BL_READ_BYTE(reg, val) ((val) = BL_REGS8(reg)) argument
138 #define BL_WRITE_REGS8(reg, val) (BL_REGS8(reg) = (val)) argument
139 #define BL_WRITE_REGS16(reg, val) (BL_REGS16(reg) = (val)) argument
140 #define BL_WRITE_REGS32(reg, val) (BL_REGS32(reg) = (val)) argument
141 #define BL_WRITE_BYTE(reg, val) (BL_REGS8(reg) = (val)) argument
149 #define BL_REGS8_SETBITS(reg, val) (BL_REGS8(reg) |= (uint8)(val)) argument
150 #define BL_REGS16_SETBITS(reg, val) (BL_REGS16(reg) |= (uint16)(val)) argument
[all …]
A Dbl602_common.h11 #define BL_WR_WORD(addr, val) ((*(volatile uint32_t *)(uintptr_t)(addr)) = (val)) argument
13 #define BL_WR_SHORT(addr, val) ((*(volatile uint16_t *)(uintptr_t)(addr)) = (val)) argument
15 #define BL_WR_BYTE(addr, val) ((*(volatile uint8_t *)(uintptr_t)(addr)) = (val)) argument
18 #define BL_WRWD_TO_BYTEP(p, val) \ argument
29 #define BL_WR_REG16(addr, regname, val) BL_WR_SHORT(addr + regname##_OFFSET, val) argument
31 #define BL_WR_REG(addr, regname, val) BL_WR_WORD(addr + regname##_OFFSET, val) argument
32 #define BL_SET_REG_BIT(val, bitname) ((val) | (1U << bitname##_POS)) argument
33 #define BL_CLR_REG_BIT(val, bitname) ((val)&bitname##_UMSK) argument
34 #define BL_GET_REG_BITS_VAL(val, bitname) (((val)&bitname##_MSK) >> bitname##_POS) argument
35 #define BL_SET_REG_BITS_VAL(val, bitname, bitval) (((val)&bitname##_UMSK) | ((uint32_t)(bitval) << … argument
[all …]
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl616/std/include/
A Dbl616_sdu.h138 #define BL_READ_REGS8(reg,val) ((val) = BL_REGS8(reg)) argument
139 #define BL_READ_REGS16(reg,val) ((val) = BL_REGS16(reg)) argument
140 #define BL_READ_REGS32(reg,val) ((val) = BL_REGS32(reg)) argument
141 #define BL_READ_BYTE(reg,val) ((val) = BL_REGS8(reg)) argument
145 #define BL_WRITE_REGS8(reg,val) (BL_REGS8(reg) = (val)) argument
146 #define BL_WRITE_REGS16(reg,val) (BL_REGS16(reg) = (val)) argument
147 #define BL_WRITE_REGS32(reg,val) (BL_REGS32(reg) = (val)) argument
148 #define BL_WRITE_BYTE(reg,val) (BL_REGS8(reg) = (val)) argument
156 #define BL_REGS8_SETBITS(reg, val) (BL_REGS8(reg) |= (uint8)(val)) argument
157 #define BL_REGS16_SETBITS(reg, val) (BL_REGS16(reg) |= (uint16)(val)) argument
[all …]
A Dbl616_common.h19 #define BL_WR_WORD(addr, val) ((*(volatile uint32_t *)(uintptr_t)(addr)) = (val)) argument
21 #define BL_WR_SHORT(addr, val) ((*(volatile uint16_t *)(uintptr_t)(addr)) = (val)) argument
23 #define BL_WR_BYTE(addr, val) ((*(volatile uint8_t *)(uintptr_t)(addr)) = (val)) argument
26 #define BL_WRWD_TO_BYTEP(p, val) \ argument
37 #define BL_WR_REG16(addr, regname, val) BL_WR_SHORT(addr + regname##_OFFSET, val) argument
39 #define BL_WR_REG(addr, regname, val) BL_WR_WORD(addr + regname##_OFFSET, val) argument
40 #define BL_SET_REG_BIT(val, bitname) ((val) | (1U << bitname##_POS)) argument
41 #define BL_CLR_REG_BIT(val, bitname) ((val)&bitname##_UMSK) argument
42 #define BL_GET_REG_BITS_VAL(val, bitname) (((val)&bitname##_MSK) >> bitname##_POS) argument
43 #define BL_SET_REG_BITS_VAL(val, bitname, bitval) (((val)&bitname##_UMSK) | ((uint32_t)(bitval) << … argument
[all …]
/bsp/allwinner/libraries/sunxi-hal/hal/source/timer/
A Dsunxi_timer.h48 #define TIMER_IRQ_EN(val) BIT(val) argument
50 #define TIMER_IRQ_CLEAR(val) BIT(val) argument
51 #define TIMER_CTL_REG(val) (SUNXI_TMR_PBASE + 0x10 * val + 0x10) argument
54 #define TIMER_CTL_CLK_SRC(val) (((val) & 0x3) << 2) argument
56 #define TIMER_CTL_CLK_PRES(val) (((val) & 0x7) << 4) argument
58 #define TIMER_INTVAL_REG(val) (SUNXI_TMR_PBASE + 0x10 * (val) + 0x14) argument
59 #define TIMER_CNTVAL_REG(val) (SUNXI_TMR_PBASE + 0x10 * (val) + 0x18) argument
A Dsunxi_htimer.h62 #define HTIMER_IRQ_EN(val) BIT(val) argument
64 #define HTIMER_CTL_REG(val) (SUNXI_HSTIMER_PBASE + (0x20 * val + 0x20)) argument
67 #define HTIMER_CTL_CLK_PRES(val) (((val) & 0x7) << 4) argument
69 #define HTIMER_INTVAL_LO_REG(val) (SUNXI_HSTIMER_PBASE + (0x20 * (val) + 0x24)) argument
70 #define HTIMER_INTVAL_HI_REG(val) (SUNXI_HSTIMER_PBASE + (0x20 * (val) + 0x28)) argument
71 #define HTIMER_CNTVAL_LO_REG(val) (SUNXI_HSTIMER_PBASE + (0x20 * (val) + 0x2c)) argument
72 #define HTIMER_CNTVAL_HI_REG(val) (SUNXI_HSTIMER_PBASE + (0x20 * (val) + 0x30)) argument
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/
A Dbl808_common.h23 #define BL_WR_WORD(addr, val) ((*(volatile uint32_t *)(uintptr_t)(addr)) = (val)) argument
25 #define BL_WR_SHORT(addr, val) ((*(volatile uint16_t *)(uintptr_t)(addr)) = (val)) argument
27 #define BL_WR_BYTE(addr, val) ((*(volatile uint8_t *)(uintptr_t)(addr)) = (val)) argument
30 #define BL_WRWD_TO_BYTEP(p, val) \ argument
41 #define BL_WR_REG16(addr, regname, val) BL_WR_SHORT(addr + regname##_OFFSET, val) argument
43 #define BL_WR_REG(addr, regname, val) BL_WR_WORD(addr + regname##_OFFSET, val) argument
44 #define BL_SET_REG_BIT(val, bitname) ((val) | (1U << bitname##_POS)) argument
45 #define BL_CLR_REG_BIT(val, bitname) ((val)&bitname##_UMSK) argument
46 #define BL_GET_REG_BITS_VAL(val, bitname) (((val)&bitname##_MSK) >> bitname##_POS) argument
47 #define BL_SET_REG_BITS_VAL(val, bitname, bitval) (((val)&bitname##_UMSK) | ((uint32_t)(bitval) << … argument
[all …]
/bsp/xuantie/libraries/xuantie_libraries/csi/csi2/include/drv/
A Dio.h43 #define HAL_FMK(PER_REG_FIELD, val) \ argument
51 #define HAL_FINS(reg, PER_REG_FIELD, val) \ argument
73 #define HAL_BIT_INSR(reg, bit, val) \ argument
82 static inline void putreg8(uint8_t val, volatile void *addr) in putreg8()
92 static inline void putreg16(uint16_t val, volatile void *addr) in putreg16()
102 static inline void putreg32(uint32_t val, volatile void *addr) in putreg32()
112 static inline void putreg64(uint32_t val, volatile void *addr) in putreg64()
122 static inline void outl(uint32_t val, void *addr) in outl()
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_ble_driver/inc/
A Dco_math.h62 #define CO_ALIGN4_HI(val) (((val)+3)&~3) argument
72 #define CO_ALIGN4_LO(val) ((val)&~3) argument
81 #define CO_ALIGN2_HI(val) (((val)+1)&~1) argument
91 #define CO_ALIGN2_LO(val) ((val)&~1) argument
105 __INLINE uint32_t co_clz(uint32_t val) in co_clz()
198 __INLINE int co_abs(int val) in co_abs()
/bsp/allwinner/libraries/sunxi-hal/hal/source/tpadc/
A Dhal_tpadc.c49 static void sunxi_set_acqiure_time(unsigned long reg_base, uint32_t val) in sunxi_set_acqiure_time()
59 static void sunxi_set_frequency_divider(unsigned long reg_base, uint32_t val) in sunxi_set_frequency_divider()
69 static void sunxi_set_clk_divider(unsigned long reg_base, uint32_t val) in sunxi_set_clk_divider()
79 static void sunxi_select_delay_mode(unsigned long reg_base, uint32_t val) in sunxi_select_delay_mode()
89 static void sunxi_set_dealy_time(unsigned long reg_base, uint32_t val) in sunxi_set_dealy_time()
136 static void sunxi_tpadc_mode_select(unsigned long reg_base, uint32_t val) in sunxi_tpadc_mode_select()
147 static void sunxi_tpadc_enable(unsigned long reg_base, uint32_t val) in sunxi_tpadc_enable()
157 static void sunxi_set_up_debou_time(unsigned long reg_base, uint32_t val) in sunxi_set_up_debou_time()
198 static void sunxi_set_sensitivity(unsigned long reg_base, uint32_t val) in sunxi_set_sensitivity()
208 static void sunxi_set_filter_type(unsigned long reg_base, uint32_t val) in sunxi_set_filter_type()
[all …]
/bsp/raspberry-pi/raspi3-32/cpu/
A Dcp15.h103 rt_uint32_t val,val1; in read_cntvct() local
111 rt_uint64_t val; in read_cntvoff() local
118 rt_uint32_t val; in read_cntv_tval() local
124 static inline void write_cntv_tval(rt_uint32_t val) in write_cntv_tval()
132 rt_uint32_t val; in read_cntfrq() local
140 rt_uint32_t val; in read_cntctrl() local
145 static inline rt_uint32_t write_cntctrl(rt_uint32_t val) in write_cntctrl()
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl702/std/include/
A Dbl702_common.h11 #define BL_WR_WORD(addr, val) ((*(volatile uint32_t *)(uintptr_t)(addr)) = (val)) argument
13 #define BL_WR_SHORT(addr, val) ((*(volatile uint16_t *)(uintptr_t)(addr)) = (val)) argument
15 #define BL_WR_BYTE(addr, val) ((*(volatile uint8_t *)(uintptr_t)(addr)) = (val)) argument
18 #define BL_WRWD_TO_BYTEP(p, val) \ argument
29 #define BL_WR_REG16(addr, regname, val) BL_WR_SHORT(addr + regname##_OFFSET, val) argument
31 #define BL_WR_REG(addr, regname, val) BL_WR_WORD(addr + regname##_OFFSET, val) argument
32 #define BL_SET_REG_BIT(val, bitname) ((val) | (1U << bitname##_POS)) argument
33 #define BL_CLR_REG_BIT(val, bitname) ((val)&bitname##_UMSK) argument
34 #define BL_GET_REG_BITS_VAL(val, bitname) (((val)&bitname##_MSK) >> bitname##_POS) argument
35 #define BL_SET_REG_BITS_VAL(val, bitname, bitval) (((val)&bitname##_UMSK) | ((uint32_t)(bitval) << … argument
[all …]
/bsp/xuantie/libraries/xuantie_libraries/csi/csi2/include/core/
A Dcsi_rv_common.h82 #define rv_csr_write(csr, val) \ argument
91 #define rv_csr_read_set(csr, val) \ argument
100 #define rv_csr_set(csr, val) \ argument
108 #define rv_csr_read_clear(csr, val) \ argument
117 #define rv_csr_clear(csr, val) \ argument
/bsp/k230/drivers/interdrv/pinctl/
A Ddrv_pinctrl.c66 rt_uint32_t val = _read32(pin); in k230_pinctrl_set_function() local
78 rt_uint32_t val = _read32(pin); in k230_pinctrl_set_ie() local
91 rt_uint32_t val = _read32(pin); in k230_pinctrl_set_oe() local
104 rt_uint32_t val = _read32(pin); in k230_pinctrl_set_pu() local
117 rt_uint32_t val = _read32(pin); in k230_pinctrl_set_pd() local
137 rt_uint32_t val = _read32(pin); in k230_pinctrl_set_st() local
/bsp/allwinner/libraries/sunxi-hal/hal/source/sound/component/aw-alsa-lib/
A Dpcm.c346 int snd_pcm_hw_params_set_channels(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, unsigned int val) in snd_pcm_hw_params_set_channels()
388 int snd_pcm_hw_params_get_channels(const snd_pcm_hw_params_t *params, unsigned int *val) in snd_pcm_hw_params_get_channels()
393 int snd_pcm_hw_params_get_rate(const snd_pcm_hw_params_t *params, unsigned int *val, int *dir) in snd_pcm_hw_params_get_rate()
398 int snd_pcm_hw_params_get_period_time(const snd_pcm_hw_params_t *params, unsigned int *val, int *di… in snd_pcm_hw_params_get_period_time()
412 int snd_pcm_hw_params_get_buffer_size(const snd_pcm_hw_params_t *params, snd_pcm_uframes_t *val) in snd_pcm_hw_params_get_buffer_size()
426 int snd_pcm_hw_params_get_periods(const snd_pcm_hw_params_t *params, unsigned int *val, int *dir) in snd_pcm_hw_params_get_periods()
482 int snd_pcm_sw_params_get_start_threshold(snd_pcm_sw_params_t *params, snd_pcm_uframes_t *val) in snd_pcm_sw_params_get_start_threshold()
496 int snd_pcm_sw_params_get_stop_threshold(snd_pcm_sw_params_t *params, snd_pcm_uframes_t *val) in snd_pcm_sw_params_get_stop_threshold()
510 int snd_pcm_sw_params_get_silence_size(snd_pcm_sw_params_t *params, snd_pcm_uframes_t *val) in snd_pcm_sw_params_get_silence_size()
524 int snd_pcm_sw_params_get_avail_min(const snd_pcm_sw_params_t *params, snd_pcm_uframes_t *val) in snd_pcm_sw_params_get_avail_min()
[all …]
/bsp/asm9260t/platform/
A Dgpio.c17 rt_uint32_t val = inl(addr); // read origin value in HW_SetPinMux() local
28 rt_uint32_t val; in HW_GpioSetDir() local
36 rt_uint32_t addr, val; in HW_GpioSetVal() local
44 rt_uint32_t addr, val; in HW_GpioClrVal() local
/bsp/microchip/same70/bsp/ethernet_phy/
A Dethernet_phy.c63 …2_t ethernet_phy_read_reg(struct ethernet_phy_descriptor *const descr, uint16_t reg, uint16_t *val) in ethernet_phy_read_reg()
73 …2_t ethernet_phy_write_reg(struct ethernet_phy_descriptor *const descr, uint16_t reg, uint16_t val) in ethernet_phy_write_reg()
85 uint16_t val; in ethernet_phy_set_reg_bit() local
102 uint16_t val; in ethernet_phy_clear_reg_bit() local
167 uint16_t val; in ethernet_phy_get_link_status() local

Completed in 53 milliseconds

12345678910>>...29