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Searched defs:x (Results 1 – 17 of 17) sorted by relevance

/libcpu/c-sky/common/
A Dcsi_simd.h122 __ALWAYS_INLINE uint32_t __QADD8(uint32_t x, uint32_t y) in __QADD8()
151 __ALWAYS_INLINE uint32_t __UQADD8(uint32_t x, uint32_t y) in __UQADD8()
178 __ALWAYS_INLINE uint32_t __SADD8(uint32_t x, uint32_t y) in __SADD8()
205 __ALWAYS_INLINE uint32_t __UADD8(uint32_t x, uint32_t y) in __UADD8()
234 __ALWAYS_INLINE uint32_t __QSUB8(uint32_t x, uint32_t y) in __QSUB8()
290 __ALWAYS_INLINE uint32_t __SSUB8(uint32_t x, uint32_t y) in __SSUB8()
317 __ALWAYS_INLINE uint32_t __USUB8(uint32_t x, uint32_t y) in __USUB8()
1128 __ALWAYS_INLINE int32_t __QADD(int32_t x, int32_t y) in __QADD()
1167 __ALWAYS_INLINE int32_t __QSUB(int32_t x, int32_t y) in __QSUB()
1460 __ALWAYS_INLINE uint32_t __SXTB16(uint32_t x) in __SXTB16()
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A Dcsi_instr.h220 __ALWAYS_INLINE int32_t __SSAT(int32_t x, uint32_t y) in __SSAT()
/libcpu/mips/common/
A Dmips_addrspace.h22 #define _CONST64_(x) x argument
28 #define _CONST64_(x) x ## L argument
30 #define _CONST64_(x) x ## LL argument
151 #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ argument
153 #define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK) argument
154 #define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE) argument
A Dmips_regs.h144 #define __STR(x) #x argument
147 #define STR(x) __STR(x) argument
654 #define CAUSE_EXCCODE(x) ((CAUSEF_EXCCODE & (x->cp0_cause)) >> CAUSEB_EXCCODE) argument
655 #define CAUSE_EPC(x) (x->cp0_epc + (((x->cp0_cause & CAUSEF_BD) >> CAUSEB_BD) << 2)) argument
1129 #define set_cp0_status(x) set_c0_status(x) argument
1130 #define set_cp0_cause(x) set_c0_cause(x) argument
1131 #define set_cp0_config(x) set_c0_config(x) argument
1134 #define write_c1_status(x) write_32bit_cp1_register(31, x) argument
/libcpu/ti-dsp/c6x/
A Dtrap.h81 #define ffz(x) __ffs(~(x)) argument
90 static inline int fls(int x) in fls()
108 static inline int ffs(int x) in ffs()
/libcpu/arm/cortex-a/
A Dmmu.h63 #define MMU_MAP_MTBL_AP01(x) (x<<4) argument
64 #define MMU_MAP_MTBL_TEX(x) (x<<6) argument
65 #define MMU_MAP_MTBL_AP2(x) (x<<9) argument
67 #define MMU_MAP_MTBL_NG(x) (x<<11) argument
A Dgicv3.h48 #define __REG32(x) (*((volatile unsigned int*)((rt_uint32_t)x))) argument
/libcpu/mips/gs264/
A Dmmu.h61 #define MMU_MAP_MTBL_AP01(x) (x<<4) argument
62 #define MMU_MAP_MTBL_TEX(x) (x<<6) argument
63 #define MMU_MAP_MTBL_AP2(x) (x<<9) argument
A Dmips_mmu.h77 #define lowbit(x) ((x) & (-(x))) argument
/libcpu/arm/dm36x/
A Dmmu.h28 #define PGD_DOMAIN(x) ((x) << 5) argument
38 #define PGD_SECT_TEX(x) ((x) << 12) /* ARMv5 */ argument
76 #define PTE_EXT_TEX(x) ((x) << 6) /* ARMv5 */ argument
A Dcpuport.c190 register rt_uint32_t x; in __rt_ffs() local
/libcpu/arm/armv6/
A Dmmu.h28 #define PGD_DOMAIN(x) ((x) << 5) argument
38 #define PGD_SECT_TEX(x) ((x) << 12) /* ARMv5 */ argument
76 #define PTE_EXT_TEX(x) ((x) << 6) /* ARMv5 */ argument
A Dcpuport.c192 register rt_uint32_t x; in __rt_ffs() local
/libcpu/arm/arm926/
A Dcpuport.c191 register rt_uint32_t x; in __rt_ffs() local
/libcpu/ppc/ppc405/include/asm/
A Dprocessor.h134 #define DBCR_RST(x) (((x) & 0x3) << 28) argument
149 #define DBCR_D1S(x) (((x) & 0x3) << 12) /* Data Adrr. Compare 1 Size */ argument
156 #define DBCR_D2S(x) (((x) & 0x3) << 8) /* Data Addr. Compare 2 Size */ argument
383 #define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */ argument
388 #define TCR_WRC(x) (((x)&0x3)<<28) /* WDT Reset Control */ argument
395 #define TCR_FP(x) (((x)&0x3)<<24) /* FIT Period */ argument
420 #define TSR_WRS(x) (((x)&0x3)<<28) /* WDT Reset Status */ argument
790 #define IOCR_RDM(x) (((x) & 0x3) << 3) argument
1076 #define CPU_TYPE_ENTRY(x) {#x, SPR_##x} argument
/libcpu/arm/cortex-r52/
A Dgicv3.h48 #define __REG32(x) (*((volatile unsigned int*)((rt_uint32_t)x))) argument
/libcpu/arm/am335x/
A Dam33xx.h12 #define REG32(x) (*((volatile unsigned int *)(x))) argument
13 #define REG16(x) (*((volatile unsigned short *)(x))) argument

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