1;/** 2; ****************************************************************************** 3; * @file startup_ft32f072x8.s 4; * @author FMD AE 5; * @brief FT32F072X8 devices vector table for MDK-ARM toolchain. 6; * @version V1.0.0 7; * @data 2021-07-01 8; ****************************************************************************** 9; */ 10 11Stack_Size EQU 0x00000400 12 13 AREA STACK, NOINIT, READWRITE, ALIGN=3 14Stack_Mem SPACE Stack_Size 15__initial_sp 16 17 18; <h> Heap Configuration 19; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 20; </h> 21 22Heap_Size EQU 0x00000200 23 24 AREA HEAP, NOINIT, READWRITE, ALIGN=3 25__heap_base 26Heap_Mem SPACE Heap_Size 27__heap_limit 28 29 PRESERVE8 30 THUMB 31 32 33; Vector Table Mapped to Address 0 at Reset 34 AREA RESET, DATA, READONLY 35 EXPORT __Vectors 36 EXPORT __Vectors_End 37 EXPORT __Vectors_Size 38 39__Vectors DCD __initial_sp ; Top of Stack 40 DCD Reset_Handler ; Reset Handler 41 DCD NMI_Handler ; NMI Handler 42 DCD HardFault_Handler ; Hard Fault Handler 43 DCD 0 ; Reserved 44 DCD 0 ; Reserved 45 DCD 0 ; Reserved 46 DCD 0 ; Reserved 47 DCD 0 ; Reserved 48 DCD 0 ; Reserved 49 DCD 0 ; Reserved 50 DCD SVC_Handler ; SVCall Handler 51 DCD 0 ; Reserved 52 DCD 0 ; Reserved 53 DCD PendSV_Handler ; PendSV Handler 54 DCD SysTick_Handler ; SysTick Handler 55 56 ; External Interrupts 57 DCD WWDG_IRQHandler ; Window Watchdog 58 DCD PVD_VDDIO_IRQHandler ; PVD_VDDIO 59 DCD RTC_IRQHandler ; RTC through EXTI Line 60 DCD FLASH_IRQHandler ; FLASH 61 DCD RCC_IRQHandler ; RCC 62 DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 63 DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 64 DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 65 DCD 0 ; Reserved 66 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 67 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 68 DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5 69 DCD ADC1_IRQHandler ; ADC1 70 DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation 71 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare 72 DCD 0 ; Reserved 73 DCD TIM3_IRQHandler ; TIM3 74 DCD TIM6_IRQHandler ; TIM6 75 DCD 0 ; Reserved 76 DCD TIM14_IRQHandler ; TIM14 77 DCD TIM15_IRQHandler ; TIM15 78 DCD TIM16_IRQHandler ; TIM16 79 DCD TIM17_IRQHandler ; TIM17 80 DCD I2C1_IRQHandler ; I2C1 81 DCD I2C2_IRQHandler ; I2C2 82 DCD SPI1_IRQHandler ; SPI1 83 DCD SPI2_IRQHandler ; SPI2 84 DCD USART1_IRQHandler ; USART1 85 DCD USART2_IRQHandler ; USART2 86 DCD DIV_IRQHandler ; DIV 87 DCD 0 ; Reserved 88 DCD USB_IRQHandler ; USB 89 90__Vectors_End 91 92__Vectors_Size EQU __Vectors_End - __Vectors 93 94 AREA |.text|, CODE, READONLY 95 96; Reset handler routine 97Reset_Handler PROC 98 EXPORT Reset_Handler [WEAK] 99 IMPORT __main 100 IMPORT SystemInit 101 102 103 104 LDR R0, =__initial_sp ; set stack pointer 105 MSR MSP, R0 106 107;;Check if boot space corresponds to test memory 108 109 LDR R0,=0x00000004 110 LDR R1, [R0] 111 LSRS R1, R1, #24 112 LDR R2,=0x1F 113 CMP R1, R2 114 115 BNE ApplicationStart 116 117;; SYSCFG clock enable 118 119 LDR R0,=0x40021018 120 LDR R1,=0x00000001 121 STR R1, [R0] 122 123;; Set CFGR1 register with flash memory remap at address 0 124 125 LDR R0,=0x40010000 126 LDR R1,=0x00000000 127 STR R1, [R0] 128ApplicationStart 129 LDR R0, =SystemInit 130 BLX R0 131 LDR R0, =__main 132 BX R0 133 ENDP 134 135; Dummy Exception Handlers (infinite loops which can be modified) 136 137NMI_Handler PROC 138 EXPORT NMI_Handler [WEAK] 139 B . 140 ENDP 141HardFault_Handler\ 142 PROC 143 EXPORT HardFault_Handler [WEAK] 144 B . 145 ENDP 146SVC_Handler PROC 147 EXPORT SVC_Handler [WEAK] 148 B . 149 ENDP 150PendSV_Handler PROC 151 EXPORT PendSV_Handler [WEAK] 152 B . 153 ENDP 154SysTick_Handler PROC 155 EXPORT SysTick_Handler [WEAK] 156 B . 157 ENDP 158 159Default_Handler PROC 160 161 EXPORT WWDG_IRQHandler [WEAK] 162 EXPORT PVD_VDDIO_IRQHandler [WEAK] 163 EXPORT RTC_IRQHandler [WEAK] 164 EXPORT FLASH_IRQHandler [WEAK] 165 EXPORT RCC_IRQHandler [WEAK] 166 EXPORT EXTI0_1_IRQHandler [WEAK] 167 EXPORT EXTI2_3_IRQHandler [WEAK] 168 EXPORT EXTI4_15_IRQHandler [WEAK] 169 EXPORT DMA1_Channel1_IRQHandler [WEAK] 170 EXPORT DMA1_Channel2_3_IRQHandler [WEAK] 171 EXPORT DMA1_Channel4_5_IRQHandler [WEAK] 172 EXPORT ADC1_IRQHandler [WEAK] 173 EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK] 174 EXPORT TIM1_CC_IRQHandler [WEAK] 175 EXPORT TIM3_IRQHandler [WEAK] 176 EXPORT TIM6_IRQHandler [WEAK] 177 EXPORT TIM14_IRQHandler [WEAK] 178 EXPORT TIM15_IRQHandler [WEAK] 179 EXPORT TIM16_IRQHandler [WEAK] 180 EXPORT TIM17_IRQHandler [WEAK] 181 EXPORT I2C1_IRQHandler [WEAK] 182 EXPORT I2C2_IRQHandler [WEAK] 183 EXPORT SPI1_IRQHandler [WEAK] 184 EXPORT SPI2_IRQHandler [WEAK] 185 EXPORT USART1_IRQHandler [WEAK] 186 EXPORT USART2_IRQHandler [WEAK] 187 EXPORT DIV_IRQHandler [WEAK] 188 EXPORT USB_IRQHandler [WEAK] 189 190 191WWDG_IRQHandler 192PVD_VDDIO_IRQHandler 193RTC_IRQHandler 194FLASH_IRQHandler 195RCC_IRQHandler 196EXTI0_1_IRQHandler 197EXTI2_3_IRQHandler 198EXTI4_15_IRQHandler 199DMA1_Channel1_IRQHandler 200DMA1_Channel2_3_IRQHandler 201DMA1_Channel4_5_IRQHandler 202ADC1_IRQHandler 203TIM1_BRK_UP_TRG_COM_IRQHandler 204TIM1_CC_IRQHandler 205TIM3_IRQHandler 206TIM6_IRQHandler 207TIM14_IRQHandler 208TIM15_IRQHandler 209TIM16_IRQHandler 210TIM17_IRQHandler 211I2C1_IRQHandler 212I2C2_IRQHandler 213SPI1_IRQHandler 214SPI2_IRQHandler 215USART1_IRQHandler 216USART2_IRQHandler 217DIV_IRQHandler 218USB_IRQHandler 219 220 B . 221 222 ENDP 223 224 ALIGN 225 226;******************************************************************************* 227; User Stack and Heap initialization 228;******************************************************************************* 229 IF :DEF:__MICROLIB 230 231 EXPORT __initial_sp 232 EXPORT __heap_base 233 EXPORT __heap_limit 234 235 ELSE 236 237 IMPORT __use_two_region_memory 238 EXPORT __user_initial_stackheap 239 240__user_initial_stackheap 241 242 LDR R0, = Heap_Mem 243 LDR R1, =(Stack_Mem + Stack_Size) 244 LDR R2, = (Heap_Mem + Heap_Size) 245 LDR R3, = Stack_Mem 246 BX LR 247 248 ALIGN 249 250 ENDIF 251 252 END 253 254;************************ (C) COPYRIGHT FMD *****END OF FILE***** 255