1;/*---------------------------------------------------------------------------------------------------------*/ 2;/* Holtek Semiconductor Inc. */ 3;/* */ 4;/* Copyright (C) Holtek Semiconductor Inc. */ 5;/* All rights reserved. */ 6;/* */ 7;/*----------------------------------------------------------------------------------------------------------- 8; File Name : startup_ht32f5xxxx_15.s 9; Version : $Rev:: 7594 $ 10; Date : $Date:: 2024-02-23 #$ 11; Description : Startup code. 12;-----------------------------------------------------------------------------------------------------------*/ 13 14; Supported Device 15; ======================================== 16; HT32F53242, HT32F53252 17; HT32F53231, HT32F53241 18 19;/* <<< Use Configuration Wizard in Context Menu >>> */ 20 21;// <o> HT32 Device 22;// <i> Select HT32 Device for the assembly setting. 23;// <i> Notice that the project's Asm Define has the higher priority. 24;// <0=> By Project Asm Define 25;// <28=> HT32F53242/52 26;// <29=> HT32F53231/41 27USE_HT32_CHIP_SET EQU 0 ; Notice that the project's Asm Define has the higher priority. 28 29_HT32FWID EQU 0xFFFFFFFF 30;_HT32FWID EQU 0x00053242 31;_HT32FWID EQU 0x00053252 32;_HT32FWID EQU 0x00053231 33;_HT32FWID EQU 0x00053241 34 35HT32F53242_52 EQU 28 36HT32F53231_41 EQU 29 37 38 IF USE_HT32_CHIP_SET=0 39 ; Use project's Asm Define setting (default) 40 ELSE 41 IF :DEF:USE_HT32_CHIP 42 ; Use project's Asm Define setting (higher priority than the "USE_HT32_CHIP_SET") 43 ELSE 44 ; Use "USE_HT32_CHIP_SET" in the "startup_ht32xxxxx_xx.s" file 45USE_HT32_CHIP EQU USE_HT32_CHIP_SET 46 ENDIF 47 ENDIF 48 49; Amount of memory (in bytes) allocated for Stack and Heap 50; Tailor those values to your application needs 51 52;// <o> Stack Location 53;// <0=> After the RW/ZI/Heap (Default) 54;// <1=> On the top of the SRAM (The end of the SRAM) 55USE_STACK_ON_TOP EQU 0 56 57;// <o> Stack Size (in Bytes, must 8 byte aligned) <0-16384:8> 58;// <i> Only meanful when the Stack Location = "After the RW/ZI/Heap" (USE_STACK_ON_TOP = 0). 59Stack_Size EQU 512 60 61 AREA STACK, NOINIT, READWRITE, ALIGN = 3 62__HT_check_sp 63Stack_Mem SPACE Stack_Size 64 IF (USE_STACK_ON_TOP = 1) 65__initial_sp EQU 0x20000000 + USE_LIBCFG_RAM_SIZE 66 ELSE 67__initial_sp 68 ENDIF 69 70;// <o> Heap Size (in Bytes) <0-16384:8> 71Heap_Size EQU 0 72 73 AREA HEAP, NOINIT, READWRITE, ALIGN = 3 74__HT_check_heap 75__heap_base 76Heap_Mem SPACE Heap_Size 77__heap_limit 78 79 PRESERVE8 80 THUMB 81 82;******************************************************************************* 83; Fill-up the Vector Table entries with the exceptions ISR address 84;******************************************************************************* 85 AREA RESET, CODE, READONLY 86 EXPORT __Vectors 87_RESERVED EQU 0xFFFFFFFF 88__Vectors 89 DCD __initial_sp ; ---, 00, 0x000, Top address of Stack 90 DCD Reset_Handler ; ---, 01, 0x004, Reset Handler 91 DCD NMI_Handler ; -14, 02, 0x008, NMI Handler 92 DCD HardFault_Handler ; -13, 03, 0x00C, Hard Fault Handler 93 DCD _RESERVED ; ---, 04, 0x010, Reserved 94 DCD _RESERVED ; ---, 05, 0x014, Reserved 95 DCD _RESERVED ; ---, 06, 0x018, Reserved 96 DCD _RESERVED ; ---, 07, 0x01C, Reserved 97 DCD _HT32FWID ; ---, 08, 0x020, Reserved 98 DCD _RESERVED ; ---, 09, 0x024, Reserved 99 DCD _RESERVED ; ---, 10, 0x028, Reserved 100 DCD SVC_Handler ; -05, 11, 0x02C, SVC Handler 101 DCD _RESERVED ; ---, 12, 0x030, Reserved 102 DCD _RESERVED ; ---, 13, 0x034, Reserved 103 DCD PendSV_Handler ; -02, 14, 0x038, PendSV Handler 104 DCD SysTick_Handler ; -01, 15, 0x03C, SysTick Handler 105 106 ; External Interrupt Handler 107 DCD LVD_BOD_IRQHandler ; 00, 16, 0x040, 108 DCD RTC_IRQHandler ; 01, 17, 0x044, 109 DCD FLASH_IRQHandler ; 02, 18, 0x048, 110 DCD EVWUP_IRQHandler ; 03, 19, 0x04C, 111 DCD EXTI0_1_IRQHandler ; 04, 20, 0x050, 112 DCD EXTI2_3_IRQHandler ; 05, 21, 0x054, 113 DCD EXTI4_15_IRQHandler ; 06, 22, 0x058, 114 IF (USE_HT32_CHIP=HT32F53242_52) 115 DCD COMP_IRQHandler ; 07, 23, 0x05C, 116 ELSE 117 DCD _RESERVED ; 07, 23, 0x05C, 118 ENDIF 119 DCD ADC_IRQHandler ; 08, 24, 0x060, 120 DCD _RESERVED ; 09, 25, 0x064, 121 DCD MCTM0_IRQHandler ; 10, 26, 0x068, 122 DCD _RESERVED ; 11, 27, 0x06C, 123 DCD GPTM0_IRQHandler ; 12, 28, 0x070, 124 DCD _RESERVED ; 13, 29, 0x074, 125 DCD _RESERVED ; 14, 30, 0x078, 126 DCD PWM0_IRQHandler ; 15, 31, 0x07C, 127 IF (USE_HT32_CHIP=HT32F53242_52) 128 DCD PWM1_IRQHandler ; 16, 32, 0x080, 129 ELSE 130 DCD _RESERVED ; 16, 32, 0x080, 131 ENDIF 132 DCD BFTM0_IRQHandler ; 17, 33, 0x084, 133 DCD BFTM1_IRQHandler ; 18, 34, 0x088, 134 DCD I2C0_IRQHandler ; 19, 35, 0x08C, 135 DCD I2C1_IRQHandler ; 20, 36, 0x090, 136 DCD SPI0_IRQHandler ; 21, 37, 0x094, 137 DCD SPI1_IRQHandler ; 22, 38, 0x098, 138 DCD USART0_IRQHandler ; 23, 39, 0x09C, 139 IF (USE_HT32_CHIP=HT32F53242_52) 140 DCD USART1_IRQHandler ; 24, 40, 0x0A0, 141 ELSE 142 DCD _RESERVED ; 24, 40, 0x0A0, 143 ENDIF 144 DCD UART0_IRQHandler ; 25, 41, 0x0A4, 145 DCD UART1_IRQHandler ; 26, 42, 0x0A8, 146 DCD CAN0_IRQHandler ; 27, 43, 0x0AC, 147 DCD _RESERVED ; 28, 44, 0x0B0, 148 DCD LEDC_IRQHandler ; 29, 45, 0x0B4, 149 DCD PDMA_CH0_1_IRQHandler ; 30, 46, 0x0B8, 150 DCD PDMA_CH2_5_IRQHandler ; 31, 47, 0x0BC, 151 152; Reset handler routine 153Reset_Handler PROC 154 EXPORT Reset_Handler [WEAK] 155 IMPORT SystemInit 156 IMPORT __main 157 LDR R0, =SystemInit 158 BLX R0 159 LDR R0, =__main 160 BX R0 161 ENDP 162 163; Dummy Exception Handlers 164NMI_Handler PROC 165 EXPORT NMI_Handler [WEAK] 166 B . 167 ENDP 168 169HardFault_Handler PROC 170 EXPORT HardFault_Handler [WEAK] 171 B . 172 ENDP 173 174SVC_Handler PROC 175 EXPORT SVC_Handler [WEAK] 176 B . 177 ENDP 178 179PendSV_Handler PROC 180 EXPORT PendSV_Handler [WEAK] 181 B . 182 ENDP 183 184SysTick_Handler PROC 185 EXPORT SysTick_Handler [WEAK] 186 B . 187 ENDP 188 189Default_Handler PROC 190 EXPORT LVD_BOD_IRQHandler [WEAK] 191 EXPORT RTC_IRQHandler [WEAK] 192 EXPORT FLASH_IRQHandler [WEAK] 193 EXPORT EVWUP_IRQHandler [WEAK] 194 EXPORT EXTI0_1_IRQHandler [WEAK] 195 EXPORT EXTI2_3_IRQHandler [WEAK] 196 EXPORT EXTI4_15_IRQHandler [WEAK] 197 EXPORT COMP_IRQHandler [WEAK] 198 EXPORT ADC_IRQHandler [WEAK] 199 EXPORT MCTM0_IRQHandler [WEAK] 200 EXPORT GPTM0_IRQHandler [WEAK] 201 EXPORT PWM0_IRQHandler [WEAK] 202 EXPORT PWM1_IRQHandler [WEAK] 203 EXPORT BFTM0_IRQHandler [WEAK] 204 EXPORT BFTM1_IRQHandler [WEAK] 205 EXPORT I2C0_IRQHandler [WEAK] 206 EXPORT I2C1_IRQHandler [WEAK] 207 EXPORT SPI0_IRQHandler [WEAK] 208 EXPORT SPI1_IRQHandler [WEAK] 209 EXPORT USART0_IRQHandler [WEAK] 210 EXPORT USART1_IRQHandler [WEAK] 211 EXPORT UART0_IRQHandler [WEAK] 212 EXPORT UART1_IRQHandler [WEAK] 213 EXPORT CAN0_IRQHandler [WEAK] 214 EXPORT LEDC_IRQHandler [WEAK] 215 EXPORT PDMA_CH0_1_IRQHandler [WEAK] 216 EXPORT PDMA_CH2_5_IRQHandler [WEAK] 217 218LVD_BOD_IRQHandler 219RTC_IRQHandler 220FLASH_IRQHandler 221EVWUP_IRQHandler 222EXTI0_1_IRQHandler 223EXTI2_3_IRQHandler 224EXTI4_15_IRQHandler 225COMP_IRQHandler 226ADC_IRQHandler 227MCTM0_IRQHandler 228GPTM0_IRQHandler 229PWM0_IRQHandler 230PWM1_IRQHandler 231BFTM0_IRQHandler 232BFTM1_IRQHandler 233I2C0_IRQHandler 234I2C1_IRQHandler 235SPI0_IRQHandler 236SPI1_IRQHandler 237USART0_IRQHandler 238USART1_IRQHandler 239UART0_IRQHandler 240UART1_IRQHandler 241CAN0_IRQHandler 242LEDC_IRQHandler 243PDMA_CH0_1_IRQHandler 244PDMA_CH2_5_IRQHandler 245 B . 246 ENDP 247 248 ALIGN 249 250;******************************************************************************* 251; User Stack and Heap initialization 252;******************************************************************************* 253 EXPORT __HT_check_heap 254 EXPORT __HT_check_sp 255 256 IF :DEF:__MICROLIB 257 258 EXPORT __initial_sp 259 EXPORT __heap_base 260 EXPORT __heap_limit 261 262 ELSE 263 264 IMPORT __use_two_region_memory 265 EXPORT __user_initial_stackheap 266__user_initial_stackheap 267 268 IF (USE_STACK_ON_TOP = 1) 269 LDR R0, = Heap_Mem 270 LDR R1, = (0x20000000 + USE_LIBCFG_RAM_SIZE) 271 LDR R2, = (Heap_Mem + Heap_Size) 272 LDR R3, = (Heap_Mem + Heap_Size) 273 BX LR 274 ELSE 275 LDR R0, = Heap_Mem 276 LDR R1, = (Stack_Mem + Stack_Size) 277 LDR R2, = (Heap_Mem + Heap_Size) 278 LDR R3, = Stack_Mem 279 BX LR 280 ENDIF 281 282 ALIGN 283 284 ENDIF 285 286 END 287