1 /*
2 * Allwinner SoCs display driver.
3 *
4 * Copyright (C) 2016 Allwinner.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 #ifndef _DE_FEAT_H_
12 #define _DE_FEAT_H_
13
regwrite(void * dst,void * src,unsigned int n)14 static inline void regwrite(void *dst, void *src, unsigned int n)
15 {
16 volatile unsigned int *tmp = dst;
17 unsigned int *s = src;
18 n = n / 4;
19 while (n--)
20 *tmp++ = *s++;
21 }
22 #define DE_OUTPUT_TYPE_LCD 1
23 #define DE_OUTPUT_TYPE_TV 2
24 #define DE_OUTPUT_TYPE_HDMI 4
25 #define DE_OUTPUT_TYPE_VGA 8
26 #define DE_OUTPUT_TYPE_VDPO 16
27
28 #define CVBS_PAL_WIDTH 720
29 #define CVBS_PAL_HEIGHT 576
30 #define CVBS_NTSC_WIDTH 720
31 #define CVBS_NTSC_HEIGHT 480
32
33 #define P2P_FB_MIN_WIDTH 704
34 #define P2P_FB_MAX_WIDTH 736
35 #define PALETTE_SIZE 256
36
37 #if defined(CONFIG_ARCH_SUN50IW2)
38
39 /* features for sun50iw2 */
40
41 #define DEVICE_NUM 2
42 #define DE_NUM 2
43 #define CHN_NUM 4
44 #define VI_CHN_NUM 1
45 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
46 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
47 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
48 #define LAYER_MAX_NUM_PER_CHN 4
49
50 /* #define SUPPORT_DSI */
51 /* #define SUPPORT_SMBL */
52 #define SUPPORT_HDMI
53 /* #define DSI_VERSION_40 */
54 /* #define HAVE_DEVICE_COMMON_MODULE */
55 #define SUPPORT_TV
56 #define TV_UGLY_CLK_RATE 216000000
57 /* #define SUPPORT_VGA */
58 /* #define SUPPORT_LVDS */
59 /* #define LVDS_REVERT */
60
61 #if defined(CONFIG_FPGA_V4_PLATFORM) \
62 || defined(CONFIG_FPGA_V7_PLATFORM)
63 /*
64 * TCON1_DRIVE_PANEL - General for fpga verify
65 * On some platform there is no tcon0
66 * At fpga period, we can use tcon1 to drive lcd pnael
67 * we need to config & enable tcon1.
68 * So enable this config.
69 */
70 #define TCON1_DRIVE_PANEL
71 #endif
72
73 #elif defined(CONFIG_ARCH_SUN8IW11)
74
75 /* features for sun8iw11 */
76
77 #define DEVICE_NUM 4
78 #define DE_NUM 2
79 #define CHN_NUM 4
80 #define VI_CHN_NUM 1
81 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
82 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
83 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
84 #define LAYER_MAX_NUM_PER_CHN 4
85
86 #define SUPPORT_DSI
87 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
88 #define SUPPORT_SMBL
89 #endif
90 #define SUPPORT_HDMI
91 #define DSI_VERSION_40
92 #define HAVE_DEVICE_COMMON_MODULE
93 #define SUPPORT_TV
94 #define TV_UGLY_CLK_RATE 216000000
95 #define SUPPORT_VGA
96 #define SUPPORT_LVDS
97 #define DE_WB_RESET_SHARE
98 /* #define LVDS_REVERT */
99 #define TCON_POL_CORRECT
100 #elif defined(CONFIG_ARCH_SUN20IW1)
101 #define DEVICE_NUM 2
102 #define DE_NUM 2
103 #define CHN_NUM 2
104 #define VI_CHN_NUM 1
105 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
106 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
107 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
108 #define LAYER_MAX_NUM_PER_CHN 4
109 #define HAVE_DEVICE_COMMON_MODULE
110 #define SUPPORT_LVDS
111 #define SUPPORT_COMBO_DPHY
112 #define SUPPORT_DSI
113 #define CLK_NUM_PER_DSI 1
114 #define DEVICE_DSI_NUM 1
115 #define SUPPORT_LBC
116 #define SUPPORT_PALETTE
117 #define SUPPORT_DITHER_OUTPUT
118 #define DSI_VERSION_40
119
120 #elif defined(CONFIG_ARCH_SUN8IW15)
121
122 /* features for sun8iw15 */
123
124 #define DEVICE_NUM 1
125 #define DE_NUM 1
126 #define CHN_NUM 4
127 #define VI_CHN_NUM 1
128 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
129 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
130 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
131 #define LAYER_MAX_NUM_PER_CHN 4
132
133 #define SUPPORT_DSI
134 #define DSI_VERSION_28
135 #define CLK_NUM_PER_DSI 2
136 #define DEVICE_DSI_NUM 1
137 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
138 #define SUPPORT_SMBL
139 #endif
140 #define HAVE_DEVICE_COMMON_MODULE
141 #define SUPPORT_LVDS
142 /*#define DE_WB_RESET_SHARE*/
143
144 /* #define SUPPORT_EINK */
145 /* #define EINK_PANEL_USED */
146 /* #define SUPPORT_WB */
147 /* #define EINK_DMABUF_USED */
148
149 /* #define LVDS_REVERT */
150
151 #elif defined(CONFIG_ARCH_SUN50IW10)
152 /* features for sun50iw10 */
153
154 #define DEVICE_NUM 2
155 #define DE_NUM 2
156 #define CHN_NUM 4
157 #define VI_CHN_NUM 2
158 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
159 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
160 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
161 #define LAYER_MAX_NUM_PER_CHN 4
162
163 #define SUPPORT_DSI
164 #define DSI_VERSION_28
165 #define CLK_NUM_PER_DSI 2
166 #define DEVICE_DSI_NUM 1
167 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
168 #define SUPPORT_SMBL
169 #endif
170 #define HAVE_DEVICE_COMMON_MODULE
171 #define SUPPORT_LVDS
172 /*#define DE_WB_RESET_SHARE*/
173
174 /* #define SUPPORT_EINK */
175 /* #define EINK_PANEL_USED */
176 /* #define SUPPORT_WB */
177 /* #define EINK_DMABUF_USED */
178
179 /* #define LVDS_REVERT */
180
181 #elif defined(CONFIG_ARCH_SUN50IW1)
182
183 /* features for sun50iw1 */
184
185 #define DEVICE_NUM 4
186 #define DE_NUM 2
187 #define CHN_NUM 4
188 #define VI_CHN_NUM 1
189 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
190 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
191 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
192 #define LAYER_MAX_NUM_PER_CHN 4
193
194 #define SUPPORT_DSI
195 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
196 #define SUPPORT_SMBL
197 #endif
198 #define SUPPORT_HDMI
199 #define DSI_VERSION_40
200 #define HAVE_DEVICE_COMMON_MODULE
201 #define SUPPORT_TV
202 #define SUPPORT_VGA
203 #define SUPPORT_LVDS
204 /* #define LVDS_REVERT */
205
206 #elif defined(CONFIG_ARCH_SUN50IW8)
207
208 /* features for sun50iw8 */
209
210 #define DEVICE_NUM 1
211 #define DE_NUM 1
212 #define CHN_NUM 2
213 #define VI_CHN_NUM 0
214 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
215 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
216 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
217 #define LAYER_MAX_NUM_PER_CHN 4
218
219 //#define SUPPORT_DSI
220 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
221 #define SUPPORT_SMBL
222 #endif
223 /*#define SUPPORT_HDMI */
224 //#define DSI_VERSION_40
225 #define HAVE_DEVICE_COMMON_MODULE
226 //#define SUPPORT_TV
227 //#define SUPPORT_VGA
228 //#define SUPPORT_LVDS
229 /* #define LVDS_REVERT */
230
231
232 #elif defined(CONFIG_ARCH_SUN8IW12)
233 /* features for sun8iw12 */
234
235 #define DEVICE_NUM 2
236 #define DE_NUM 1
237 #define CHN_NUM 4
238 #define VI_CHN_NUM 2
239 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
240 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
241 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
242 #define LAYER_MAX_NUM_PER_CHN 4
243
244 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
245 #define SUPPORT_SMBL
246 #endif
247
248 #define SUPPORT_DSI
249 #define DSI_VERSION_28
250 #define CLK_NUM_PER_DSI 2
251 #define DEVICE_DSI_NUM 1
252 #define SUPPORT_HDMI
253 /* #define DSI_VERSION_40 */
254 #define HAVE_DEVICE_COMMON_MODULE
255 #define SUPPORT_TV
256 #define TV_UGLY_CLK_RATE 216000000
257 /* #define SUPPORT_VGA */
258 #define SUPPORT_LVDS
259 #define DE_WB_RESET_SHARE
260 /* #define LVDS_REVERT */
261 #ifdef COFNIG_VDPO_DISP2_SUNXI
262 #define SUPPORT_VDPO
263 #define DEVICE_VDPO_NUM 1
264 #endif
265
266 #elif defined(CONFIG_ARCH_SUN8IW16)
267 #define DEVICE_NUM 2
268 #define DE_NUM 1
269 #define CHN_NUM 4
270 #define VI_CHN_NUM 2
271 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
272 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
273 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
274 #define LAYER_MAX_NUM_PER_CHN 4
275
276 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
277 #define SUPPORT_SMBL
278 #endif
279
280 #define SUPPORT_DSI
281 #define DSI_VERSION_28
282 #define CLK_NUM_PER_DSI 2
283 #define DEVICE_DSI_NUM 1
284 #define SUPPORT_HDMI
285 #define BYPASS_TCON_CEU
286 #define USE_CEC_DDC_PAD
287 #define WB_HAS_CSC
288
289 /* #define DSI_VERSION_40 */
290 #define HAVE_DEVICE_COMMON_MODULE
291 #define SUPPORT_TV
292 #define TV_UGLY_CLK_RATE 216000000
293 /* #define SUPPORT_VGA */
294 #define SUPPORT_LVDS
295 #define DE_WB_RESET_SHARE
296 /* #define LVDS_REVERT */
297
298 #ifdef COFNIG_VDPO_DISP2_SUNXI
299 #define SUPPORT_VDPO
300 #define DEVICE_VDPO_NUM 1
301 #endif
302
303 #elif defined(CONFIG_ARCH_SUN8IW19)
304 #define DEVICE_NUM 1
305 #define DE_NUM 1
306 #define CHN_NUM 4 /*It is 3 in fact*/
307 #define VI_CHN_NUM 2
308 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
309 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
310 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
311 #define LAYER_MAX_NUM_PER_CHN 4
312
313 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
314 #define SUPPORT_SMBL
315 #endif
316
317 #define SUPPORT_DSI
318 #define DSI_VERSION_28
319 #define CLK_NUM_PER_DSI 2
320 #define DEVICE_DSI_NUM 1
321 #define BYPASS_TCON_CEU
322 #define USE_CEC_DDC_PAD
323 #define WB_HAS_CSC
324 #define DE_FREQ_HZ 300000000
325
326 /* #define DSI_VERSION_40 */
327 #define HAVE_DEVICE_COMMON_MODULE
328 /* #define SUPPORT_VGA */
329 #define DE_WB_RESET_SHARE
330 /* #define LVDS_REVERT */
331
332 #ifdef COFNIG_VDPO_DISP2_SUNXI
333 #define SUPPORT_VDPO
334 #define DEVICE_VDPO_NUM 1
335 #endif
336
337 #elif defined(CONFIG_ARCH_SUN8IW6)
338 /* features for sun8iw6 */
339
340 #define DEVICE_NUM 2
341 #define DE_NUM 2
342 #define CHN_NUM 4
343 #define VI_CHN_NUM 1
344 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
345 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
346 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
347 #define LAYER_MAX_NUM_PER_CHN 4
348 #define SUPPORT_LVDS
349 #define SUPPORT_DSI
350 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
351 #define SUPPORT_SMBL
352 #endif
353 #define SUPPORT_HDMI
354 #define SUPPORT_TV
355 #define DSI_VERSION_28
356 #define CLK_NUM_PER_DSI 2
357 #define DE_WB_RESET_SHARE
358 #define LVDS_REVERT
359
360 #elif defined(CONFIG_ARCH_SUN8IW7)
361
362 #define DEVICE_NUM 2
363 #define DE_NUM 2
364 #define CHN_NUM 4
365 #define VI_CHN_NUM 1
366 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
367 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
368 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
369 #define LAYER_MAX_NUM_PER_CHN 4
370 #define VEP_NUM 1
371 #define DE_WB_RESET_SHARE
372
373 #define SUPPORT_HDMI
374 #define SUPPORT_TV
375 #define TV_UGLY_CLK_RATE 216000000
376
377 #elif defined(CONFIG_ARCH_SUN8IW17)
378
379 /* features for sun8iw17 */
380
381 #define DEVICE_NUM 3
382 #define DE_NUM 2
383 #define CHN_NUM 4
384 #define VI_CHN_NUM 2
385 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
386 #define LAYER_MAX_VI_NUM_PER_CHN 4
387 #define LAYER_MAX_UI_NUM_PER_CHN 4
388 #define LAYER_MAX_NUM_PER_CHN 4
389
390 #define SUPPORT_DSI
391 #define DEVICE_DSI_NUM 2
392 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
393 #define SUPPORT_SMBL
394 #endif
395 /* #define SUPPORT_HDMI */
396 #define DSI_VERSION_40
397 #define HAVE_DEVICE_COMMON_MODULE
398 #define SUPPORT_TV
399 #define TV_UGLY_CLK_RATE 216000000
400 /* #define SUPPORT_VGA */
401 #define SUPPORT_LVDS
402 /* #define LVDS_REVERT */
403
404 #else
405
406 /* default features */
407 #error "undefined platform!!!"
408
409 #define DEVICE_NUM 2
410 #define DE_NUM 2
411 #define CHN_NUM 4
412 #define VI_CHN_NUM 1
413 #define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
414 #define LAYER_NUM_PER_CHN_PER_VI_CHN 4
415 #define LAYER_NUM_PER_CHN_PER_UI_CHN 4
416 #define LAYER_MAX_NUM_PER_CHN 4
417
418 #define SUPPORT_DSI
419 #ifdef CONFIG_DISP2_SUNXI_SUPPORT_SMBL
420 #define SUPPORT_SMBL
421 #endif
422 #define SUPPORT_HDMI
423 #define DSI_VERSION_40
424 /* #define HAVE_DEVICE_COMMON_MODULE */
425 #define SUPPORT_TV
426 /* #define SUPPORT_VGA */
427 #define SUPPORT_LVDS
428 /* #define LVDS_REVERT */
429 #endif
430
431 #if defined(TV_UGLY_CLK_RATE)
432 #define TV_COMPOSITE_CLK_RATE 27000000
433 #endif
434
435 #ifndef CLK_NUM_PER_DSI
436 #define CLK_NUM_PER_DSI 1
437 #endif
438
439 #ifndef DEVICE_DSI_NUM
440 #define DEVICE_DSI_NUM 1
441 #endif /*endif DEVICE_DSI_NUM */
442
443 #ifndef DEVICE_LVDS_NUM
444 #define DEVICE_LVDS_NUM 1
445 #endif
446
447 /* total number of DSI clk */
448 #define CLK_DSI_NUM (CLK_NUM_PER_DSI * DEVICE_DSI_NUM)
449
450 #ifndef SUPPORT_VDPO
451 #define DEVICE_VDPO_NUM 0
452 #endif
453
454 #ifndef DE_FREQ_HZ
455 #define DE_FREQ_HZ 300000000
456 #endif
457
458 struct de_feat {
459 const int num_screens;
460 /* indicate layer manager number */
461 const int num_devices;
462 /*indicate timing controller number */
463 const int *num_chns;
464 const int *num_vi_chns;
465 const int *num_layers;
466 const int *is_support_vep;
467 const int *is_support_smbl;
468 const int *is_support_wb;
469 const int *supported_output_types;
470 const int *is_support_scale;
471 const int *scale_line_buffer;
472 #if defined(SUPPORT_LBC)
473 const int *is_support_lbc;
474 #endif
475 const int num_vdpo; /*number of vdpo device*/
476 };
477
478 int de_feat_init(void);
479 int de_feat_exit(void);
480 int de_feat_get_num_screens(void);
481 int de_feat_get_num_devices(void);
482 int de_feat_get_num_chns(unsigned int disp);
483 int de_feat_get_num_vi_chns(unsigned int disp);
484 unsigned int de_feat_get_number_of_vdpo(void);
485 int de_feat_get_num_ui_chns(unsigned int disp);
486 int de_feat_get_num_layers(unsigned int disp);
487 int de_feat_get_num_layers_by_chn(unsigned int disp, unsigned int chn);
488 int de_feat_is_support_vep(unsigned int disp);
489 int de_feat_is_support_vep_by_chn(unsigned int disp, unsigned int chn);
490 int de_feat_is_support_smbl(unsigned int disp);
491 int de_feat_is_supported_output_types(unsigned int disp,
492 unsigned int output_type);
493 int de_feat_is_support_wb(unsigned int disp);
494 int de_feat_is_support_scale(unsigned int disp);
495 int de_feat_is_support_scale_by_chn(unsigned int disp, unsigned int chn);
496 int de_feat_get_scale_linebuf(unsigned int disp);
497 int de_feat_get_tcon_index(unsigned int tcon_index);
498 unsigned int de_feat_get_tcon_type(unsigned int tcon_index);
499 #if defined(SUPPORT_LBC)
500 int de_feat_is_support_lbc_by_chn(unsigned int disp, unsigned int chn);
501 #endif
502 #endif
503