1 /* 2 * Copyright (c) 2006-2024, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2024-03-25 Shell Trimming unecessary ops and 9 * improve the performance of ctx switch 10 */ 11 12 #ifndef __ARM64_CONTEXT_H__ 13 #define __ARM64_CONTEXT_H__ 14 15 #include "../include/context_gcc.h" 16 17 #include <rtconfig.h> 18 #include <asm-generic.h> 19 #include <asm-fpu.h> 20 #include <armv8.h> 21 22 /* restore address space */ 23 .macro RESTORE_ADDRESS_SPACE 24 #ifdef RT_USING_SMART 25 bl rt_thread_self 26 mov x19, x0 27 bl lwp_aspace_switch 28 mov x0, x19 29 bl lwp_user_setting_restore 30 #endif 31 .endm 32 33 .macro RESTORE_CONTEXT_SWITCH using_sp 34 /* Set the SP to point to the stack of the task being restored. */ 35 mov sp, \using_sp 36 37 RESTORE_ADDRESS_SPACE 38 39 _RESTORE_CONTEXT_SWITCH 40 .endm 41 42 .macro RESTORE_IRQ_CONTEXT 43 #ifdef RT_USING_SMART 44 BL rt_thread_self 45 MOV X19, X0 46 BL lwp_aspace_switch 47 MOV X0, X19 48 BL lwp_user_setting_restore 49 #endif 50 LDP X2, X3, [SP], #0x10 /* SPSR and ELR. */ 51 52 TST X3, #0x1f 53 MSR SPSR_EL1, X3 54 MSR ELR_EL1, X2 55 56 LDP X29, X30, [SP], #0x10 57 MSR SP_EL0, X29 58 LDP X28, X29, [SP], #0x10 59 MSR FPCR, X28 60 MSR FPSR, X29 61 LDP X28, X29, [SP], #0x10 62 LDP X26, X27, [SP], #0x10 63 LDP X24, X25, [SP], #0x10 64 LDP X22, X23, [SP], #0x10 65 LDP X20, X21, [SP], #0x10 66 LDP X18, X19, [SP], #0x10 67 LDP X16, X17, [SP], #0x10 68 LDP X14, X15, [SP], #0x10 69 LDP X12, X13, [SP], #0x10 70 LDP X10, X11, [SP], #0x10 71 LDP X8, X9, [SP], #0x10 72 LDP X6, X7, [SP], #0x10 73 LDP X4, X5, [SP], #0x10 74 LDP X2, X3, [SP], #0x10 75 LDP X0, X1, [SP], #0x10 76 RESTORE_FPU SP 77 #ifdef RT_USING_SMART 78 BEQ arch_ret_to_user 79 #endif 80 ERET 81 .endm 82 83 #endif /* __ARM64_CONTEXT_H__ */ 84