1__heap_end = 0x010000;
2MEMORY
3{
4PAGE 0 :  /* Program Memory */
5          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
6          /* BEGIN is used for the "boot to Flash" bootloader mode   */
7
8   BEGIN           	: origin = 0x080000, length = 0x000002
9   RESET           	: origin = 0x3FFFC0, length = 0x000002
10   RAMGS8_15        : origin = 0x013000, length = 0x009000
11
12   /* Flash sectors */
13   FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
14   FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
15   FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
16   FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
17   FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
18   FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
19   FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
20   FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
21   FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
22   FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
23   FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
24   FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
25   FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
26   FLASHN           : origin = 0x0BE000, length = 0x002000	/* on-chip Flash */
27
28PAGE 1 : /* Data Memory */
29         /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
30   BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
31   RAMM0           : origin = 0x000122, length = 0x0002DE
32   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
33   EBSS	       	   : origin = 0x008000, length = 0x008000     /* RAMLS0-4, 5*0x0800   */
34   CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
35   CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
36}
37
38
39SECTIONS
40{
41   /* Allocate program areas: */
42   .cinit              : > FLASHF      PAGE = 0, ALIGN(4)
43   .init_array         : > FLASHF,     PAGE = 0, ALIGN(4)
44   .text               : > FLASHE      PAGE = 0, ALIGN(4)
45   codestart           : > BEGIN       PAGE = 0, ALIGN(4)
46
47#ifdef __TI_COMPILER_VERSION__
48   #if __TI_COMPILER_VERSION__ >= 15009000
49    .TI.ramfunc : {} LOAD = FLASHF,
50                         RUN = RAMGS8_15,
51                         LOAD_START(RamfuncsLoadStart),
52                         LOAD_SIZE(RamfuncsLoadSize),
53                         LOAD_END(RamfuncsLoadEnd),
54                         RUN_START(RamfuncsRunStart),
55                         RUN_SIZE(RamfuncsRunSize),
56                         RUN_END(RamfuncsRunEnd),
57                         PAGE = 0, ALIGN(4)
58   #else
59   ramfuncs            : LOAD = FLASHF,
60                         RUN = RAMGS8_15,
61                         LOAD_START(RamfuncsLoadStart),
62                         LOAD_SIZE(RamfuncsLoadSize),
63                         LOAD_END(RamfuncsLoadEnd),
64                         RUN_START(RamfuncsRunStart),
65                         RUN_SIZE(RamfuncsRunSize),
66                         RUN_END(RamfuncsRunEnd),
67                         PAGE = 0, ALIGN(4)
68   #endif
69#endif
70
71   FSymTab          : > RAMM1,     PAGE = 1
72               LOAD_START(__fsymtab_start)
73               LOAD_END(__fsymtab_end)
74   .rti_fn.0.end    : > RAMM1,     PAGE = 1
75   .rti_fn.0        : > RAMM1,     PAGE = 1
76   .rti_fn.1        : > RAMM1,     PAGE = 1
77   .rti_fn.2        : > RAMM1,     PAGE = 1
78   .rti_fn.3        : > RAMM1,     PAGE = 1
79   .rti_fn.4        : > RAMM1,     PAGE = 1
80   .rti_fn.5        : > RAMM1,     PAGE = 1
81   .rti_fn.1.end    : > RAMM1,     PAGE = 1
82   .rti_fn.6.end    : > RAMM1,     PAGE = 1
83   .rti_fn.6        : > RAMM1,     PAGE = 1
84
85   /* Allocate uninitalized data sections: */
86   .stack           : > RAMM1      PAGE = 1
87   .sysmem          : > RAMM1      PAGE = 1
88   .bss             : > EBSS,	   PAGE = 1
89   .data            : > EBSS,
90				    LOAD_END(__ebss_end),
91				    PAGE = 1
92
93   /* Initalized sections go in Flash */
94   .const              : > FLASHF      PAGE = 0, ALIGN(4)
95   .switch             : > FLASHF      PAGE = 0, ALIGN(4)
96   .reset              : > RESET,      PAGE = 0, TYPE = DSECT /* not used, */
97
98   /* The following section definitions are required when using the IPC API Drivers */
99    GROUP : > CPU1TOCPU2RAM, PAGE = 1
100    {
101        PUTBUFFER
102        PUTWRITEIDX
103        GETREADIDX
104    }
105
106    GROUP : > CPU2TOCPU1RAM, PAGE = 1
107    {
108        GETBUFFER :    TYPE = DSECT
109        GETWRITEIDX :  TYPE = DSECT
110        PUTREADIDX :   TYPE = DSECT
111    }
112
113}
114
115/*
116//===========================================================================
117// End of file.
118//===========================================================================
119*/
120