1 /* 2 ******************************************************************************* 3 * Copyright(C) NEC Electronics Corporation 2010 4 * All rights reserved by NEC Electronics Corporation. 5 * This program should be used on your own responsibility. 6 * NEC Electronics Corporation assumes no responsibility for any losses 7 * incurred by customers or third parties arising from the use of this file. 8 * 9 * This device driver was created by Applilet3 for V850ES/Jx3 10 * 32-Bit Single-Chip Microcontrollers 11 * Filename: CG_port.h 12 * Abstract: This file implements device driver for PORT module. 13 * APIlib: Applilet3 for V850ES/Jx3 V2.01 [20 Apr 2010] 14 * Device: uPD70F3746 15 * Compiler: IAR Systems ICCV850 16 * Creation date: 6/26/2010 17 ******************************************************************************* 18 */ 19 20 #ifndef _MDPORT_ 21 #define _MDPORT_ 22 /* 23 ******************************************************************************* 24 ** Register bit define 25 ******************************************************************************* 26 */ 27 /* Port mode control register (PMCn.7 - PMCn.0) */ 28 #define _00_PMCn0_OPER_PORT 0x00U /* Pn0 as port mode */ 29 #define _00_PMCn1_OPER_PORT 0x00U /* Pn1 as port mode */ 30 #define _00_PMCn2_OPER_PORT 0x00U /* Pn2 as port mode */ 31 #define _00_PMCn3_OPER_PORT 0x00U /* Pn3 as port mode */ 32 #define _00_PMCn4_OPER_PORT 0x00U /* Pn4 as port mode */ 33 #define _00_PMCn5_OPER_PORT 0x00U /* Pn5 as port mode */ 34 #define _00_PMCn6_OPER_PORT 0x00U /* Pn6 as port mode */ 35 #define _00_PMCn7_OPER_PORT 0x00U /* Pn7 as port mode */ 36 #define _01_PMCn0_OPER_ALTER 0x01U /* Pn0 as alternative mode */ 37 #define _02_PMCn1_OPER_ALTER 0x02U /* Pn1 as alternative mode */ 38 #define _04_PMCn2_OPER_ALTER 0x04U /* Pn2 as alternative mode */ 39 #define _08_PMCn3_OPER_ALTER 0x08U /* Pn3 as alternative mode */ 40 #define _10_PMCn4_OPER_ALTER 0x10U /* Pn4 as alternative mode */ 41 #define _20_PMCn5_OPER_ALTER 0x20U /* Pn5 as alternative mode */ 42 #define _40_PMCn6_OPER_ALTER 0x40U /* Pn6 as alternative mode */ 43 #define _80_PMCn7_OPER_ALTER 0x80U /* Pn7 as alternative mode */ 44 #define _00_PMCn0_OPER_OCD 0x00U /* PMC0 for MINI2 */ 45 46 /* Port mode register (PMn.7 - PMn.0) */ 47 #define _01_PMn0_MODE_INPUT 0x01U /* Pn0 as input mode */ 48 #define _02_PMn1_MODE_INPUT 0x02U /* Pn1 as input mode */ 49 #define _04_PMn2_MODE_INPUT 0x04U /* Pn2 as input mode */ 50 #define _08_PMn3_MODE_INPUT 0x08U /* Pn3 as input mode */ 51 #define _10_PMn4_MODE_INPUT 0x10U /* Pn4 as input mode */ 52 #define _20_PMn5_MODE_INPUT 0x20U /* Pn5 as input mode */ 53 #define _40_PMn6_MODE_INPUT 0x40U /* Pn6 as input mode */ 54 #define _80_PMn7_MODE_INPUT 0x80U /* Pn7 as input mode */ 55 #define _00_PMn0_MODE_OUTPUT 0x00U /* Pn0 as output mode */ 56 #define _00_PMn1_MODE_OUTPUT 0x00U /* Pn1 as output mode */ 57 #define _00_PMn2_MODE_OUTPUT 0x00U /* Pn2 as output mode */ 58 #define _00_PMn3_MODE_OUTPUT 0x00U /* Pn3 as output mode */ 59 #define _00_PMn4_MODE_OUTPUT 0x00U /* Pn4 as output mode */ 60 #define _00_PMn5_MODE_OUTPUT 0x00U /* Pn5 as output mode */ 61 #define _00_PMn6_MODE_OUTPUT 0x00U /* Pn6 as output mode */ 62 #define _00_PMn7_MODE_OUTPUT 0x00U /* Pn7 as output mode */ 63 #define _01_PMn0_MODE_UNUSED 0x01U /* Pn0 as default mode */ 64 #define _02_PMn1_MODE_UNUSED 0x02U /* Pn1 as default mode */ 65 #define _04_PMn2_MODE_UNUSED 0x04U /* Pn2 as default mode */ 66 #define _08_PMn3_MODE_UNUSED 0x08U /* Pn3 as default mode */ 67 #define _10_PMn4_MODE_UNUSED 0x10U /* Pn4 as default mode */ 68 #define _20_PMn5_MODE_UNUSED 0x20U /* Pn5 as default mode */ 69 #define _40_PMn6_MODE_UNUSED 0x40U /* Pn6 as default mode */ 70 #define _80_PMn7_MODE_UNUSED 0x80U /* Pn7 as default mode */ 71 #define _00_PMn0_MODE_OCD 0x00U /* PMC0 for MINI2 */ 72 73 /* Port register (Pn.7 - Pn.0) */ 74 #define _00_Pn0_OUTPUT_0 0x00U /* Pn0 output 0 */ 75 #define _00_Pn1_OUTPUT_0 0x00U /* Pn1 output 0 */ 76 #define _00_Pn2_OUTPUT_0 0x00U /* Pn2 output 0 */ 77 #define _00_Pn3_OUTPUT_0 0x00U /* Pn3 output 0 */ 78 #define _00_Pn4_OUTPUT_0 0x00U /* Pn4 output 0 */ 79 #define _00_Pn5_OUTPUT_0 0x00U /* Pn5 output 0 */ 80 #define _00_Pn6_OUTPUT_0 0x00U /* Pn6 output 0 */ 81 #define _00_Pn7_OUTPUT_0 0x00U /* Pn7 output 0 */ 82 #define _01_Pn0_OUTPUT_1 0x01U /* Pn0 output 1 */ 83 #define _02_Pn1_OUTPUT_1 0x02U /* Pn1 output 1 */ 84 #define _04_Pn2_OUTPUT_1 0x04U /* Pn2 output 1 */ 85 #define _08_Pn3_OUTPUT_1 0x08U /* Pn3 output 1 */ 86 #define _10_Pn4_OUTPUT_1 0x10U /* Pn4 output 1 */ 87 #define _20_Pn5_OUTPUT_1 0x20U /* Pn5 output 1 */ 88 #define _40_Pn6_OUTPUT_1 0x40U /* Pn6 output 1 */ 89 #define _80_Pn7_OUTPUT_1 0x80U /* Pn7 output 1 */ 90 91 /* Function register resistor (PFn.7 - PFn.0) */ 92 #define _00_PFn0_FUN_NORMAL 0x00U /* Pn0 normal output */ 93 #define _00_PFn1_FUN_NORMAL 0x00U /* Pn1 normal output */ 94 #define _00_PFn2_FUN_NORMAL 0x00U /* Pn2 normal output */ 95 #define _00_PFn3_FUN_NORMAL 0x00U /* Pn3 normal output */ 96 #define _00_PFn4_FUN_NORMAL 0x00U /* Pn4 normal output */ 97 #define _00_PFn5_FUN_NORMAL 0x00U /* Pn5 normal output */ 98 #define _00_PFn6_FUN_NORMAL 0x00U /* Pn6 normal output */ 99 #define _00_PFn7_FUN_NORMAL 0x00U /* Pn7 normal output */ 100 #define _01_PFn0_FUN_OPEN 0x01U /* Pn0 open-drain output */ 101 #define _02_PFn1_FUN_OPEN 0x02U /* Pn1 open-drain output */ 102 #define _04_PFn2_FUN_OPEN 0x04U /* Pn2 open-drain output */ 103 #define _08_PFn3_FUN_OPEN 0x08U /* Pn3 open-drain output */ 104 #define _10_PFn4_FUN_OPEN 0x10U /* Pn4 open-drain output */ 105 #define _20_PFn5_FUN_OPEN 0x20U /* Pn5 open-drain output */ 106 #define _40_PFn6_FUN_OPEN 0x40U /* Pn6 open-drain output */ 107 #define _80_PFn7_FUN_OPEN 0x80U /* Pn7 open-drain output */ 108 /* 109 ******************************************************************************* 110 ** Macro define 111 ******************************************************************************* 112 */ 113 #define _80_PM0_DEFAULT 0x80U /* PM0 default value */ 114 #define _FC_PM1_DEFAULT 0xFCU /* PM1 default value */ 115 #define _FC_PM3H_DEFAULT 0xFCU /* PM3H default value */ 116 #define _F8_PM4_DEFAULT 0xF8U /* PM4 default value */ 117 #define _C0_PM5_DEFAULT 0xC0U /* PM5 default value */ 118 #define _FC_PM8_DEFAULT 0xFCU /* PM8 default value */ 119 #define _F0_PMCD_DEFAULT 0xF0U /* PMCD default value */ 120 /* 121 ******************************************************************************* 122 ** Function define 123 ******************************************************************************* 124 */ 125 void PORT_Init(void); 126 void led_on(void); 127 void led_off(void); 128 /* Start user code for function. Do not edit comment generated here */ 129 /* End user code. Do not edit comment generated here */ 130 #endif 131