1;/****************************************************************************** 2;* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved. 3;* 4;* This software is owned and published by: 5;* Huada Semiconductor Co.,Ltd ("HDSC"). 6;* 7;* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND 8;* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT. 9;* 10;* This software contains source code for use with HDSC 11;* components. This software is licensed by HDSC to be adapted only 12;* for use in systems utilizing HDSC components. HDSC shall not be 13;* responsible for misuse or illegal use of this software for devices not 14;* supported herein. HDSC is providing this software "AS IS" and will 15;* not be responsible for issues arising from incorrect user implementation 16;* of the software. 17;* 18;* Disclaimer: 19;* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE, 20;* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS), 21;* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING, 22;* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED 23;* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED 24;* WARRANTY OF NONINFRINGEMENT. 25;* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT, 26;* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT 27;* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, 28;* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR 29;* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT, 30;* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA, 31;* SAVINGS OR PROFITS, 32;* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 33;* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR 34;* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED 35;* FROM, THE SOFTWARE. 36;* 37;* This software may be replicated in part or whole for the licensed use, 38;* with the restriction that this Disclaimer and Copyright notice must be 39;* included with each copy of this software, whether used in part or whole, 40;* at all times. 41;*/ 42;/*****************************************************************************/ 43 44;/*****************************************************************************/ 45;/* Startup for ARM */ 46;/* Version V1.0 */ 47;/* Date 2018-04-15 */ 48;/* Target-mcu {HC32L136} */ 49;/*****************************************************************************/ 50 51; Stack Configuration 52; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 53 54Stack_Size EQU 0x00000200 55 56 AREA STACK, NOINIT, READWRITE, ALIGN=3 57Stack_Mem SPACE Stack_Size 58__initial_sp 59 60 61; Heap Configuration 62; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 63 64Heap_Size EQU 0x00000200 65 66 AREA HEAP, NOINIT, READWRITE, ALIGN=3 67__heap_base 68Heap_Mem SPACE Heap_Size 69__heap_limit 70 71 72 PRESERVE8 73 THUMB 74 75 76; Vector Table Mapped to Address 0 at Reset 77 78 AREA RESET, DATA, READONLY 79 EXPORT __Vectors 80 EXPORT __Vectors_End 81 EXPORT __Vectors_Size 82 83__Vectors DCD __initial_sp ; Top of Stack 84 DCD Reset_Handler ; Reset 85 DCD NMI_Handler ; NMI 86 DCD HardFault_Handler ; Hard Fault 87 DCD 0 ; Reserved 88 DCD 0 ; Reserved 89 DCD 0 ; Reserved 90 DCD 0 ; Reserved 91 DCD 0 ; Reserved 92 DCD 0 ; Reserved 93 DCD 0 ; Reserved 94 DCD SVC_Handler ; SVCall 95 DCD 0 ; Reserved 96 DCD 0 ; Reserved 97 DCD PendSV_Handler ; PendSV 98 DCD SysTick_Handler ; SysTick 99 100 DCD IRQ000_Handler ; 101 DCD IRQ001_Handler ; 102 DCD IRQ002_Handler ; 103 DCD IRQ003_Handler ; 104 DCD IRQ004_Handler ; 105 DCD IRQ005_Handler ; 106 DCD IRQ006_Handler ; 107 DCD IRQ007_Handler ; 108 DCD IRQ008_Handler ; 109 DCD IRQ009_Handler ; 110 DCD IRQ010_Handler ; 111 DCD IRQ011_Handler ; 112 DCD IRQ012_Handler ; 113 DCD IRQ013_Handler ; 114 DCD IRQ014_Handler ; 115 DCD IRQ015_Handler ; 116 DCD IRQ016_Handler ; 117 DCD IRQ017_Handler ; 118 DCD IRQ018_Handler ; 119 DCD IRQ019_Handler ; 120 DCD IRQ020_Handler ; 121 DCD IRQ021_Handler ; 122 DCD IRQ022_Handler ; 123 DCD IRQ023_Handler ; 124 DCD IRQ024_Handler ; 125 DCD IRQ025_Handler ; 126 DCD IRQ026_Handler ; 127 DCD IRQ027_Handler ; 128 DCD IRQ028_Handler ; 129 DCD IRQ029_Handler ; 130 DCD IRQ030_Handler ; 131 DCD IRQ031_Handler ; 132 133__Vectors_End 134 135__Vectors_Size EQU __Vectors_End - __Vectors 136 137 AREA |.text|, CODE, READONLY 138 139 140; Reset Handler 141 142Reset_Handler PROC 143 EXPORT Reset_Handler [WEAK] 144 IMPORT SystemInit 145 IMPORT __main 146 147 ;reset NVIC if in rom debug 148 LDR R0, =0x20000000 149 LDR R2, =0x0 150 MOVS R1, #0 ; for warning, 151 ADD R1, PC,#0 ; for A1609W, 152 CMP R1, R0 153 BLS RAMCODE 154 155 ; ram code base address. 156 ADD R2, R0,R2 157RAMCODE 158 ; reset Vector table address. 159 LDR R0, =0xE000ED08 160 STR R2, [R0] 161 162 LDR R0, =SystemInit 163 BLX R0 164 LDR R0, =__main 165 BX R0 166 ENDP 167 168 169; Dummy Exception Handlers (infinite loops which can be modified) 170 171NMI_Handler PROC 172 EXPORT NMI_Handler [WEAK] 173 B . 174 ENDP 175HardFault_Handler\ 176 PROC 177 EXPORT HardFault_Handler [WEAK] 178 B . 179 ENDP 180SVC_Handler PROC 181 EXPORT SVC_Handler [WEAK] 182 B . 183 ENDP 184PendSV_Handler PROC 185 EXPORT PendSV_Handler [WEAK] 186 B . 187 ENDP 188SysTick_Handler PROC 189 EXPORT SysTick_Handler [WEAK] 190 B . 191 ENDP 192 193Default_Handler PROC 194 195 EXPORT IRQ000_Handler [WEAK] 196 EXPORT IRQ001_Handler [WEAK] 197 EXPORT IRQ002_Handler [WEAK] 198 EXPORT IRQ003_Handler [WEAK] 199 EXPORT IRQ004_Handler [WEAK] 200 EXPORT IRQ005_Handler [WEAK] 201 EXPORT IRQ006_Handler [WEAK] 202 EXPORT IRQ007_Handler [WEAK] 203 EXPORT IRQ008_Handler [WEAK] 204 EXPORT IRQ009_Handler [WEAK] 205 EXPORT IRQ010_Handler [WEAK] 206 EXPORT IRQ011_Handler [WEAK] 207 EXPORT IRQ012_Handler [WEAK] 208 EXPORT IRQ013_Handler [WEAK] 209 EXPORT IRQ014_Handler [WEAK] 210 EXPORT IRQ015_Handler [WEAK] 211 EXPORT IRQ016_Handler [WEAK] 212 EXPORT IRQ017_Handler [WEAK] 213 EXPORT IRQ018_Handler [WEAK] 214 EXPORT IRQ019_Handler [WEAK] 215 EXPORT IRQ020_Handler [WEAK] 216 EXPORT IRQ021_Handler [WEAK] 217 EXPORT IRQ022_Handler [WEAK] 218 EXPORT IRQ023_Handler [WEAK] 219 EXPORT IRQ024_Handler [WEAK] 220 EXPORT IRQ025_Handler [WEAK] 221 EXPORT IRQ026_Handler [WEAK] 222 EXPORT IRQ027_Handler [WEAK] 223 EXPORT IRQ028_Handler [WEAK] 224 EXPORT IRQ029_Handler [WEAK] 225 EXPORT IRQ030_Handler [WEAK] 226 EXPORT IRQ031_Handler [WEAK] 227 228 229IRQ000_Handler 230IRQ001_Handler 231IRQ002_Handler 232IRQ003_Handler 233IRQ004_Handler 234IRQ005_Handler 235IRQ006_Handler 236IRQ007_Handler 237IRQ008_Handler 238IRQ009_Handler 239IRQ010_Handler 240IRQ011_Handler 241IRQ012_Handler 242IRQ013_Handler 243IRQ014_Handler 244IRQ015_Handler 245IRQ016_Handler 246IRQ017_Handler 247IRQ018_Handler 248IRQ019_Handler 249IRQ020_Handler 250IRQ021_Handler 251IRQ022_Handler 252IRQ023_Handler 253IRQ024_Handler 254IRQ025_Handler 255IRQ026_Handler 256IRQ027_Handler 257IRQ028_Handler 258IRQ029_Handler 259IRQ030_Handler 260IRQ031_Handler 261 B . 262 263 ENDP 264 265 266 ALIGN 267 268 269; User Initial Stack & Heap 270 271 IF :DEF:__MICROLIB 272 273 EXPORT __initial_sp 274 EXPORT __heap_base 275 EXPORT __heap_limit 276 277 ELSE 278 279 IMPORT __use_two_region_memory 280 EXPORT __user_initial_stackheap 281__user_initial_stackheap 282 283 LDR R0, = Heap_Mem 284 LDR R1, =(Stack_Mem + Stack_Size) 285 LDR R2, = (Heap_Mem + Heap_Size) 286 LDR R3, = Stack_Mem 287 BX LR 288 289 ALIGN 290 291 ENDIF 292 293 294 END 295