1 /*
2 * Copyright 2021 MindMotion Microelectronics Co., Ltd.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include "hal_fsmc.h"
9
10 const uint32_t FSMC_BankBases[] =
11 {
12 FSMC_BANK0_BASE,
13 FSMC_BANK1_BASE,
14 FSMC_BANK2_BASE,
15 FSMC_BANK3_BASE
16 };
17
FSMC_Init(FSMC_Type * FSMCx,FSMC_Init_Type * init)18 void FSMC_Init(FSMC_Type * FSMCx, FSMC_Init_Type * init)
19 {
20 FSMCx->SMSKR0 = ( (FSMCx->SMSKR0 & ~(FSMC_SMSKR0_MEMSIZE_MASK | FSMC_SMSKR0_MEMTYPE_MASK) )
21 | FSMC_SMSKR0_MEMSIZE(init->MemSize)
22 | FSMC_SMSKR0_MEMTYPE(init->MemType) )
23 ;
24 }
25
FSMC_SetConf(FSMC_Type * FSMCx,uint32_t index,FSMC_Conf_Type * init)26 void FSMC_SetConf(FSMC_Type * FSMCx, uint32_t index, FSMC_Conf_Type * init)
27 {
28 if (index >= FSMC_SMTMGR_REG_NUM)
29 {
30 return;
31 }
32 FSMCx->SMTMGRSET[index] = FSMC_SMTMGRSET_TRC(init->ReadPeriod)
33 | FSMC_SMTMGRSET_TAS(init->AddrSetTime)
34 | FSMC_SMTMGRSET_TWR(init->WriteHoldTime)
35 | FSMC_SMTMGRSET_TWP(init->WritePeriod)
36 | FSMC_SMTMGRSET_READYMODE(init->ReadySignal)
37 | FSMC_SMTMGRSET_SMREADPIPE(init->SMReadPipe)
38 ;
39 switch (index)
40 {
41 case 0u:
42 FSMCx->SMCTLR = ( (FSMCx->SMCTLR & ~FSMC_SMCTLR_SMDATAWIDTHSET0_MASK)
43 | FSMC_SMCTLR_SMDATAWIDTHSET0(init->BusWidth) )
44 ;
45 break;
46 case 1u:
47 FSMCx->SMCTLR = ( (FSMCx->SMCTLR & ~FSMC_SMCTLR_SMDATAWIDTHSET1_MASK)
48 | FSMC_SMCTLR_SMDATAWIDTHSET1(init->BusWidth) )
49 ;
50 break;
51 case 2u:
52 FSMCx->SMCTLR = ( (FSMCx->SMCTLR & ~FSMC_SMCTLR_SMDATAWIDTHSET2_MASK)
53 | FSMC_SMCTLR_SMDATAWIDTHSET2(init->BusWidth) )
54 ;
55 break;
56 default:
57 break;
58 }
59 }
60
61 /* only last enabled bankn is available. */
FSMC_EnableConf(FSMC_Type * FSMCx,uint32_t index)62 void FSMC_EnableConf(FSMC_Type * FSMCx, uint32_t index)
63 {
64 if (index >= FSMC_SMTMGR_REG_NUM)
65 {
66 return;
67 }
68 FSMCx->SMSKR0 = ( (FSMCx->SMSKR0 & ~FSMC_SMSKR0_REGSELECT_MASK)
69 | FSMC_SMSKR0_REGSELECT(index) )
70 ;
71 }
72
FSMC_PutData32(FSMC_Type * FSMCx,uint32_t bankn,uint32_t offset,uint32_t data)73 void FSMC_PutData32(FSMC_Type * FSMCx, uint32_t bankn, uint32_t offset, uint32_t data)
74 {
75 (void)FSMCx;
76 *( (uint32_t *)(FSMC_BankBases[bankn] + offset) ) = data;
77 }
78
FSMC_GetData32(FSMC_Type * FSMCx,uint32_t bankn,uint32_t offset)79 uint32_t FSMC_GetData32(FSMC_Type * FSMCx, uint32_t bankn, uint32_t offset)
80 {
81 (void)FSMCx;
82 return (*( (uint32_t *)(FSMC_BankBases[bankn] + offset) ) );
83 }
84
FSMC_GetXferDataRegAddr(FSMC_Type * FSMCx,uint32_t bankn,uint32_t offset)85 uint32_t FSMC_GetXferDataRegAddr(FSMC_Type *FSMCx, uint32_t bankn, uint32_t offset)
86 {
87 (void)FSMCx;
88 return (FSMC_BankBases[bankn] + offset);
89 }
90
FSMC_PutData16(FSMC_Type * FSMCx,uint32_t bankn,uint32_t offset,uint16_t data)91 void FSMC_PutData16(FSMC_Type * FSMCx, uint32_t bankn, uint32_t offset, uint16_t data)
92 {
93 (void)FSMCx;
94 *( (uint16_t *)(FSMC_BankBases[bankn] + offset) ) = data;
95 }
96
FSMC_GetData16(FSMC_Type * FSMCx,uint32_t bankn,uint32_t offset)97 uint16_t FSMC_GetData16(FSMC_Type * FSMCx, uint32_t bankn, uint32_t offset)
98 {
99 (void)FSMCx;
100 return (*( (uint16_t *)(FSMC_BankBases[bankn] + offset) ) );
101 }
102
FSMC_PutData8(FSMC_Type * FSMCx,uint32_t bankn,uint32_t offset,uint8_t data)103 void FSMC_PutData8(FSMC_Type * FSMCx, uint32_t bankn, uint32_t offset, uint8_t data)
104 {
105 (void)FSMCx;
106 *( (uint8_t *)(FSMC_BankBases[bankn] + offset) ) = data;
107 }
108
FSMC_GetData8(FSMC_Type * FSMCx,uint32_t bankn,uint32_t offset)109 uint8_t FSMC_GetData8(FSMC_Type * FSMCx, uint32_t bankn, uint32_t offset)
110 {
111 (void)FSMCx;
112 return (*( (uint8_t *)(FSMC_BankBases[bankn] + offset) ) );
113 }
114
115 /* EOF. */
116
117