1 /** @file mibspi.h 2 * @brief MIBSPI Driver Definition File 3 * @date 29.May.2013 4 * @version 03.05.02 5 * 6 */ 7 8 /* (c) Texas Instruments 2009-2013, All rights reserved. */ 9 10 11 #ifndef __MIBSPI_H__ 12 #define __MIBSPI_H__ 13 14 #include "reg_mibspi.h" 15 16 17 /** @enum triggerEvent 18 * @brief Transfer Group Trigger Event 19 */ 20 enum triggerEvent 21 { 22 TRG_NEVER = 0U, 23 TRG_RISING = 1U, 24 TRG_FALLING = 2U, 25 TRG_BOTH = 3U, 26 TRG_HIGH = 5U, 27 TRG_LOW = 6U, 28 TRG_ALWAYS = 7U 29 }; 30 31 /** @enum triggerSource 32 * @brief Transfer Group Trigger Source 33 */ 34 enum triggerSource 35 { 36 TRG_DISABLED, 37 TRG_GIOA0, 38 TRG_GIOA1, 39 TRG_GIOA2, 40 TRG_GIOA3, 41 TRG_GIOA4, 42 TRG_GIOA5, 43 TRG_GIOA6, 44 TRG_GIOA7, 45 TRG_HET1_8, 46 TRG_HET1_10, 47 TRG_HET1_12, 48 TRG_HET1_14, 49 TRG_HET1_16, 50 TRG_HET1_18, 51 TRG_TICK 52 }; 53 54 55 /** @enum mibspiPinSelect 56 * @brief mibspi Pin Select 57 */ 58 enum mibspiPinSelect 59 { 60 PIN_CS0 = 0U, 61 PIN_CS1 = 1U, 62 PIN_CS2 = 2U, 63 PIN_CS3 = 3U, 64 PIN_CS4 = 4U, 65 PIN_CS5 = 5U, 66 PIN_CS6 = 6U, 67 PIN_CS7 = 7U, 68 PIN_ENA = 8U, 69 PIN_CLK = 9U, 70 PIN_SIMO = 10U, 71 PIN_SOMI = 11U, 72 PIN_SIMO_1 = 17U, 73 PIN_SIMO_2 = 18U, 74 PIN_SIMO_3 = 19U, 75 PIN_SIMO_4 = 20U, 76 PIN_SIMO_5 = 21U, 77 PIN_SIMO_6 = 22U, 78 PIN_SIMO_7 = 23U, 79 PIN_SOMI_1 = 25U, 80 PIN_SOMI_2 = 26U, 81 PIN_SOMI_3 = 27U, 82 PIN_SOMI_4 = 28U, 83 PIN_SOMI_5 = 29U, 84 PIN_SOMI_6 = 30U, 85 PIN_SOMI_7 = 31U 86 }; 87 88 89 /** @enum chipSelect 90 * @brief Transfer Group Chip Select 91 */ 92 enum chipSelect 93 { 94 CS_NONE = 0xFFU, 95 CS_0 = 0xFEU, 96 CS_1 = 0xFDU, 97 CS_2 = 0xFBU, 98 CS_3 = 0xF7U, 99 CS_4 = 0xEFU, 100 CS_5 = 0xDFU, 101 CS_6 = 0xBFU, 102 CS_7 = 0x7FU 103 }; 104 105 /** 106 * @defgroup MIBSPI MIBSPI 107 * @brief Multi-Buffered Serial Peripheral Interface Module. 108 * 109 * The MibSPI/MibSPIP is a high-speed synchronous serial input/output port that allows a serial bit stream of 110 * programmed length (2 to 16 bits) to be shifted in and out of the device at a programmed bit-transfer rate. 111 * The MibSPI has a programmable buffer memory that enables programmed transmission to be completed 112 * without CPU intervention 113 * 114 * Related Files 115 * - reg_mibspi.h 116 * - mibspi.h 117 * - mibspi.c 118 * @addtogroup MIBSPI 119 * @{ 120 */ 121 122 /* MIBSPI Interface Functions */ 123 void mibspiInit(void); 124 void mibspiSetFunctional(mibspiBASE_t *mibspi, uint32 port); 125 void mibspiSetData(mibspiBASE_t *mibspi, uint32 group, uint16 * data); 126 uint32 mibspiGetData(mibspiBASE_t *mibspi, uint32 group, uint16 * data); 127 void mibspiTransfer(mibspiBASE_t *mibspi, uint32 group); 128 boolean mibspiIsTransferComplete(mibspiBASE_t *mibspi, uint32 group); 129 void mibspiEnableGroupNotification(mibspiBASE_t *mibspi, uint32 group, uint32 level); 130 void mibspiDisableGroupNotification(mibspiBASE_t *mibspi, uint32 group); 131 void mibspiEnableLoopback(mibspiBASE_t *mibspi, loopBackType_t Loopbacktype); 132 void mibspiDisableLoopback(mibspiBASE_t *mibspi); 133 134 135 /** @fn void mibspiNotification(mibspiBASE_t *mibspi, uint32 flags) 136 * @brief Error interrupt callback 137 * @param[in] mibspi - mibSpi module base address 138 * @param[in] flags - Copy of error interrupt flags 139 * 140 * This is a error callback that is provided by the application and is call upon 141 * an error interrupt. The paramer passed to the callback is a copy of the error 142 * interrupt flag register. 143 */ 144 void mibspiNotification(mibspiBASE_t *mibspi, uint32 flags); 145 146 147 /** @fn void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32 group) 148 * @brief Transfer complete notification callback 149 * @param[in] mibspi - mibSpi module base address 150 * @param[in] group - Transfer group 151 * 152 * This is a callback function provided by the application. It is call when 153 * a transfer is complete. The parameter is the transfer group that triggered 154 * the interrupt. 155 */ 156 void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32 group); 157 158 /**@}*/ 159 #endif 160