1 /*""FILE COMMENT""******************************************************* 2 * System Name : Interrupt program for RX62Nx 3 * File Name : Interrupt_IIC.c 4 * Version : 1.02 5 * Contents : Interrupt handlers for all IIC channels 6 * Customer : 7 * Model : 8 * Order : 9 * CPU : RX 10 * Compiler : RXC 11 * OS : Nothing 12 * Programmer : 13 * Note : 14 ************************************************************************ 15 * Copyright, 2011. Renesas Electronics Corporation 16 * and Renesas Solutions Corporation 17 ************************************************************************ 18 * History : 2011.04.08 19 * : Ver 1.02 20 * : CS-5 release. 21 *""FILE COMMENT END""**************************************************/ 22 23 #include "r_pdl_iic.h" 24 #include "r_pdl_definitions.h" 25 #include "r_pdl_user_definitions.h" 26 27 /* For DMAC support */ 28 #define DMCNT_ADDRESS(a) ((volatile uint8_t *)&DMAC0.DMCNT + ((0x40u * a) / sizeof( uint8_t)) ) 29 30 /* External functions */ 31 extern void Store_detected_address(const uint8_t); 32 33 /*""FUNC COMMENT""*************************************************** 34 * Module outline: IICn event interrupt processing 35 *------------------------------------------------------------------- 36 * Declaration : void InterruptIIC_ICEEIn(void) 37 *------------------------------------------------------------------- 38 * Function : 39 *------------------------------------------------------------------- 40 * Argument : Nothing 41 *------------------------------------------------------------------- 42 * Return value : Nothing 43 *------------------------------------------------------------------- 44 * Output : 45 *------------------------------------------------------------------- 46 * Use function : 47 *------------------------------------------------------------------- 48 * Notes : 49 *------------------------------------------------------------------- 50 * History : 2011.04.08 51 * : Ver 1.02 52 * : CS-5 release. 53 *""FUNC COMMENT END""**********************************************/ 54 55 #if FAST_INTC_VECTOR == VECT_RIIC0_ICEEI0 Interrupt_IIC_ICEEI0(void)56__fast_interrupt void Interrupt_IIC_ICEEI0(void) 57 #else 58 #pragma vector = VECT_RIIC0_ICEEI0 59 __interrupt void Interrupt_IIC_ICEEI0(void) 60 #endif 61 { 62 uint8_t valid_flags; 63 volatile uint8_t unwanted_byte; 64 65 /* Read the status register */ 66 valid_flags = RIIC0.ICSR2.BYTE; 67 68 /* Remove any that are not enabled */ 69 valid_flags &= RIIC0.ICIER.BYTE; 70 71 /* Remove the transmit and receive flags */ 72 valid_flags &= 0x1Fu; 73 74 /* Start or Repeated Start detected? */ 75 if ((valid_flags & BIT_2) != 0x0u) 76 { 77 /* Decide what to send */ 78 switch(rpdl_IIC_next_state[0]) 79 { 80 case IIC_MASTER_SEND_SLAVE_ADDRESS_7: 81 /* Send the slave address */ 82 RIIC0.ICDRT = rpdl_IIC_slave_address_lower[0]; 83 84 /* Transmit mode? */ 85 if ((rpdl_IIC_slave_address_lower[0] & BIT_0) == 0) 86 { 87 rpdl_IIC_current_state[0] = IIC_MASTER_SEND_DATA; 88 } 89 else 90 { 91 rpdl_IIC_current_state[0] = IIC_MASTER_START_READ; 92 } 93 break; 94 case IIC_MASTER_SEND_SLAVE_ADDRESS_10a: 95 rpdl_IIC_current_state[0] = IIC_MASTER_SEND_SLAVE_ADDRESS_10b; 96 97 /* Send the first part of the slave address */ 98 RIIC0.ICDRT = rpdl_IIC_slave_address_upper[0]; 99 break; 100 default: 101 break; 102 } 103 104 /* Were we expecting data? */ 105 if (rpdl_IIC_current_state[0] == IIC_SLAVE_READ_DATA) 106 { 107 /* Go back to checking for a device address */ 108 rpdl_IIC_current_state[0] = IIC_SLAVE_MONITOR; 109 110 /* Disable Start detection */ 111 RIIC0.ICIER.BIT.STIE = 0; 112 } 113 114 /* Clear the flag */ 115 RIIC0.ICSR2.BIT.START = 0; 116 } 117 /* NACK detected? */ 118 else if ((valid_flags & BIT_4) != 0x0u) 119 { 120 /* Disable NACK interrupt request generation */ 121 RIIC0.ICIER.BIT.NAKIE = 0; 122 123 /* Failed transmission of data? */ 124 if (rpdl_IIC_current_state[0] == IIC_MASTER_SEND_DATA) 125 { 126 /* Decrement the counter */ 127 rpdl_IIC_tx_counter[0]--; 128 129 /* Call the callback function */ 130 if (rpdl_IIC_callback_func[0] != PDL_NO_FUNC) 131 { 132 rpdl_IIC_callback_func[0](); 133 } 134 } 135 /* NACK received from the master? */ 136 else 137 { 138 /* Do a dummy read to release SCL */ 139 unwanted_byte = RIIC0.ICDRR; 140 } 141 } 142 else 143 { 144 /* Disable all interrupt request generation */ 145 RIIC0.ICIER.BYTE = 0x00u; 146 147 /* Call the callback function */ 148 if (rpdl_IIC_callback_func[0] != PDL_NO_FUNC) 149 { 150 rpdl_IIC_callback_func[0](); 151 } 152 } 153 } 154 155 #if FAST_INTC_VECTOR == VECT_RIIC1_ICEEI1 Interrupt_IIC_ICEEI1(void)156__fast_interrupt void Interrupt_IIC_ICEEI1(void) 157 #else 158 #pragma vector = VECT_RIIC1_ICEEI1 159 __interrupt void Interrupt_IIC_ICEEI1(void) 160 #endif 161 { 162 #ifdef DEVICE_PACKAGE_LQFP_100 163 /* This channel is not available on the 100-pin package */ 164 nop(); 165 #else 166 uint8_t valid_flags; 167 volatile uint8_t unwanted_byte; 168 169 /* Read the status register */ 170 valid_flags = RIIC1.ICSR2.BYTE; 171 /* Remove any that are not enabled */ 172 valid_flags &= RIIC1.ICIER.BYTE; 173 /* Remove the transmit and receive flags */ 174 valid_flags &= 0x1Fu; 175 176 /* Start or Repeated Start detected? */ 177 if ((valid_flags & BIT_2) != 0x0u) 178 { 179 /* Decide what to send */ 180 switch(rpdl_IIC_next_state[1]) 181 { 182 case IIC_MASTER_SEND_SLAVE_ADDRESS_7: 183 /* Send the slave address */ 184 RIIC1.ICDRT = rpdl_IIC_slave_address_lower[1]; 185 186 /* Transmit mode? */ 187 if ((rpdl_IIC_slave_address_lower[1] & BIT_0) == 0) 188 { 189 rpdl_IIC_current_state[1] = IIC_MASTER_SEND_DATA; 190 } 191 else 192 { 193 rpdl_IIC_current_state[1] = IIC_MASTER_START_READ; 194 } 195 break; 196 case IIC_MASTER_SEND_SLAVE_ADDRESS_10a: 197 rpdl_IIC_current_state[1] = IIC_MASTER_SEND_SLAVE_ADDRESS_10b; 198 199 /* Send the first part of the slave address */ 200 RIIC1.ICDRT = rpdl_IIC_slave_address_upper[1]; 201 break; 202 default: 203 break; 204 } 205 206 /* Were we expecting data? */ 207 if (rpdl_IIC_current_state[1] == IIC_SLAVE_READ_DATA) 208 { 209 /* Go back to checking for a device address */ 210 rpdl_IIC_current_state[1] = IIC_SLAVE_MONITOR; 211 212 /* Disable Start detection */ 213 RIIC1.ICIER.BIT.STIE = 0; 214 } 215 216 /* Clear the flag */ 217 RIIC1.ICSR2.BIT.START = 0; 218 } 219 /* NACK detected? */ 220 else if ((valid_flags & BIT_4) != 0x0u) 221 { 222 /* Disable NACK interrupt request generation */ 223 RIIC1.ICIER.BIT.NAKIE = 0; 224 225 /* Failed transmission of data? */ 226 if (rpdl_IIC_current_state[1] == IIC_MASTER_SEND_DATA) 227 { 228 /* Decrement the counter */ 229 rpdl_IIC_tx_counter[1]--; 230 231 /* Call the callback function */ 232 if (rpdl_IIC_callback_func[1] != PDL_NO_FUNC) 233 { 234 rpdl_IIC_callback_func[1](); 235 } 236 } 237 /* NACK received from the master? */ 238 else 239 { 240 /* Do a dummy read to release SCL */ 241 unwanted_byte = RIIC1.ICDRR; 242 } 243 } 244 else 245 { 246 /* Disable all interrupt request generation */ 247 RIIC1.ICIER.BYTE = 0x00u; 248 249 /* Call the callback function */ 250 if (rpdl_IIC_callback_func[1] != PDL_NO_FUNC) 251 { 252 rpdl_IIC_callback_func[1](); 253 } 254 } 255 #endif 256 } 257 258 /*""FUNC COMMENT""*************************************************** 259 * Module outline: IICn receive data interrupt processing 260 *------------------------------------------------------------------- 261 * Declaration : void Interrupt_IIC_ICRXIn(void) 262 *------------------------------------------------------------------- 263 * Function : 264 *------------------------------------------------------------------- 265 * Argument : Nothing 266 *------------------------------------------------------------------- 267 * Return value : Nothing 268 *------------------------------------------------------------------- 269 * Output : ICDRR, ICIER 270 *------------------------------------------------------------------- 271 * Use function : 272 *------------------------------------------------------------------- 273 * Notes : 274 *------------------------------------------------------------------- 275 * History : 2011.04.08 276 * : Ver 1.02 277 * : CS-5 release. 278 *""FUNC COMMENT END""**********************************************/ 279 #if FAST_INTC_VECTOR == VECT_RIIC0_ICRXI0 Interrupt_IIC_ICRXI0(void)280__fast_interrupt void Interrupt_IIC_ICRXI0(void) 281 #else 282 #pragma vector = VECT_RIIC0_ICRXI0 283 __interrupt void Interrupt_IIC_ICRXI0(void) 284 #endif 285 { 286 volatile uint8_t unwanted_byte; 287 288 switch (rpdl_IIC_current_state[0]) 289 { 290 case IIC_MASTER_START_READ: 291 /* Only one byte to be read? */ 292 if (rpdl_IIC_rx_threshold[0] == 1) 293 { 294 /* Prepare to signal a NACK to the slave (ACKBT = 1) */ 295 RIIC0.ICMR3.BIT.ACKBT = 1; 296 } 297 rpdl_IIC_current_state[0] = IIC_MASTER_READ_DATA; 298 299 /* Do a dummy read */ 300 unwanted_byte = RIIC0.ICDRR; 301 break; 302 case IIC_MASTER_READ_DATA: 303 /* Is the last byte about to be read from the slave? */ 304 if (rpdl_IIC_rx_counter[0] == (rpdl_IIC_rx_threshold[0] - 2)) 305 { 306 /* Prepare to signal a NACK to the slave (ACKBT = 1) */ 307 RIIC0.ICMR3.BIT.ACKBT = 1; 308 } 309 /* All data read from the slave? */ 310 else if (rpdl_IIC_rx_counter[0] == (rpdl_IIC_rx_threshold[0] - 1)) 311 { 312 rpdl_IIC_current_state[0] = IIC_MASTER_WAIT_FOR_STOP; 313 314 /* Enable Stop detection */ 315 RIIC0.ICIER.BIT.SPIE = 1; 316 317 /* Issue a stop condition */ 318 RIIC0.ICCR2.BIT.SP = 1; 319 } 320 321 /* Store the data byte */ 322 *rpdl_IIC_rx_data_pointer[0] = RIIC0.ICDRR; 323 324 /* Increment the pointer */ 325 rpdl_IIC_rx_data_pointer[0]++; 326 327 /* Increment the counter */ 328 rpdl_IIC_rx_counter[0]++; 329 break; 330 case IIC_SLAVE_MONITOR: 331 /* Note the detected address */ 332 Store_detected_address(0); 333 334 /* Clear the Start flag */ 335 RIIC0.ICSR2.BIT.START = 0; 336 337 /* Enable Start detection (in case a Repeated Start arrives) */ 338 RIIC0.ICIER.BIT.STIE = 1; 339 340 /* Will interrupts be used for the transfers? */ 341 if (rpdl_IIC_rx_transfer_method[0] == IIC_TRANSFER_CPU) 342 { 343 rpdl_IIC_current_state[0] = IIC_SLAVE_READ_DATA; 344 } 345 else 346 { 347 /* Disable ACK / NACK decisions (RDRFS = 0) */ 348 RIIC0.ICMR3.BIT.RDRFS = 0; 349 /* Select DMAC or DTC transfers */ 350 if (rpdl_IIC_rx_transfer_method[0] == IIC_TRANSFER_DTC) 351 { 352 ICU.DTCER[DTCE_RIIC0_ICRXI0].BIT.DTCE = 1; 353 } 354 else /* DMAC */ 355 { 356 /* Set DTE = 1 */ 357 *DMCNT_ADDRESS(rpdl_IIC_rx_dmac_channel[0]) = 0x01u; 358 } 359 /* Prevent further RX-based interrupts */ 360 ICU.IPR[IPR_RIIC0_ICRXI0].BIT.IPR = 0; 361 rpdl_IIC_current_state[0] = IIC_EXIT_LOOP; 362 } 363 364 /* Do a dummy read */ 365 unwanted_byte = RIIC0.ICDRR; 366 break; 367 case IIC_SLAVE_READ_DATA: 368 /* All data received? */ 369 if (rpdl_IIC_rx_counter[0] == rpdl_IIC_rx_threshold[0]) 370 { 371 /* Do a dummy read */ 372 unwanted_byte = RIIC0.ICDRR; 373 374 /* Signal a NACK to the master */ 375 RIIC0.ICMR3.BIT.ACKBT = 1; 376 } 377 else 378 { 379 /* Store the data byte */ 380 *rpdl_IIC_rx_data_pointer[0] = RIIC0.ICDRR; 381 382 /* Increment the pointer */ 383 rpdl_IIC_rx_data_pointer[0]++; 384 385 /* Increment the counter */ 386 rpdl_IIC_rx_counter[0]++; 387 388 /* Signal an ACK to the master */ 389 RIIC0.ICMR3.BIT.ACKBT = 0; 390 } 391 break; 392 case IIC_SLAVE_SEND_DATA: 393 /* Call the callback function */ 394 if (rpdl_IIC_callback_func[0] != PDL_NO_FUNC) 395 { 396 rpdl_IIC_callback_func[0](); 397 } 398 break; 399 case IIC_EXIT_LOOP: 400 /* This will occur if the DMAC/DTC is being used with a callback */ 401 /* Call the callback function */ 402 if (rpdl_IIC_callback_func[0] != PDL_NO_FUNC) 403 { 404 rpdl_IIC_callback_func[0](); 405 } 406 break; 407 default: 408 /* Call the callback function */ 409 if (rpdl_IIC_callback_func[0] != PDL_NO_FUNC) 410 { 411 rpdl_IIC_callback_func[0](); 412 } 413 break; 414 } 415 } 416 417 #if FAST_INTC_VECTOR == VECT_RIIC1_ICRXI1 Interrupt_IIC_ICRXI1(void)418__fast_interrupt void Interrupt_IIC_ICRXI1(void) 419 #else 420 #pragma vector = VECT_RIIC1_ICRXI1 421 __interrupt void Interrupt_IIC_ICRXI1(void) 422 #endif 423 { 424 #ifdef DEVICE_PACKAGE_LQFP_100 425 /* This channel is not available on the 100-pin package */ 426 nop(); 427 #else 428 volatile uint8_t unwanted_byte; 429 430 switch (rpdl_IIC_current_state[1]) 431 { 432 case IIC_MASTER_START_READ: 433 /* Only one byte to be read? */ 434 if (rpdl_IIC_rx_threshold[1] == 1) 435 { 436 /* Prepare to signal a NACK to the slave (ACKBT = 1) */ 437 RIIC1.ICMR3.BIT.ACKBT = 1; 438 } 439 rpdl_IIC_current_state[1] = IIC_MASTER_READ_DATA; 440 441 /* Do a dummy read */ 442 unwanted_byte = RIIC1.ICDRR; 443 break; 444 case IIC_MASTER_READ_DATA: 445 /* Is the last byte about to be read from the slave? */ 446 if (rpdl_IIC_rx_counter[1] == (rpdl_IIC_rx_threshold[1] - 2)) 447 { 448 /* Prepare to signal a NACK to the slave (ACKBT = 1) */ 449 RIIC1.ICMR3.BIT.ACKBT = 1; 450 } 451 /* All data read from the slave? */ 452 else if (rpdl_IIC_rx_counter[1] == (rpdl_IIC_rx_threshold[1] - 1)) 453 { 454 rpdl_IIC_current_state[1] = IIC_MASTER_WAIT_FOR_STOP; 455 456 /* Enable Stop detection */ 457 RIIC1.ICIER.BIT.SPIE = 1; 458 459 /* Issue a stop condition */ 460 RIIC1.ICCR2.BIT.SP = 1; 461 } 462 463 /* Store the data byte */ 464 *rpdl_IIC_rx_data_pointer[1] = RIIC1.ICDRR; 465 466 /* Increment the pointer */ 467 rpdl_IIC_rx_data_pointer[1]++; 468 469 /* Increment the counter */ 470 rpdl_IIC_rx_counter[1]++; 471 break; 472 case IIC_SLAVE_MONITOR: 473 /* Note the detected address */ 474 Store_detected_address(1); 475 476 /* Clear the Start flag */ 477 RIIC1.ICSR2.BIT.START = 0; 478 479 /* Enable Start detection (in case a Repeated Start arrives) */ 480 RIIC1.ICIER.BIT.STIE = 1; 481 482 /* Will interrupts be used for the transfers? */ 483 if (rpdl_IIC_rx_transfer_method[1] == IIC_TRANSFER_CPU) 484 { 485 rpdl_IIC_current_state[1] = IIC_SLAVE_READ_DATA; 486 } 487 else 488 { 489 /* Disable ACK / NACK decisions (RDRFS = 0) */ 490 RIIC1.ICMR3.BIT.RDRFS = 0; 491 /* Select DMAC or DTC transfers */ 492 if (rpdl_IIC_rx_transfer_method[1] == IIC_TRANSFER_DTC) 493 { 494 ICU.DTCER[DTCE_RIIC1_ICRXI1].BIT.DTCE = 1; 495 } 496 else /* DMAC */ 497 { 498 /* Set DTE = 1 */ 499 *DMCNT_ADDRESS(rpdl_IIC_rx_dmac_channel[1]) = 0x01u; 500 } 501 /* Prevent further RX-based interrupts */ 502 ICU.IPR[IPR_RIIC1_ICRXI1].BIT.IPR = 0; 503 rpdl_IIC_current_state[1] = IIC_EXIT_LOOP; 504 } 505 506 /* Do a dummy read */ 507 unwanted_byte = RIIC1.ICDRR; 508 break; 509 510 case IIC_SLAVE_READ_DATA: 511 /* All data received? */ 512 if (rpdl_IIC_rx_counter[1] == rpdl_IIC_rx_threshold[1]) 513 { 514 /* Do a dummy read */ 515 unwanted_byte = RIIC1.ICDRR; 516 517 /* Signal a NACK to the master */ 518 RIIC1.ICMR3.BIT.ACKBT = 1; 519 } 520 else 521 { 522 /* Store the data byte */ 523 *rpdl_IIC_rx_data_pointer[1] = RIIC1.ICDRR; 524 525 /* Increment the pointer */ 526 rpdl_IIC_rx_data_pointer[1]++; 527 528 /* Increment the counter */ 529 rpdl_IIC_rx_counter[1]++; 530 531 /* Signal an ACK to the master */ 532 RIIC1.ICMR3.BIT.ACKBT = 0; 533 } 534 break; 535 case IIC_SLAVE_SEND_DATA: 536 /* Call the callback function */ 537 if (rpdl_IIC_callback_func[1] != PDL_NO_FUNC) 538 { 539 rpdl_IIC_callback_func[1](); 540 } 541 break; 542 case IIC_EXIT_LOOP: 543 /* This will occur if the DMAC/DTC is being used with a callback */ 544 /* Call the callback function */ 545 if (rpdl_IIC_callback_func[1] != PDL_NO_FUNC) 546 { 547 rpdl_IIC_callback_func[1](); 548 } 549 break; 550 default: 551 /* Call the callback function */ 552 if (rpdl_IIC_callback_func[1] != PDL_NO_FUNC) 553 { 554 rpdl_IIC_callback_func[1](); 555 } 556 break; 557 } 558 #endif 559 } 560 561 /*""FUNC COMMENT""*************************************************** 562 * Module outline: IICn transmit data interrupt processing 563 *------------------------------------------------------------------- 564 * Declaration : void Interrupt_IIC_ICTXIn(void) 565 *------------------------------------------------------------------- 566 * Function : 567 *------------------------------------------------------------------- 568 * Argument : Nothing 569 *------------------------------------------------------------------- 570 * Return value : Nothing 571 *------------------------------------------------------------------- 572 * Output : ICDRT, ICIER 573 *------------------------------------------------------------------- 574 * Use function : 575 *------------------------------------------------------------------- 576 * Notes : 577 *------------------------------------------------------------------- 578 * History : 2011.04.08 579 * : Ver 1.02 580 * : CS-5 release. 581 *""FUNC COMMENT END""**********************************************/ 582 #if FAST_INTC_VECTOR == VECT_RIIC0_ICTXI0 Interrupt_IIC_ICTXI0(void)583__fast_interrupt void Interrupt_IIC_ICTXI0(void) 584 #else 585 #pragma vector = VECT_RIIC0_ICTXI0 586 __interrupt void Interrupt_IIC_ICTXI0(void) 587 #endif 588 { 589 switch (rpdl_IIC_current_state[0]) 590 { 591 case IIC_MASTER_SEND_SLAVE_ADDRESS_10b: 592 /* Send the second part of the slave address */ 593 RIIC0.ICDRT = rpdl_IIC_slave_address_lower[0]; 594 595 /* Transmit mode? */ 596 if ((rpdl_IIC_slave_address_upper[0] & BIT_0) == 0) 597 { 598 rpdl_IIC_current_state[0] = IIC_MASTER_SEND_DATA; 599 } 600 else 601 { 602 rpdl_IIC_current_state[0] = IIC_MASTER_START_READ; 603 604 /* Enable receive interrupt request generation */ 605 RIIC0.ICIER.BIT.RIE = 1; 606 } 607 break; 608 case IIC_MASTER_SEND_DATA: 609 /* All data sent? */ 610 if (rpdl_IIC_tx_counter[0] == rpdl_IIC_tx_threshold[0]) 611 { 612 rpdl_IIC_current_state[0] = IIC_MASTER_WAIT_FOR_TX_COMPLETE; 613 614 /* Disable ICTXI interrupt request generation */ 615 RIIC0.ICIER.BIT.TIE = 0; 616 617 /* Ensure the ICTEI IR flag is clear */ 618 ICU.IR[IR_RIIC0_ICTEI0].BIT.IR = 0; 619 620 /* Enable Transmit End interrupt generation */ 621 RIIC0.ICIER.BIT.TEIE = 1; 622 } 623 else 624 { 625 /* Load the data to be sent */ 626 RIIC0.ICDRT = *rpdl_IIC_tx_data_pointer[0]; 627 628 /* Increment the pointer */ 629 rpdl_IIC_tx_data_pointer[0]++; 630 631 /* Increment the counter */ 632 rpdl_IIC_tx_counter[0]++; 633 } 634 break; 635 case IIC_SLAVE_MONITOR: 636 /* Note the detected address */ 637 Store_detected_address(0); 638 639 /* Call the callback function */ 640 if (rpdl_IIC_callback_func[0] != PDL_NO_FUNC) 641 { 642 rpdl_IIC_callback_func[0](); 643 } 644 break; 645 case IIC_SLAVE_SEND_DATA: 646 /* All data sent? */ 647 if (rpdl_IIC_tx_counter[0] == rpdl_IIC_tx_threshold[0]) 648 { 649 /* Clear the counter */ 650 rpdl_IIC_tx_counter[0] = 0; 651 652 /* Loop back to the start */ 653 rpdl_IIC_tx_data_pointer[0] = rpdl_IIC_tx_data_start[0]; 654 } 655 656 /* Load the data to be sent */ 657 RIIC0.ICDRT = *rpdl_IIC_tx_data_pointer[0]; 658 659 /* Increment the pointer */ 660 rpdl_IIC_tx_data_pointer[0]++; 661 662 /* Increment the counter */ 663 rpdl_IIC_tx_counter[0]++; 664 break; 665 case IIC_SLAVE_READ_DATA: 666 /* Call the callback function */ 667 if (rpdl_IIC_callback_func[0] != PDL_NO_FUNC) 668 { 669 rpdl_IIC_callback_func[0](); 670 } 671 break; 672 case IIC_EXIT_LOOP: 673 /* This will occur if the DMAC/DTC is being used with a callback */ 674 /* Call the callback function */ 675 if (rpdl_IIC_callback_func[0] != PDL_NO_FUNC) 676 { 677 rpdl_IIC_callback_func[0](); 678 } 679 break; 680 default: 681 /* Call the callback function */ 682 if (rpdl_IIC_callback_func[0] != PDL_NO_FUNC) 683 { 684 rpdl_IIC_callback_func[0](); 685 } 686 break; 687 } 688 } 689 690 #if FAST_INTC_VECTOR == VECT_RIIC1_ICTXI1 Interrupt_IIC_ICTXI1(void)691__fast_interrupt void Interrupt_IIC_ICTXI1(void) 692 #else 693 #pragma vector = VECT_RIIC1_ICTXI1 694 __interrupt void Interrupt_IIC_ICTXI1(void) 695 #endif 696 { 697 #ifdef DEVICE_PACKAGE_LQFP_100 698 /* This channel is not available on the 100-pin package */ 699 nop(); 700 #else 701 switch (rpdl_IIC_current_state[1]) 702 { 703 case IIC_MASTER_SEND_SLAVE_ADDRESS_10b: 704 /* Send the second part of the slave address */ 705 RIIC1.ICDRT = rpdl_IIC_slave_address_lower[1]; 706 707 /* Transmit mode? */ 708 if ((rpdl_IIC_slave_address_upper[1] & BIT_0) == 0) 709 { 710 rpdl_IIC_current_state[1] = IIC_MASTER_SEND_DATA; 711 } 712 else 713 { 714 rpdl_IIC_current_state[1] = IIC_MASTER_START_READ; 715 716 /* Enable receive interrupt request generation */ 717 RIIC1.ICIER.BIT.RIE = 1; 718 } 719 break; 720 case IIC_MASTER_SEND_DATA: 721 /* All data sent? */ 722 if (rpdl_IIC_tx_counter[1] == rpdl_IIC_tx_threshold[1]) 723 { 724 rpdl_IIC_current_state[1] = IIC_MASTER_WAIT_FOR_TX_COMPLETE; 725 726 /* Disable ICTXI interrupt request generation */ 727 RIIC1.ICIER.BIT.TIE = 0; 728 729 /* Ensure the ICTEI IR flag is clear */ 730 ICU.IR[IR_RIIC1_ICTEI1].BIT.IR = 0; 731 732 /* Enable Transmit End interrupt generation */ 733 RIIC1.ICIER.BIT.TEIE = 1; 734 } 735 else 736 { 737 /* Load the data to be sent */ 738 RIIC1.ICDRT = *rpdl_IIC_tx_data_pointer[1]; 739 740 /* Increment the pointer */ 741 rpdl_IIC_tx_data_pointer[1]++; 742 743 /* Increment the counter */ 744 rpdl_IIC_tx_counter[1]++; 745 } 746 break; 747 case IIC_SLAVE_MONITOR: 748 /* Note the detected address */ 749 Store_detected_address(1); 750 751 /* Call the callback function */ 752 if (rpdl_IIC_callback_func[1] != PDL_NO_FUNC) 753 { 754 rpdl_IIC_callback_func[1](); 755 } 756 break; 757 case IIC_SLAVE_SEND_DATA: 758 /* All data sent? */ 759 if (rpdl_IIC_tx_counter[1] == rpdl_IIC_tx_threshold[1]) 760 { 761 /* Clear the counter */ 762 rpdl_IIC_tx_counter[1] = 0; 763 764 /* Loop back to the start */ 765 rpdl_IIC_tx_data_pointer[1] = rpdl_IIC_tx_data_start[1]; 766 } 767 768 /* Load the data to be sent */ 769 RIIC1.ICDRT = *rpdl_IIC_tx_data_pointer[1]; 770 771 /* Increment the pointer */ 772 rpdl_IIC_tx_data_pointer[1]++; 773 774 /* Increment the counter */ 775 rpdl_IIC_tx_counter[1]++; 776 break; 777 case IIC_SLAVE_READ_DATA: 778 /* Call the callback function */ 779 if (rpdl_IIC_callback_func[1] != PDL_NO_FUNC) 780 { 781 rpdl_IIC_callback_func[1](); 782 } 783 break; 784 case IIC_EXIT_LOOP: 785 /* This will occur if the DMAC/DTC is being used with a callback */ 786 /* Call the callback function */ 787 if (rpdl_IIC_callback_func[1] != PDL_NO_FUNC) 788 { 789 rpdl_IIC_callback_func[1](); 790 } 791 break; 792 default: 793 /* Call the callback function */ 794 if (rpdl_IIC_callback_func[1] != PDL_NO_FUNC) 795 { 796 rpdl_IIC_callback_func[1](); 797 } 798 break; 799 } 800 #endif 801 } 802 803 /*""FUNC COMMENT""*************************************************** 804 * Module outline: IICn transmit end interrupt processing 805 *------------------------------------------------------------------- 806 * Declaration : void InterruptIIC_ICTEIn(void) 807 *------------------------------------------------------------------- 808 * Function : 809 *------------------------------------------------------------------- 810 * Argument : Nothing 811 *------------------------------------------------------------------- 812 * Return value : Nothing 813 *------------------------------------------------------------------- 814 * Output : ICIER, ICSR2 815 *------------------------------------------------------------------- 816 * Use function : 817 *------------------------------------------------------------------- 818 * Notes : 819 *------------------------------------------------------------------- 820 * History : 2011.04.08 821 * : Ver 1.02 822 * : CS-5 release. 823 *""FUNC COMMENT END""**********************************************/ 824 825 #if FAST_INTC_VECTOR == VECT_RIIC0_ICTEI0 Interrupt_IIC_ICTEI0(void)826__fast_interrupt void Interrupt_IIC_ICTEI0(void) 827 #else 828 #pragma vector = VECT_RIIC0_ICTEI0 829 __interrupt void Interrupt_IIC_ICTEI0(void) 830 #endif 831 { 832 /* Disable Transmit End interrupt request generation */ 833 RIIC0.ICIER.BIT.TEIE = 0; 834 /* Clear the flag */ 835 RIIC0.ICSR2.BIT.TEND = 0; 836 837 /* Stop condition required? */ 838 if (rpdl_IIC_stop[0] == true) 839 { 840 rpdl_IIC_current_state[0] = IIC_MASTER_WAIT_FOR_STOP; 841 842 /* Enable Stop detection */ 843 RIIC0.ICIER.BIT.SPIE = 1; 844 845 /* Issue a stop condition */ 846 RIIC0.ICCR2.BIT.SP = 1; 847 } 848 else 849 { 850 /* Disable all interrupt request generation */ 851 RIIC0.ICIER.BYTE = 0x00u; 852 853 /* Call the callback function */ 854 if (rpdl_IIC_callback_func[0] != PDL_NO_FUNC) 855 { 856 rpdl_IIC_callback_func[0](); 857 } 858 } 859 } 860 861 #if FAST_INTC_VECTOR == VECT_RIIC1_ICTEI1 Interrupt_IIC_ICTEI1(void)862__fast_interrupt void Interrupt_IIC_ICTEI1(void) 863 #else 864 #pragma vector = VECT_RIIC1_ICTEI1 865 __interrupt void Interrupt_IIC_ICTEI1(void) 866 #endif 867 { 868 #ifdef DEVICE_PACKAGE_LQFP_100 869 /* This channel is not available on the 100-pin package */ 870 nop(); 871 #else 872 /* Disable Transmit End interrupt request generation */ 873 RIIC1.ICIER.BIT.TEIE = 0; 874 /* Clear the flag */ 875 RIIC1.ICSR2.BIT.TEND = 0; 876 877 /* Stop condition required? */ 878 if (rpdl_IIC_stop[1] == true) 879 { 880 rpdl_IIC_current_state[1] = IIC_MASTER_WAIT_FOR_STOP; 881 882 /* Enable Stop detection */ 883 RIIC1.ICIER.BIT.SPIE = 1; 884 885 /* Issue a stop condition */ 886 RIIC1.ICCR2.BIT.SP = 1; 887 } 888 else 889 { 890 /* Disable all interrupt request generation */ 891 RIIC1.ICIER.BYTE = 0x00u; 892 893 /* Call the callback function */ 894 if (rpdl_IIC_callback_func[1] != PDL_NO_FUNC) 895 { 896 rpdl_IIC_callback_func[1](); 897 } 898 } 899 #endif 900 } 901 /* End of file */ 902