1 /*! 2 * @file apm32f0xx_adc.h 3 * 4 * @brief This file contains all the functions prototypes for the ADC firmware library 5 * 6 * @version V1.0.3 7 * 8 * @date 2022-09-20 9 * 10 * @attention 11 * 12 * Copyright (C) 2020-2022 Geehy Semiconductor 13 * 14 * You may not use this file except in compliance with the 15 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE). 16 * 17 * The program is only for reference, which is distributed in the hope 18 * that it will be useful and instructional for customers to develop 19 * their software. Unless required by applicable law or agreed to in 20 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT 21 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions 23 * and limitations under the License. 24 */ 25 26 /* Define to prevent recursive inclusion */ 27 #ifndef __APM32F0XX_ADC_H 28 #define __APM32F0XX_ADC_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 /* Includes */ 35 #include "apm32f0xx.h" 36 37 /** @addtogroup APM32F0xx_StdPeriphDriver 38 @{ 39 */ 40 41 /** @addtogroup ADC_Driver 42 @{ 43 */ 44 45 /** @defgroup ADC_Macros Macros 46 @{ 47 */ 48 49 /* ADC_channels */ 50 #define ADC_Channel_TempSensor ((uint32_t)ADC_CHANNEL_16) /*!< ADC TempSensor Channel definition */ 51 #define ADC_Channel_Vrefint ((uint32_t)ADC_CHANNEL_17) /*!< ADC Vrefint Channel definition */ 52 #define ADC_Channel_Vbat ((uint32_t)ADC_CHANNEL_18) /*!< ADC Vbat Channel definition */ 53 54 /* ADC CFG mask */ 55 #define CFG1_CLEAR_MASK ((uint32_t)0xFFFFD203) 56 57 /* Calibration time out */ 58 #define CALIBRATION_TIMEOUT ((uint32_t)0x0000F000) 59 60 /**@} end of group ADC_Macros */ 61 62 /** @defgroup ADC_Enumerations Enumerations 63 @{ 64 */ 65 66 /** 67 * @brief ADC conversion mode 68 */ 69 typedef enum 70 { 71 ADC_CONVERSION_SINGLE = ((uint8_t)0), /*!< Single conversion mode */ 72 ADC_CONVERSION_CONTINUOUS = ((uint8_t)1), /*!< Continuous conversion mode */ 73 } ADC_CONVERSION_T; 74 75 /** 76 * @brief ADC Jitter 77 */ 78 typedef enum 79 { 80 ADC_JITTER_PCLKDIV2 = ((uint8_t)0x01), /*!< ADC clocked by PCLK div2 */ 81 ADC_JITTER_PCLKDIV4 = ((uint8_t)0x02), /*!< ADC clocked by PCLK div4 */ 82 } ADC_JITTER_T; 83 84 /** 85 * @brief ADC clock mode 86 */ 87 typedef enum 88 { 89 ADC_CLOCK_MODE_ASYNCLK = ((uint8_t)0x00), /*!< ADC Asynchronous clock mode */ 90 ADC_CLOCK_MODE_SYNCLKDIV2 = ((uint8_t)0x01), /*!< Synchronous clock mode divided by 2 */ 91 ADC_CLOCK_MODE_SYNCLKDIV4 = ((uint8_t)0x02), /*!< Synchronous clock mode divided by 4 */ 92 } ADC_CLOCK_MODE_T; 93 94 /** 95 * @brief ADC data resolution 96 */ 97 typedef enum 98 { 99 ADC_RESOLUTION_12B = ((uint8_t)0x00), /*!< ADC Resolution is 12 bits */ 100 ADC_RESOLUTION_10B = ((uint8_t)0x01), /*!< ADC Resolution is 10 bits */ 101 ADC_RESOLUTION_8B = ((uint8_t)0x02), /*!< ADC Resolution is 8 bits */ 102 ADC_RESOLUTION_6B = ((uint8_t)0x03), /*!< ADC Resolution is 6 bits */ 103 } ADC_RESOLUTION_T; 104 105 /** 106 * @brief ADC data alignment 107 */ 108 typedef enum 109 { 110 ADC_DATA_ALIGN_RIGHT = ((uint8_t)0), /*!< Data alignment right */ 111 ADC_DATA_ALIGN_LEFT = ((uint8_t)1), /*!< Data alignment left */ 112 } ADC_DATA_ALIGN_T; 113 114 /** 115 * @brief ADC scan sequence direction 116 */ 117 typedef enum 118 { 119 ADC_SCAN_DIR_UPWARD = ((uint8_t)0), /*!< from CHSEL0 to CHSEL17 */ 120 ADC_SCAN_DIR_BACKWARD = ((uint8_t)1), /*!< from CHSEL17 to CHSEL0 */ 121 } ADC_SCAN_DIR_T; 122 123 /** 124 * @brief ADC DMA Mode 125 */ 126 typedef enum 127 { 128 ADC_DMA_MODE_ONESHOUT = ((uint8_t)0), /*!< ADC DMA Mode Select one shot */ 129 ADC_DMA_MODE_CIRCULAR = ((uint8_t)1), /*!< ADC DMA Mode Select circular */ 130 } ADC_DMA_MODE_T; 131 132 /** 133 * @brief ADC external conversion trigger edge selectio 134 */ 135 typedef enum 136 { 137 ADC_EXT_TRIG_EDGE_NONE = ((uint8_t)0x00), /*!< ADC External Trigger Conversion mode disabled */ 138 ADC_EXT_TRIG_EDGE_RISING = ((uint8_t)0x01), /*!< ADC External Trigger Conversion mode rising edge */ 139 ADC_EXT_TRIG_EDGE_FALLING = ((uint8_t)0x02), /*!< ADC External Trigger Conversion mode falling edge */ 140 ADC_EXT_TRIG_EDGE_ALL = ((uint8_t)0x03), /*!< ADC External Trigger Conversion mode rising and falling edges */ 141 } ADC_EXT_TRIG_EDGE_T; 142 143 /** 144 * @brief ADC external trigger sources selection 145 */ 146 typedef enum 147 { 148 ADC_EXT_TRIG_CONV_TRG0 = ((uint8_t)0x00), /*!< ADC External Trigger Conversion timer1 TRG0 */ 149 ADC_EXT_TRIG_CONV_TRG1 = ((uint8_t)0x01), /*!< ADC External Trigger Conversion timer1 CC4 */ 150 ADC_EXT_TRIG_CONV_TRG2 = ((uint8_t)0x02), /*!< ADC External Trigger Conversion timer2 TRGO */ 151 ADC_EXT_TRIG_CONV_TRG3 = ((uint8_t)0x03), /*!< ADC External Trigger Conversion timer3 TRG0 */ 152 ADC_EXT_TRIG_CONV_TRG4 = ((uint8_t)0x04), /*!< ADC External Trigger Conversion timer15 TRG0 */ 153 } ADC_EXT_TRIG_CONV_T; 154 155 /** 156 * @brief ADC analog watchdog channel selection 157 */ 158 typedef enum 159 { 160 ADC_ANALG_WDT_CHANNEL_0 = ((uint8_t)0x00), /*!< AWD Channel 0 */ 161 ADC_ANALG_WDT_CHANNEL_1 = ((uint8_t)0x01), /*!< AWD Channel 1 */ 162 ADC_ANALG_WDT_CHANNEL_2 = ((uint8_t)0x02), /*!< AWD Channel 2 */ 163 ADC_ANALG_WDT_CHANNEL_3 = ((uint8_t)0x03), /*!< AWD Channel 3 */ 164 ADC_ANALG_WDT_CHANNEL_4 = ((uint8_t)0x04), /*!< AWD Channel 4 */ 165 ADC_ANALG_WDT_CHANNEL_5 = ((uint8_t)0x05), /*!< AWD Channel 5 */ 166 ADC_ANALG_WDT_CHANNEL_6 = ((uint8_t)0x06), /*!< AWD Channel 6 */ 167 ADC_ANALG_WDT_CHANNEL_7 = ((uint8_t)0x07), /*!< AWD Channel 7 */ 168 ADC_ANALG_WDT_CHANNEL_8 = ((uint8_t)0x08), /*!< AWD Channel 8 */ 169 ADC_ANALG_WDT_CHANNEL_9 = ((uint8_t)0x09), /*!< AWD Channel 9 */ 170 ADC_ANALG_WDT_CHANNEL_10 = ((uint8_t)0x0A), /*!< AWD Channel 10 */ 171 ADC_ANALG_WDT_CHANNEL_11 = ((uint8_t)0x0B), /*!< AWD Channel 11 */ 172 ADC_ANALG_WDT_CHANNEL_12 = ((uint8_t)0x0C), /*!< AWD Channel 12 */ 173 ADC_ANALG_WDT_CHANNEL_13 = ((uint8_t)0x0D), /*!< AWD Channel 13 */ 174 ADC_ANALG_WDT_CHANNEL_14 = ((uint8_t)0x0E), /*!< AWD Channel 14 */ 175 ADC_ANALG_WDT_CHANNEL_15 = ((uint8_t)0x0F), /*!< AWD Channel 15 */ 176 ADC_ANALG_WDT_CHANNEL_16 = ((uint8_t)0x10), /*!< AWD Channel 16 */ 177 ADC_ANALG_WDT_CHANNEL_17 = ((uint8_t)0x11), /*!< AWD Channel 17 */ 178 ADC_ANALG_WDT_CHANNEL_18 = ((uint8_t)0x12), /*!< AWD Channel 18 */ 179 } ADC_ANALG_WDT_CHANNEL_T; 180 181 /** 182 * @brief ADC sampling times 183 */ 184 typedef enum 185 { 186 ADC_SAMPLE_TIME_1_5 = ((uint8_t)0x00), /*!< 1.5 ADC clock cycles */ 187 ADC_SAMPLE_TIME_7_5 = ((uint8_t)0x01), /*!< 7.5 ADC clock cycles */ 188 ADC_SAMPLE_TIME_13_5 = ((uint8_t)0x02), /*!< 13.5 ADC clock cycles */ 189 ADC_SAMPLE_TIME_28_5 = ((uint8_t)0x03), /*!< 28.5 ADC clock cycles */ 190 ADC_SAMPLE_TIME_41_5 = ((uint8_t)0x04), /*!< 41.5 ADC clock cycles */ 191 ADC_SAMPLE_TIME_55_5 = ((uint8_t)0x05), /*!< 55.5 ADC clock cycles */ 192 ADC_SAMPLE_TIME_71_5 = ((uint8_t)0x06), /*!< 71.5 ADC clock cycles */ 193 ADC_SAMPLE_TIME_239_5 = ((uint8_t)0x07), /*!< 239.5 ADC clock cycles */ 194 } ADC_SAMPLE_TIME_T; 195 196 /** 197 * @brief ADC channel selection 198 */ 199 typedef enum 200 { 201 ADC_CHANNEL_0 = ((uint32_t)0x00000001), /*!< ADC Channel 0 */ 202 ADC_CHANNEL_1 = ((uint32_t)0x00000002), /*!< ADC Channel 1 */ 203 ADC_CHANNEL_2 = ((uint32_t)0x00000004), /*!< ADC Channel 2 */ 204 ADC_CHANNEL_3 = ((uint32_t)0x00000008), /*!< ADC Channel 3 */ 205 ADC_CHANNEL_4 = ((uint32_t)0x00000010), /*!< ADC Channel 4 */ 206 ADC_CHANNEL_5 = ((uint32_t)0x00000020), /*!< ADC Channel 5 */ 207 ADC_CHANNEL_6 = ((uint32_t)0x00000040), /*!< ADC Channel 6 */ 208 ADC_CHANNEL_7 = ((uint32_t)0x00000080), /*!< ADC Channel 7 */ 209 ADC_CHANNEL_8 = ((uint32_t)0x00000100), /*!< ADC Channel 8 */ 210 ADC_CHANNEL_9 = ((uint32_t)0x00000200), /*!< ADC Channel 9 */ 211 ADC_CHANNEL_10 = ((uint32_t)0x00000400), /*!< ADC Channel 10 */ 212 ADC_CHANNEL_11 = ((uint32_t)0x00000800), /*!< ADC Channel 11 */ 213 ADC_CHANNEL_12 = ((uint32_t)0x00001000), /*!< ADC Channel 12 */ 214 ADC_CHANNEL_13 = ((uint32_t)0x00002000), /*!< ADC Channel 13 */ 215 ADC_CHANNEL_14 = ((uint32_t)0x00004000), /*!< ADC Channel 14 */ 216 ADC_CHANNEL_15 = ((uint32_t)0x00008000), /*!< ADC Channel 15 */ 217 ADC_CHANNEL_16 = ((uint32_t)0x00010000), /*!< ADC Channel 16 */ 218 ADC_CHANNEL_17 = ((uint32_t)0x00020000), /*!< ADC Channel 17 */ 219 ADC_CHANNEL_18 = ((uint32_t)0x00040000), /*!< ADC Channel 18 (Not for APM32F030 devices) */ 220 } ADC_CHANNEL_T; 221 222 /** 223 * @brief ADC interrupts definition 224 */ 225 typedef enum 226 { 227 ADC_INT_ADRDY = ((uint8_t)0x01), /*!< ADC ready interrupt */ 228 ADC_INT_CSMP = ((uint8_t)0x02), /*!< End of sampling interrupt */ 229 ADC_INT_CC = ((uint8_t)0x04), /*!< End of conversion interrupt */ 230 ADC_INT_CS = ((uint8_t)0x08), /*!< End of sequence interrupt */ 231 ADC_INT_OVR = ((uint8_t)0x10), /*!< ADC overrun interrupt */ 232 ADC_INT_AWD = ((uint8_t)0x80), /*!< Analog watchdog interrupt */ 233 } ADC_INT_T; 234 235 /** 236 * @brief ADC Interrupt flag 237 */ 238 typedef enum 239 { 240 ADC_INT_FLAG_ADRDY = ((uint8_t)0x01), /*!< ADC ready interrupt flag */ 241 ADC_INT_FLAG_CSMP = ((uint8_t)0x02), /*!< End of sampling interrupt flag */ 242 ADC_INT_FLAG_CC = ((uint8_t)0x04), /*!< End of conversion interrupt flag */ 243 ADC_INT_FLAG_CS = ((uint8_t)0x08), /*!< End of sequence interrupt flag */ 244 ADC_INT_FLAG_OVR = ((uint8_t)0x10), /*!< ADC overrun interrupt flag */ 245 ADC_INT_FLAG_AWD = ((uint8_t)0x80), /*!< Analog watchdog interrupt flag */ 246 } ADC_INT_FLAG_T; 247 248 /** 249 * @brief ADC flag 250 */ 251 typedef enum 252 { 253 ADC_FLAG_ADCON = ((uint32_t)0x01000001), /*!< ADC enable flag */ 254 ADC_FLAG_ADCOFF = ((uint32_t)0x01000002), /*!< ADC disable flag */ 255 ADC_FLAG_ADCSTA = ((uint32_t)0x01000004), /*!< ADC start conversion flag */ 256 ADC_FLAG_ADCSTOP = ((uint32_t)0x01000010), /*!< ADC stop conversion flag */ 257 ADC_FLAG_ADCCAL = ((int) 0x81000000), /*!< ADC calibration flag */ 258 ADC_FLAG_ADRDY = ((uint8_t)0x01), /*!< ADC ready flag */ 259 ADC_FLAG_CSMP = ((uint8_t)0x02), /*!< End of sampling flag */ 260 ADC_FLAG_CC = ((uint8_t)0x04), /*!< End of conversion flag */ 261 ADC_FLAG_CS = ((uint8_t)0x08), /*!< End of sequence flag */ 262 ADC_FLAG_OVR = ((uint8_t)0x10), /*!< ADC overrun flag */ 263 ADC_FLAG_AWD = ((uint8_t)0x80), /*!< Analog watchdog flag */ 264 } ADC_FLAG_T; 265 266 /**@} end of group ADC_Enumerations */ 267 268 /** @defgroup ADC_Structures Structures 269 @{ 270 */ 271 272 /** 273 * @brief ADC Config struct definition 274 */ 275 typedef struct 276 { 277 ADC_RESOLUTION_T resolution; /*!< Specifies the ADC data resolution */ 278 ADC_DATA_ALIGN_T dataAlign; /*!< Specifies the data alignment mode */ 279 ADC_SCAN_DIR_T scanDir; /*!< Specifies the scan mode */ 280 ADC_CONVERSION_T convMode; /*!< Specifies the conversion mode */ 281 ADC_EXT_TRIG_CONV_T extTrigConv; /*!< Specifies the external trigger sources */ 282 ADC_EXT_TRIG_EDGE_T extTrigEdge; /*!< Specifies the external conversion trigger edge */ 283 } ADC_Config_T; 284 285 /**@} end of group ADC_Structures */ 286 287 /** @defgroup ADC_Variables Variables 288 @{ 289 */ 290 291 /**@} end of group ADC_Variables */ 292 293 /** @defgroup ADC_Functions Functions 294 @{ 295 */ 296 297 /* ADC reset and configuration */ 298 void ADC_Reset(void); 299 void ADC_Config(ADC_Config_T* adcConfig); 300 void ADC_ConfigStructInit(ADC_Config_T* adcConfig); 301 void ADC_Enable(void); 302 void ADC_Disable(void); 303 void ADC_EnableAutoPowerOff(void); 304 void ADC_DisableAutoPowerOff(void); 305 void ADC_EnableWaitMode(void); 306 void ADC_DisableWaitMode(void); 307 void ADC_ConfigChannel(uint32_t channel, uint8_t sampleTime); 308 void ADC_EnableContinuousMode(void); 309 void ADC_DisableContinuousMode(void); 310 void ADC_EnableDiscMode(void); 311 void ADC_DisableDiscMode(void); 312 void ADC_EnableOverrunMode(void); 313 void ADC_DisableOverrunMode(void); 314 void ADC_StopConversion(void); 315 void ADC_StartConversion(void); 316 void ADC_DMARequestMode(ADC_DMA_MODE_T DMARequestMode); 317 318 /* ADC clock and jitter */ 319 void ADC_ClockMode(ADC_CLOCK_MODE_T clockMode); 320 void ADC_EnableJitter(ADC_JITTER_T jitter); 321 void ADC_DisableJitter(ADC_JITTER_T jitter); 322 323 /* ADC analog watchdog */ 324 void ADC_EnableAnalogWatchdog(void); 325 void ADC_DisableAnalogWatchdog(void); 326 void ADC_AnalogWatchdogLowThreshold(uint16_t lowThreshold); 327 void ADC_AnalogWatchdogHighThreshold(uint16_t highThreshold); 328 void ADC_AnalogWatchdogSingleChannel(uint32_t channel); 329 void ADC_EnableAnalogWatchdogSingleChannel(void); 330 void ADC_DisableAnalogWatchdogSingleChannel(void); 331 332 /* ADC common configuration */ 333 void ADC_EnableTempSensor(void); 334 void ADC_DisableTempSensor(void); 335 void ADC_EnableVrefint(void); 336 void ADC_DisableVrefint(void); 337 void ADC_EnableVbat(void); /*!< Not for APM32F030 devices */ 338 void ADC_DisableVbat(void); /*!< Not for APM32F030 devices */ 339 340 /* Read data */ 341 uint32_t ADC_ReadCalibrationFactor(void); 342 uint16_t ADC_ReadConversionValue(void); 343 344 /* DMA */ 345 void ADC_EnableDMA(void); 346 void ADC_DisableDMA(void); 347 348 /* Interrupt and flag */ 349 void ADC_EnableInterrupt(uint8_t interrupt); 350 void ADC_DisableInterrupt(uint8_t interrupt); 351 uint8_t ADC_ReadStatusFlag(ADC_FLAG_T flag); 352 void ADC_ClearStatusFlag(uint32_t flag); 353 uint8_t ADC_ReadIntFlag(ADC_INT_FLAG_T flag); 354 void ADC_ClearIntFlag(uint32_t flag); 355 356 #ifdef __cplusplus 357 } 358 #endif 359 360 #endif /* __APM32F0XX_ADC_H */ 361 362 /**@} end of group ADC_Functions */ 363 /**@} end of group ADC_Driver */ 364 /**@} end of group APM32F0xx_StdPeriphDriver */ 365