1 /*! 2 * @file apm32f0xx_syscfg.h 3 * 4 * @brief This file contains all the functions prototypes for the SYSCFG firmware library 5 * 6 * @version V1.0.3 7 * 8 * @date 2022-09-20 9 * 10 * @attention 11 * 12 * Copyright (C) 2020-2022 Geehy Semiconductor 13 * 14 * You may not use this file except in compliance with the 15 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE). 16 * 17 * The program is only for reference, which is distributed in the hope 18 * that it will be useful and instructional for customers to develop 19 * their software. Unless required by applicable law or agreed to in 20 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT 21 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions 23 * and limitations under the License. 24 */ 25 26 #ifndef __APM32F0XX_SYSCFG_H 27 #define __APM32F0XX_SYSCFG_H 28 29 #ifdef __cplusplus 30 extern "C" { 31 #endif 32 33 #include "apm32f0xx.h" 34 35 /** @addtogroup APM32F0xx_StdPeriphDriver 36 @{ 37 */ 38 39 /** @addtogroup SYSCFG_Driver SYSCFG Driver 40 @{ 41 */ 42 43 /** @defgroup SYSCFG_Macros Macros 44 @{ 45 */ 46 47 /** Macros description */ 48 #define SYSCFG_CFG1_MEMMODE ((uint32_t)0x00000003); /*!< SYSCFG_Memory Remap Config */ 49 50 /**@} end of group SYSCFG_Macros*/ 51 52 /** @defgroup SYSCFG_Enumerations Enumerations 53 @{ 54 */ 55 56 /** 57 * @brief SYSCFG EINT Port Sources 58 */ 59 typedef enum 60 { 61 SYSCFG_PORT_GPIOA = ((uint8_t)0x00), /*!< Port Source GPIOA */ 62 SYSCFG_PORT_GPIOB = ((uint8_t)0x01), /*!< Port Source GPIOB */ 63 SYSCFG_PORT_GPIOC = ((uint8_t)0x02), /*!< Port Source GPIOC */ 64 SYSCFG_PORT_GPIOD = ((uint8_t)0x03), /*!< Port Source GPIOD */ 65 SYSCFG_PORT_GPIOE = ((uint8_t)0x04), /*!< Port Source GPIOE (only for APM32F072 and APM32F091 devices) */ 66 SYSCFG_PORT_GPIOF = ((uint8_t)0x05), /*!< Port Source GPIOF */ 67 } SYSCFG_PORT_T; 68 69 /** 70 * @brief SYSCFG EINT Pin Sources 71 */ 72 typedef enum 73 { 74 SYSCFG_PIN_0 = ((uint8_t)0x00), /*!< Pin Source 0 */ 75 SYSCFG_PIN_1 = ((uint8_t)0x01), /*!< Pin Source 1 */ 76 SYSCFG_PIN_2 = ((uint8_t)0x02), /*!< Pin Source 2 */ 77 SYSCFG_PIN_3 = ((uint8_t)0x03), /*!< Pin Source 3 */ 78 SYSCFG_PIN_4 = ((uint8_t)0x04), /*!< Pin Source 4 */ 79 SYSCFG_PIN_5 = ((uint8_t)0x05), /*!< Pin Source 5 */ 80 SYSCFG_PIN_6 = ((uint8_t)0x06), /*!< Pin Source 6 */ 81 SYSCFG_PIN_7 = ((uint8_t)0x07), /*!< Pin Source 7 */ 82 SYSCFG_PIN_8 = ((uint8_t)0x08), /*!< Pin Source 8 */ 83 SYSCFG_PIN_9 = ((uint8_t)0x09), /*!< Pin Source 9 */ 84 SYSCFG_PIN_10 = ((uint8_t)0x0A), /*!< Pin Source 10 */ 85 SYSCFG_PIN_11 = ((uint8_t)0x0B), /*!< Pin Source 11 */ 86 SYSCFG_PIN_12 = ((uint8_t)0x0C), /*!< Pin Source 12 */ 87 SYSCFG_PIN_13 = ((uint8_t)0x0D), /*!< Pin Source 13 */ 88 SYSCFG_PIN_14 = ((uint8_t)0x0E), /*!< Pin Source 14 */ 89 SYSCFG_PIN_15 = ((uint8_t)0x0F), /*!< Pin Source 15 */ 90 } SYSCFG_PIN_T; 91 92 /** 93 * @brief SYSCFG Memory Remap Config 94 */ 95 typedef enum 96 { 97 SYSCFG_MEMORY_REMAP_FMC = ((uint8_t)0x00), /*!< SYSCFG MemoryRemap Flash */ 98 SYSCFG_MEMORY_REMAP_SYSTEM = ((uint8_t)0x01), /*!< SYSCFG MemoryRemap SystemMemory */ 99 SYSCFG_MEMORY_REMAP_SRAM = ((uint8_t)0x03), /*!< SYSCFG MemoryRemap SRAM */ 100 } SYSCFG_MEMORY_REMAP_T; 101 102 /** 103 * @brief SYSCFG DMA Remap Config 104 */ 105 typedef enum 106 { 107 SYSCFG_DAM_REMAP_ADC = ((uint32_t)0x00000100), /*!< ADC DMA remap */ 108 SYSCFG_DAM_REMAP_USART1TX = ((uint32_t)0x00000200), /*!< USART1 TX DMA remap */ 109 SYSCFG_DAM_REMAP_USART1RX = ((uint32_t)0x00000400), /*!< USART1 RX DMA remap */ 110 SYSCFG_DAM_REMAP_TMR16 = ((uint32_t)0x00000800), /*!< Timer 16 DMA remap */ 111 SYSCFG_DAM_REMAP_TMR17 = ((uint32_t)0x00001000), /*!< Timer 17 DMA remap */ 112 SYSCFG_DAM_REMAP_TMR16_2 = ((uint32_t)0x00002000), /*!< Timer 16 DMA remap2(only for APM32F072) */ 113 SYSCFG_DAM_REMAP_TMR17_2 = ((uint32_t)0x00004000), /*!< Timer 17 DMA remap2(only for APM32F072) */ 114 SYSCFG_DAM_REMAP_SPI2 = ((uint32_t)0x01000000), /*!< SPI2 DMA remap(only for APM32F072) */ 115 SYSCFG_DAM_REMAP_USART2 = ((uint32_t)0x02000000), /*!< USART2 DMA remap(only for APM32F072) */ 116 SYSCFG_DAM_REMAP_USART3 = ((uint32_t)0x04000000), /*!< USART3 DMA remap(only for APM32F072) */ 117 SYSCFG_DAM_REMAP_I2C1 = ((uint32_t)0x08000000), /*!< I2C1 DMA remap(only for APM32F072) */ 118 SYSCFG_DAM_REMAP_TMR1 = ((uint32_t)0x10000000), /*!< TMR1 DMA remap(only for APM32F072) */ 119 SYSCFG_DAM_REMAP_TMR2 = ((uint32_t)0x20000000), /*!< TMR2 DMA remap(only for APM32F072) */ 120 SYSCFG_DAM_REMAP_TMR3 = ((uint32_t)0x40000000), /*!< TMR3 DMA remap(only for APM32F072) */ 121 } SYSCFG_DAM_REMAP_T; 122 123 /** 124 * @brief SYSCFG I2C FastModePlus Config 125 */ 126 typedef enum 127 { 128 SYSCFG_I2C_FMP_PB6 = ((uint32_t)0x00010000), /*!< I2C PB6 Fast mode plus */ 129 SYSCFG_I2C_FMP_PB7 = ((uint32_t)0x00020000), /*!< I2C PB7 Fast mode plus */ 130 SYSCFG_I2C_FMP_PB8 = ((uint32_t)0x00040000), /*!< I2C PB8 Fast mode plus */ 131 SYSCFG_I2C_FMP_PB9 = ((uint32_t)0x00080000), /*!< I2C PB9 Fast mode plus */ 132 SYSCFG_I2C_FMP_I2C1 = ((uint32_t)0x00100000), /*!< Enable Fast Mode Plus on PB10, PB11, PF6 and PF7(only for APM32F030) */ 133 SYSCFG_I2C_FMP_I2C2 = ((uint32_t)0x00200000), /*!< Enable Fast Mode Plus on I2C2 pins(only for APM32F072 and APM32F091) */ 134 SYSCFG_I2C_FMP_PA9 = ((uint32_t)0x00400000), /*!< I2C PA9 Fast mode plus(only for APM32F030 and APM32F091) */ 135 SYSCFG_I2C_FMP_PA10 = ((uint32_t)0x00800000), /*!< I2C PA10 Fast mode plus(only for APM32F030 and APM32F091) */ 136 } SYSCFG_I2C_FMP_T; 137 138 /** 139 * @brief SYSCFG Lock Config 140 */ 141 typedef enum 142 { 143 SYSCFG_LOCK_LOCKUP = ((uint32_t)0x00000001), /*!< Cortex-M0 LOCKUP bit enable */ 144 SYSCFG_LOCK_SRAM = ((uint32_t)0x00000002), /*!< SRAM parity lock bit */ 145 SYSCFG_LOCK_PVD = ((uint32_t)0x00000004), /*!< PVD lock enable bit, not available for APM32F030 devices */ 146 } SYSCFG_LOCK_T; 147 148 /** 149 * @brief IRDA ENV SOURCE 150 */ 151 typedef enum 152 { 153 SYSCFG_IRDA_ENV_TMR16 = ((uint32_t)0x000000C0), /*!< Timer16 as IRDA Modulation envelope source */ 154 SYSCFG_IRDA_ENV_USART1 = ((uint32_t)0x00000040), /*!< USART1 as IRDA Modulation envelope source */ 155 SYSCFG_IRDA_ENV_USART4 = ((uint32_t)0x00000080), /*!< USART4 as IRDA Modulation envelope source */ 156 } SYSCFG_IRDA_ENV_T; 157 158 /** 159 * @brief SYSCFG flag 160 */ 161 typedef enum 162 { 163 SYSCFG_CFG2_SRAMPEF = ((uint32_t)0x00000100), /*!< SRAM Parity error flag */ 164 } SYSCFG_FLAG_T; 165 166 /**@} end of group SYSCFG_Enumerations*/ 167 168 /** @defgroup SYSCFG_Structures Structures 169 @{ 170 */ 171 172 /**@} end of group SYSCFG_Structures */ 173 174 /** @defgroup SYSCFG_Variables Variables 175 @{ 176 */ 177 178 /**@} end of group SYSCFG_Variables */ 179 180 /** @defgroup SYSCFG_Functions Functions 181 @{ 182 */ 183 /* Reset */ 184 void SYSCFG_Reset(void); 185 186 /* Memory Remap selects */ 187 void SYSCFG_MemoryRemapSelect(uint8_t memory); 188 189 /* DMA Channel Remap */ 190 void SYSCFG_EnableDMAChannelRemap(uint32_t channel); 191 void SYSCFG_DisableDMAChannelRemap(uint32_t channel); 192 193 /* I2C Fast Mode Plus */ 194 void SYSCFG_EnableI2CFastModePlus(uint32_t pin); 195 void SYSCFG_DisableI2CFastModePlus(uint32_t pin); 196 197 /* IRDA Envelope */ 198 void SYSCFG_SelectIRDAEnv(SYSCFG_IRDA_ENV_T IRDAEnv); 199 200 /* Eint Line */ 201 void SYSCFG_EINTLine(SYSCFG_PORT_T port, SYSCFG_PIN_T pin); 202 203 /* Break lock */ 204 void SYSCFG_BreakLock(uint32_t lock); 205 206 /* Flag */ 207 uint8_t SYSCFG_ReadStatusFlag(uint32_t flag); 208 void SYSCFG_ClearStatusFlag(uint8_t flag); 209 210 #ifdef __cplusplus 211 } 212 #endif 213 214 #endif /* __APM32F0XX_SYSCFG_H */ 215 216 /**@} end of group SYSCFG_Functions */ 217 /**@} end of group SYSCFG_Driver */ 218 /**@} end of group APM32F0xx_StdPeriphDriver */ 219 220