1 /*!
2  * @file        apm32f4xx_i2c.h
3  *
4  * @brief       This file contains all the functions prototypes for the I2C firmware library
5  *
6  * @version     V1.0.2
7  *
8  * @date        2022-06-23
9  *
10  * @attention
11  *
12  *  Copyright (C) 2021-2022 Geehy Semiconductor
13  *
14  *  You may not use this file except in compliance with the
15  *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
16  *
17  *  The program is only for reference, which is distributed in the hope
18  *  that it will be usefull and instructional for customers to develop
19  *  their software. Unless required by applicable law or agreed to in
20  *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
21  *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
22  *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
23  *  and limitations under the License.
24  */
25 
26 /* Define to prevent recursive inclusion */
27 #ifndef __APM32F4XX_I2C_H
28 #define __APM32F4XX_I2C_H
29 
30 #ifdef __cplusplus
31   extern "C" {
32 #endif
33 
34 /* Includes */
35 #include "apm32f4xx.h"
36 
37 /** @addtogroup APM32F4xx_StdPeriphDriver
38   @{
39 */
40 
41 /** @addtogroup I2C_Driver
42   @{
43 */
44 
45 /** @defgroup I2C_Enumerations
46   @{
47 */
48 
49 /**
50  * @brief I2C Mode
51  */
52 typedef enum
53 {
54     I2C_MODE_I2C          = 0x0000, /*!< I2C mode */
55     I2C_MODE_SMBUUSDEVICE = 0x0002, /*!< SMBus device mode */
56     I2C_MODE_SMBUSHOST    = 0x000A  /*!< SMBus host mode */
57 } I2C_MODE_T;
58 
59 /**
60  * @brief I2C duty cycle in fast mode
61  */
62 typedef enum
63 {
64     I2C_DUTYCYCLE_16_9 = 0x4000,    /*!< I2C fast mode Tlow/Thigh = 16/9 */
65     I2C_DUTYCYCLE_2    = 0xBFFF     /*!< I2C fast mode Tlow/Thigh = 2 */
66 } I2C_DUTYCYCLE_T;
67 
68 /**
69  * @brief I2C acknowledgement
70  */
71 typedef enum
72 {
73     I2C_ACK_DISABLE,    /*!< Send acknowledge */
74     I2C_ACK_ENABLE      /*!< Do not send acknowledge */
75 } I2C_ACK_T;
76 
77 /**
78  * @brief I2C transfer direction
79  */
80 
81 typedef enum
82 {
83     I2C_DIRECTION_TX,   /*!< Transmitter mode */
84     I2C_DIRECTION_RX    /*!< Receiver mode */
85 } I2C_DIRECTION_T;
86 
87 /**
88  * @brief I2C acknowledged address
89  */
90 typedef enum
91 {
92     I2C_ACK_ADDRESS_7BIT  = 0x4000, /*!< Set slave address length to 7-bit */
93     I2C_ACK_ADDRESS_10BIT = 0xC000  /*!< Set slave address length to 10-bit */
94 } I2C_ACK_ADDRESS_T;
95 
96 /**
97  * @brief I2C Register
98  */
99 typedef enum
100 {
101     I2C_REGISTER_CTRL1,     /*!< CTRL1 register */
102     I2C_REGISTER_CTRL2,     /*!< CTRL2 register */
103     I2C_REGISTER_SADDR1,    /*!< SADDR1 register */
104     I2C_REGISTER_SADDR2,    /*!< SADDR2 register */
105     I2C_REGISTER_DATA,      /*!< DATA register */
106     I2C_REGISTER_STS1,      /*!< STS1 register */
107     I2C_REGISTER_STS2,      /*!< STS2 register */
108     I2C_REGISTER_CLKCTRL,   /*!< CLKCTRL register */
109     I2C_REGISTER_RISETMAX,  /*!< RISETMAX register */
110 } I2C_REGISTER_T;
111 
112 /**
113  * @brief I2C NCAK position
114  */
115 typedef enum
116 {
117     I2C_NACK_POSITION_NEXT,     /*!< Set NACK signal to next receive byte */
118     I2C_NACK_POSITION_CURRENT   /*!< Set NACK signal to current receive byte */
119 } I2C_NACK_POSITION_T;
120 
121 /**
122  * @brief I2C SMBus alert pin level
123  */
124 typedef enum
125 {
126     I2C_SMBUSALER_LOW,  /*!< SMBus Alert pin low */
127     I2C_SMBUSALER_HIGH  /*!< SMBus Alert pin high */
128 } I2C_SMBUSALER_T;
129 
130 /**
131  * @brief I2C PEC position
132  */
133 typedef enum
134 {
135     I2C_PEC_POSITION_NEXT,      /*!< Indicates that the next byte is PEC */
136     I2C_PEC_POSITION_CURRENT    /*!< Indicates that current byte is PEC */
137 } I2C_PEC_POSITION_T;
138 
139 /**
140  * @brief I2C interrupts definition
141  */
142 typedef enum
143 {
144     I2C_INT_BUF = 0x0400,   /*!< Buffer interrupt */
145     I2C_INT_EVT = 0x0200,   /*!< Event interrupt */
146     I2C_INT_ERR = 0x0100    /*!< Error interrupt */
147 } I2C_INT_T;
148 
149 /**
150  * @brief I2C interrupt
151  */
152 typedef enum
153 {
154     I2C_INT_FLAG_SMBALT  = 0x01008000,  /*!< SMBus Alert flag */
155     I2C_INT_FLAG_TTE     = 0x01004000,  /*!< Timeout or Tlow error flag */
156     I2C_INT_FLAG_PECE    = 0x01001000,  /*!< PEC error in reception flag */
157     I2C_INT_FLAG_OVRUR   = 0x01000800,  /*!< Overrun/Underrun flag (Slave mode) */
158     I2C_INT_FLAG_AE      = 0x01000400,  /*!< Acknowledge error flag */
159     I2C_INT_FLAG_AL      = 0x01000200,  /*!< Arbitration lost flag (Master mode) */
160     I2C_INT_FLAG_BERR    = 0x01000100,  /*!< Bus error flag */
161     I2C_INT_FLAG_TXBE    = 0x06000080,  /*!< Transmitter data register empty flag */
162     I2C_INT_FLAG_RXBNE   = 0x06000040,  /*!< Receiver data register not empty flag */
163     I2C_INT_FLAG_STOP    = 0x02000010,  /*!< Stop detection flag (Slave mode) */
164     I2C_INT_FLAG_ADDR10  = 0x02000008,  /*!< 10-bit header sent flag (Master mode) */
165     I2C_INT_FLAG_BTC     = 0x02000004,  /*!< Byte transfer complete flag */
166     I2C_INT_FLAG_ADDR    = 0x02000002,  /*!< Address sent flag (Master mode) */
167     I2C_INT_FLAG_START   = 0x02000001,  /*!< Start bit flag (Master mode) */
168 } I2C_INT_FLAG_T;
169 
170 /**
171  * @brief I2C  flags
172  */
173 typedef enum
174 {
175     /* STS2 register flags */
176     I2C_FLAG_DUALADDR,      /*!< Dual flag (Slave mode) */
177     I2C_FLAG_SMMHADDR,      /*!< SMBus host header (Slave mode) */
178     I2C_FLAG_SMBDADDR,      /*!< SMBus default header (Slave mode) */
179     I2C_FLAG_GENCALL,       /*!< General call header flag (Slave mode) */
180     I2C_FLAG_TR,            /*!< Transmitter/Receiver flag */
181     I2C_FLAG_BUSBSY,        /*!< Bus busy flag */
182     I2C_FLAG_MS,            /*!< Master/Slave flag */
183 
184     /* STS1 register flags */
185     I2C_FLAG_SMBALT,        /*!< SMBus Alert flag */
186     I2C_FLAG_TTE,           /*!< Timeout or Tlow error flag */
187     I2C_FLAG_PECE,          /*!< PEC error in reception flag */
188     I2C_FLAG_OVRUR,         /*!< Overrun/Underrun flag (Slave mode) */
189     I2C_FLAG_AE,            /*!< Acknowledge error flag */
190     I2C_FLAG_AL,            /*!< Arbitration lost flag (Master mode) */
191     I2C_FLAG_BERR,          /*!< Bus error flag */
192     I2C_FLAG_TXBE,          /*!< Transmitter data register empty flag */
193     I2C_FLAG_RXBNE,         /*!< Receiver data register not empty flag */
194     I2C_FLAG_STOP,          /*!< Stop detection flag (Slave mode) */
195     I2C_FLAG_ADDR10,        /*!< 10-bit header sent flag (Master mode) */
196     I2C_FLAG_BTC,           /*!< Byte transfer complete flag */
197     I2C_FLAG_ADDR,          /*!< Address sent flag (Master mode) */
198     I2C_FLAG_START,         /*!< Start bit flag (Master mode) */
199 } I2C_FLAG_T;
200 
201 /**
202  * @brief I2C Events
203  */
204 typedef enum
205 {
206     /* I2C Master Events */
207     /* Event 5: Communication start event */
208     I2C_EVENT_MASTER_MODE_SELECT                       = 0x00030001,  /*!< BUSBSYFLG, MSFLG and STARTFLG flag */
209 
210     /* Event 6: 7-bit Address Acknowledge
211        in case of master receiver
212      */
213     I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED         = 0x00070082,  /*!< BUSBSYFLG, MSFLG, ADDRFLG, TXBEFLG and TRFLG flags */
214     I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED            = 0x00030002,  /*!< BUSBSYFLG, MSFLG and ADDRFLG flags */
215     /* Event 9: Master has sent the first byte
216        in 10-bit address mode
217      */
218     I2C_EVENT_MASTER_MODE_ADDRESS10                    = 0x00030008,  /*!< BUSBSYFLG, MSFLG and ADDR10FLG flags */
219 
220     /* Master RECEIVER mode */
221     /* Event 7 */
222     I2C_EVENT_MASTER_BYTE_RECEIVED                     = 0x00030040,  /*!< BUSBSYFLG, MSFLG and RXBNEFLG flags */
223 
224     /* Master TRANSMITTER mode */
225     /* Event 8 */
226     I2C_EVENT_MASTER_BYTE_TRANSMITTING                 = 0x00070080,  /*!< TRFLG, BUSBSYFLG, MSFLG, TXBEFLG flags */
227     /* Event 8_2 */
228     I2C_EVENT_MASTER_BYTE_TRANSMITTED                  = 0x00070084,  /*!< TRFLG, BUSBSYFLG, MSFLG, TXBEFLG and BTCFLG flags */
229 
230 
231     /* EV1 (all the events below are variants of EV1) */
232     /* 1, Case of One Single Address managed by the slave */
233     I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED           = 0x00020002, /*!< BUSBSYFLG and ADDRFLG flags */
234     I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED        = 0x00060082, /*!< TRFLG, BUSBSYFLG, TXBEFLG and ADDRFLG flags */
235 
236     /* 2, Case of Dual address managed by the slave */
237     I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED     = 0x00820000, /*!< DUALF and BUSBSYFLG flags */
238     I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED  = 0x00860080, /*!< DUALF, TRFLG, BUSBSYFLG and TXBEFLG flags */
239 
240     /* 3, Case of General Call enabled for the slave */
241     I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED         = 0x00120000, /*!< GENCALL and BUSBSYFLG flags */
242 
243 
244     /* Slave RECEIVER mode */
245     /* EV2 */
246     I2C_EVENT_SLAVE_BYTE_RECEIVED                      = 0x00020040, /*!< BUSBSYFLG and RXBNEFLG flags */
247     I2C_EVENT_SLAVE_BYTE_RECEIVED1                     = 0x00820040, /*!< DUALADDRFLG, BUSBSYFLG and RXBNEFLG flags */
248     I2C_EVENT_SLAVE_BYTE_RECEIVED2                     = 0x00120040, /*!< GENCALLFLG, BUSBSYFLG and RXBNEFLG flags */
249     /* EV4  */
250     I2C_EVENT_SLAVE_STOP_DETECTED                      = 0x00000010, /*!< STOPFLG flag */
251 
252     /* Slave TRANSMITTER mode */
253     /* EV3 */
254     I2C_EVENT_SLAVE_BYTE_TRANSMITTED                   = 0x00060084, /*!< TRFLG, BUSBSYFLG, TXBEFLG and BTCFLG flags */
255     I2C_EVENT_SLAVE_BYTE_TRANSMITTED1                  = 0x00860084, /*!< DUALADDRFLG, TRFLG, BUSBSYFLG, TXBEFLG and BTCFLG flags */
256     I2C_EVENT_SLAVE_BYTE_TRANSMITTED2                  = 0x00160084, /*!< GENCALLFLG, TRFLG, BUSBSYFLG, TXBEFLG and BTCFLG flags */
257     I2C_EVENT_SLAVE_BYTE_TRANSMITTING                  = 0x00060080, /*!< TRFLG, BUSBSYFLG and TXBEFLG flags */
258     /* EV3_2 */
259     I2C_EVENT_SLAVE_ACK_FAILURE                        = 0x00000400, /*!< AEFLG flag */
260 } I2C_EVENT_T;
261 
262 /**@} end of group I2C_Enumerations*/
263 
264 /** @addtogroup I2C_Structure Data Structure
265   @{
266 */
267 
268 /**
269  * @brief I2C Config structure definition
270  */
271 typedef struct
272 {
273     uint32_t            clockSpeed;     /*!< I2C clock speed */
274     I2C_MODE_T          mode;           /*!< I2C mode */
275     I2C_DUTYCYCLE_T     dutyCycle;      /*!< I2C duty cycle */
276     uint16_t            ownAddress1;    /*!< I2C own address */
277     I2C_ACK_T           ack;            /*!< Acknowledge */
278     I2C_ACK_ADDRESS_T   ackAddress;     /*!< I2C acknowledged address */
279 } I2C_Config_T;
280 
281 /**@} end of group I2C_Structure*/
282 
283 /** @defgroup I2C_Functions
284   @{
285 */
286 
287 /* I2C reset and configuration */
288 void I2C_Reset(I2C_T* i2c);
289 void I2C_Config(I2C_T* i2c, I2C_Config_T* i2cConfig);
290 void I2C_ConfigStructInit(I2C_Config_T* i2cConfig);
291 void I2C_Enable(I2C_T* i2c);
292 void I2C_Disable(I2C_T* i2c);
293 void I2C_EnableGenerateStart(I2C_T* i2c);
294 void I2C_DisableGenerateStart(I2C_T* i2c);
295 void I2C_EnableGenerateStop(I2C_T* i2c);
296 void I2C_DisableGenerateStop(I2C_T* i2c);
297 void I2C_EnableAcknowledge(I2C_T* i2c);
298 void I2C_DisableAcknowledge(I2C_T* i2c);
299 void I2C_ConfigOwnAddress2(I2C_T* i2c, uint8_t address);
300 void I2C_EnableDualAddress(I2C_T* i2c);
301 void I2C_DisableDualAddress(I2C_T* i2c);
302 void I2C_EnableGeneralCall(I2C_T* i2c);
303 void I2C_DisableGeneralCall(I2C_T* i2c);
304 void I2C_EnableSoftwareReset(I2C_T* i2c);
305 void I2C_DisableSoftwareReset(I2C_T* i2c);
306 void I2C_EnableStretchClock(I2C_T* i2c);
307 void I2C_DisableStretchClock(I2C_T* i2c);
308 void I2C_ConfigFastModeDutyCycle(I2C_T* i2c, I2C_DUTYCYCLE_T dutyCycle);
309 void I2C_ConfigNACKPosition(I2C_T* i2c, I2C_NACK_POSITION_T NACKPosition);
310 void I2C_ConfigSMBusAlert(I2C_T* i2c, I2C_SMBUSALER_T SMBusState);
311 void I2C_EnableARP(I2C_T* i2c);
312 void I2C_DisableARP(I2C_T* i2c);
313 uint16_t I2C_ReadRegister(I2C_T* i2c, I2C_REGISTER_T i2cRegister);
314 
315 /* Transmit Configuration */
316 void I2C_TxData(I2C_T* i2c, uint8_t data);
317 uint8_t I2C_RxData(I2C_T* i2c);
318 void I2C_Tx7BitAddress(I2C_T* i2c, uint8_t address, I2C_DIRECTION_T direction);
319 
320 /* PEC */
321 void I2C_EnablePECTransmit(I2C_T* i2c);
322 void I2C_DisablePECTransmit(I2C_T* i2c);
323 void I2C_ConfigPECPosition(I2C_T* i2c, I2C_PEC_POSITION_T PECPosition);
324 void I2C_EnablePEC(I2C_T* i2c);
325 void I2C_DisablePEC(I2C_T* i2c);
326 uint8_t I2C_ReadPEC(I2C_T* i2c);
327 
328 /* DMA */
329 void I2C_EnableDMA(I2C_T* i2c);
330 void I2C_DisableDMA(I2C_T* i2c);
331 void I2C_EnableDMALastTransfer(I2C_T* i2c);
332 void I2C_DisableDMALastTransfer(I2C_T* i2c);
333 
334 /* Interrupts and flags */
335 void I2C_EnableInterrupt(I2C_T* i2c, uint16_t interrupt);
336 void I2C_DisableInterrupt(I2C_T* i2c, uint16_t interrupt);
337 uint8_t  I2C_ReadEventStatus(I2C_T* i2c, I2C_EVENT_T i2cEvent);
338 uint32_t I2C_ReadLastEvent(I2C_T* i2c);
339 uint8_t I2C_ReadStatusFlag(I2C_T* i2c, I2C_FLAG_T flag);
340 void I2C_ClearStatusFlag(I2C_T* i2c, I2C_FLAG_T flag);
341 uint8_t I2C_ReadIntFlag(I2C_T* i2c, I2C_INT_FLAG_T flag);
342 void I2C_ClearIntFlag(I2C_T* i2c, uint32_t flag);
343 
344 #ifdef __cplusplus
345 }
346 #endif
347 
348 #endif /* __APM32F4XX_I2C_H */
349 
350 /**@} end of group I2C_Enumerations */
351 /**@} end of group I2C_Driver */
352 /**@} end of group APM32F4xx_StdPeriphDriver */
353