1 /*! 2 * @file apm32s10x_spi.h 3 * 4 * @brief This file contains all the functions prototypes for the SPI firmware library 5 * 6 * @version V1.0.1 7 * 8 * @date 2022-12-31 9 * 10 * @attention 11 * 12 * Copyright (C) 2022-2023 Geehy Semiconductor 13 * 14 * You may not use this file except in compliance with the 15 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE). 16 * 17 * The program is only for reference, which is distributed in the hope 18 * that it will be usefull and instructional for customers to develop 19 * their software. Unless required by applicable law or agreed to in 20 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT 21 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions 23 * and limitations under the License. 24 */ 25 26 /* Define to prevent recursive inclusion */ 27 #ifndef __APM32S10X_SPI_H 28 #define __APM32S10X_SPI_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 /* Includes */ 35 #include "apm32s10x.h" 36 37 /** @addtogroup APM32S10x_StdPeriphDriver 38 @{ 39 */ 40 41 /** @addtogroup SPI_Driver SPI Driver 42 @{ 43 */ 44 45 /** @defgroup SPI_Enumerations Enumerations 46 @{ 47 */ 48 49 /** 50 * @brief SPI data direction mode 51 */ 52 typedef enum 53 { 54 SPI_DIRECTION_2LINES_FULLDUPLEX = 0x0000, 55 SPI_DIRECTION_2LINES_RXONLY = 0x0400, 56 SPI_DIRECTION_1LINE_RX = 0x8000, 57 SPI_DIRECTION_1LINE_TX = 0xC000 58 } SPI_DIRECTION_T; 59 60 /** 61 * @brief SPI mode 62 */ 63 typedef enum 64 { 65 SPI_MODE_MASTER = 0x0104, 66 SPI_MODE_SLAVE = 0x0000 67 } SPI_MODE_T; 68 69 /** 70 * @brief SPI Data length 71 */ 72 typedef enum 73 { 74 SPI_DATA_LENGTH_16B = 0x0800, 75 SPI_DATA_LENGTH_8B = 0x0000 76 } SPI_DATA_LENGTH_T; 77 78 /** 79 * @brief SPI Clock Polarity 80 */ 81 typedef enum 82 { 83 SPI_CLKPOL_LOW = 0x0000, 84 SPI_CLKPOL_HIGH = 0x0002 85 } SPI_CLKPOL_T; 86 87 /** 88 * @brief SPI Clock Phase 89 */ 90 typedef enum 91 { 92 SPI_CLKPHA_1EDGE = 0x0000, 93 SPI_CLKPHA_2EDGE = 0x0001 94 } SPI_CLKPHA_T; 95 96 /** 97 * @brief SPI Slave Select management 98 */ 99 typedef enum 100 { 101 SPI_NSS_SOFT = 0x0200, 102 SPI_NSS_HARD = 0x0000 103 } SPI_NSS_T; 104 105 /** 106 * @brief SPI BaudRate Prescaler 107 */ 108 typedef enum 109 { 110 SPI_BAUDRATE_DIV_2 = 0x0000, 111 SPI_BAUDRATE_DIV_4 = 0x0008, 112 SPI_BAUDRATE_DIV_8 = 0x0010, 113 SPI_BAUDRATE_DIV_16 = 0x0018, 114 SPI_BAUDRATE_DIV_32 = 0x0020, 115 SPI_BAUDRATE_DIV_64 = 0x0028, 116 SPI_BAUDRATE_DIV_128 = 0x0030, 117 SPI_BAUDRATE_DIV_256 = 0x0038, 118 } SPI_BAUDRATE_DIV_T; 119 120 /** 121 * @brief SPI MSB LSB transmission 122 */ 123 typedef enum 124 { 125 SPI_FIRSTBIT_MSB = 0x0000, 126 SPI_FIRSTBIT_LSB = 0x0080 127 } SPI_FIRSTBIT_T; 128 129 /** 130 * @brief SPI Direction select 131 */ 132 typedef enum 133 { 134 SPI_DIRECTION_RX = 0xBFFF, 135 SPI_DIRECTION_TX = 0x4000 136 } SPI_DIRECTION_SELECT_T; 137 138 /** 139 * @brief SPI interrupts definition 140 */ 141 typedef enum 142 { 143 SPI_INT_TXBE = 0x8002, 144 SPI_INT_RXBNE = 0x4001, 145 SPI_INT_ERR = 0x2000, 146 SPI_INT_OVR = 0x2040, 147 SPI_INT_CRCE = 0x2010, 148 SPI_INT_ME = 0x2020, 149 SPI_INT_UDR = 0x2008 150 } SPI_INT_T; 151 152 /** 153 * @brief SPI flags definition 154 */ 155 typedef enum 156 { 157 SPI_FLAG_RXBNE = 0x0001, 158 SPI_FLAG_TXBE = 0x0002, 159 SPI_FLAG_SCHDIR = 0x0004, 160 SPI_FLAG_UDR = 0x0008, 161 SPI_FLAG_CRCE = 0x0010, 162 SPI_FLAG_ME = 0x0020, 163 SPI_FLAG_OVR = 0x0040, 164 SPI_FLAG_BSY = 0x0080 165 } SPI_FLAG_T; 166 167 /** 168 * @brief SPI DMA requests 169 */ 170 typedef enum 171 { 172 SPI_DMA_REQ_TX = 0x0002, 173 SPI_DMA_REQ_RX = 0x0001 174 } SPI_DMA_REQ_T; 175 176 /**@} end of group SPI_Enumerations */ 177 178 /** @defgroup SPI_Structures Structures 179 @{ 180 */ 181 182 /** 183 * @brief SPI Configure structure definition 184 */ 185 typedef struct 186 { 187 SPI_MODE_T mode; 188 SPI_DATA_LENGTH_T length; 189 SPI_CLKPHA_T phase; 190 SPI_CLKPOL_T polarity; 191 SPI_NSS_T nss; 192 SPI_FIRSTBIT_T firstBit; 193 SPI_DIRECTION_T direction; 194 SPI_BAUDRATE_DIV_T baudrateDiv; 195 uint16_t crcPolynomial; 196 } SPI_Config_T; 197 198 /**@} end of group SPI_Structures */ 199 200 /** @defgroup SPI_Functions Functions 201 @{ 202 */ 203 204 /* Reset and Configuration */ 205 void SPI_Reset(SPI_T* spi); 206 void SPI_Config(SPI_T* spi, SPI_Config_T* spiConfig); 207 void SPI_ConfigStructInit(SPI_Config_T* spiConfig); 208 void SPI_Enable(SPI_T* spi); 209 void SPI_Disable(SPI_T* spi); 210 211 void SPI_TxData(SPI_T* spi, uint16_t data); 212 uint16_t SPI_RxData(SPI_T* spi); 213 void SPI_SetSoftwareNSS(SPI_T* spi); 214 void SPI_ResetSoftwareNSS(SPI_T* spi); 215 void SPI_EnableSSOutput(SPI_T* spi); 216 void SPI_DisableSSOutput(SPI_T* spi); 217 void SPI_ConfigDataSize(SPI_T* spi, SPI_DATA_LENGTH_T length); 218 219 /* DMA */ 220 void SPI_EnableDMA(SPI_T* spi, SPI_DMA_REQ_T dmaReq); 221 void SPI_DisableDMA(SPI_T* spi, SPI_DMA_REQ_T dmaReq); 222 223 /* CRC */ 224 void SPI_TxCRC(SPI_T* spi); 225 void SPI_EnableCRC(SPI_T* spi); 226 void SPI_DisableCRC(SPI_T* spi); 227 uint16_t SPI_ReadTxCRC(SPI_T* spi); 228 uint16_t SPI_ReadRxCRC(SPI_T* spi); 229 uint16_t SPI_ReadCRCPolynomial(SPI_T* spi); 230 void SPI_ConfigBiDirectionalLine(SPI_T* spi, SPI_DIRECTION_SELECT_T direction); 231 232 /* Interrupts and flag */ 233 void SPI_EnableInterrupt(SPI_T* spi, SPI_INT_T interrupt); 234 void SPI_DisableInterrupt(SPI_T* spi, SPI_INT_T interrupt); 235 uint8_t SPI_ReadStatusFlag(SPI_T* spi, SPI_FLAG_T flag); 236 void SPI_ClearStatusFlag(SPI_T* spi, SPI_FLAG_T flag); 237 uint8_t SPI_ReadIntFlag(SPI_T* spi, SPI_INT_T flag); 238 void SPI_ClearIntFlag(SPI_T* spi, SPI_INT_T flag); 239 240 /**@} end of group SPI_Functions */ 241 /**@} end of group SPI_Driver */ 242 /**@} end of group APM32S10x_StdPeriphDriver */ 243 244 #ifdef __cplusplus 245 } 246 #endif 247 248 #endif /* __APM32S10X_SPI_H */ 249