1 /*
2 * Copyright (c) 2006-2020, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2020-08-19 lizhirui first version
9 */
10
11 #ifndef __ATA_INTERFACE_H__
12 #define __ATA_INTERFACE_H__
13
14 typedef rt_uint8_t u8;
15 typedef rt_uint16_t u16;
16 typedef rt_uint32_t u32;
17 typedef rt_uint64_t u64;
18 typedef rt_uint64_t ulong;
19
20 typedef rt_int8_t s8;
21 typedef rt_int16_t s16;
22 typedef rt_int32_t s32;
23 typedef rt_int64_t s64;
24
25 typedef rt_size_t lbaint_t;
26
27 #define __iomem
28 #define mdelay rt_thread_mdelay
29 #define udelay(...) rt_thread_mdelay(1)
30
31 #define cpu_to_le32
32 #define cpu_to_le16
33 #define le32_to_cpu
34 #define le16_to_cpu
35
36 #define flush_cache(...)
37 #define invalidate_dcache_range(...)
38
39 #define ARCH_DMA_MINALIGN 1024
40
41 #define CONFIG_IS_ENABLED
42 #define AHCI 1
43
44 #define VADDR_TO_PHY(vaddr) (((u64)vaddr) - KSEG0BASE)
45 #define LOW_PHY(vaddr) ((u32)VADDR_TO_PHY(vaddr))
46 #define HIGH_PHY(vaddr) ((u32)((VADDR_TO_PHY(vaddr)) >> 32))
47
48 #define ALIGN_1(x, a) __ALIGN_MASK((x), (typeof(x))(a)-1)
49 #define ALIGN_DOWN(x, a) ALIGN_1((x) - ((a)-1), (a))
50 #define __ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask))
51 #define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a)))
52 #define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a)-1)) == 0)
53
54 #define ROUND(a, b) (((a) + (b)-1) & ~((b)-1))
55
56 #define PAD_COUNT(s, pad) (((s)-1) / (pad) + 1)
57 #define PAD_SIZE(s, pad) (PAD_COUNT(s, pad) * pad)
58 #define ALLOC_ALIGN_BUFFER_PAD(type, name, size, align, pad) \
59 char __##name[ROUND(PAD_SIZE((size) * sizeof(type), pad), align) + (align - 1)]; \
60 \
61 type *name = (type *)ALIGN_1((rt_ubase_t)__##name, align)
62 #define ALLOC_ALIGN_BUFFER(type, name, size, align) \
63 ALLOC_ALIGN_BUFFER_PAD(type, name, size, align, 1)
64 #define ALLOC_CACHE_ALIGN_BUFFER_PAD(type, name, size, pad) \
65 ALLOC_ALIGN_BUFFER_PAD(type, name, size, ARCH_DMA_MINALIGN, pad)
66 #define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \
67 ALLOC_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN)
68
readl(void * addr)69 static inline u32 readl(void *addr)
70 {
71 return *((u32 *)addr);
72 }
73
writel(u32 data,void * addr)74 static inline void writel(u32 data, void *addr)
75 {
76 *((u32 *)addr) = data;
77 }
78
ffs(int word)79 static inline int ffs(int word)
80 {
81 int r;
82
83 if (word == 0)
84 {
85 return 0;
86 }
87
88 word &= (-word);
89
90 __asm__("clz %0, %1"
91 : "=r"(r)
92 : "r"(word));
93 return 32 - r;
94 }
95
setbits_le32(u32 * addr,u32 value)96 static inline void setbits_le32(u32 *addr, u32 value)
97 {
98 *addr = value;
99 }
100
101 #endif
102