1 #ifndef _BFLB_CLOCK_H
2 #define _BFLB_CLOCK_H
3 
4 #include "bflb_core.h"
5 
6 /** @addtogroup LHAL
7   * @{
8   */
9 
10 /** @addtogroup CLOCK
11   * @{
12   */
13 
14 /** @defgroup BFLB_SYSTEM_CLOCK system clock definition
15   * @{
16   */
17 #define BFLB_SYSTEM_ROOT_CLOCK 0
18 #define BFLB_SYSTEM_CPU_CLK    1
19 #define BFLB_SYSTEM_PBCLK      2
20 #define BFLB_SYSTEM_XCLK       3
21 #define BFLB_SYSTEM_32K_CLK    4
22 /**
23   * @}
24   */
25 
26 #if defined(BL702) || defined(BL602) || defined(BL702L)
27 #define BFLB_GLB_CGEN1_BASE (0x40000000 + 0x24)
28 #elif defined(BL616) || defined(BL606P) || defined(BL808) || defined(BL628)
29 #define BFLB_GLB_CGEN1_BASE (0x20000000 + 0x584)
30 #define BFLB_GLB_CGEN2_BASE (0x20000000 + 0x588)
31 #endif
32 
33 #define PERIPHERAL_CLOCK_ADC_DAC_ENABLE()                         \
34     do {                                                          \
35         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
36         regval |= (1 << 2);                                       \
37         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
38     } while (0)
39 
40 #define PERIPHERAL_CLOCK_SEC_ENABLE()                             \
41     do {                                                          \
42         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
43         regval |= (1 << 4);                                       \
44         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
45     } while (0)
46 
47 #define PERIPHERAL_CLOCK_DMA0_ENABLE()                            \
48     do {                                                          \
49         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
50         regval |= (1 << 12);                                      \
51         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
52     } while (0)
53 
54 #if defined(BL606P) || defined(BL808)
55 #define PERIPHERAL_CLOCK_DMA1_ENABLE()
56 #define PERIPHERAL_CLOCK_DMA2_ENABLE()
57 #endif
58 
59 #define PERIPHERAL_CLOCK_UART0_ENABLE()                           \
60     do {                                                          \
61         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
62         regval |= (1 << 16);                                      \
63         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
64     } while (0)
65 
66 #define PERIPHERAL_CLOCK_UART1_ENABLE()                           \
67     do {                                                          \
68         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
69         regval |= (1 << 17);                                      \
70         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
71     } while (0)
72 
73 #if defined(BL606P) || defined(BL808)
74 #define PERIPHERAL_CLOCK_UART2_ENABLE()
75 #endif
76 
77 #if defined(BL606P) || defined(BL808)
78 #define PERIPHERAL_CLOCK_SPI0_1_ENABLE()                          \
79     do {                                                          \
80         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
81         regval |= (1 << 18);                                      \
82         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
83     } while (0)
84 #else
85 #define PERIPHERAL_CLOCK_SPI0_ENABLE()                            \
86     do {                                                          \
87         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
88         regval |= (1 << 18);                                      \
89         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
90     } while (0)
91 #endif
92 
93 #define PERIPHERAL_CLOCK_I2C0_ENABLE()                            \
94     do {                                                          \
95         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
96         regval |= (1 << 19);                                      \
97         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
98     } while (0)
99 
100 #if defined(BL606P) || defined(BL808)
101 #define PERIPHERAL_CLOCK_I2C1_ENABLE()                            \
102     do {                                                          \
103         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
104         regval |= (1 << 25);                                      \
105         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
106     } while (0)
107 
108 #endif
109 
110 #define PERIPHERAL_CLOCK_PWM0_ENABLE()                            \
111     do {                                                          \
112         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
113         regval |= (1 << 20);                                      \
114         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
115     } while (0)
116 
117 #define PERIPHERAL_CLOCK_TIMER0_1_WDG_ENABLE()                    \
118     do {                                                          \
119         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
120         regval |= (1 << 21);                                      \
121         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
122     } while (0)
123 
124 #define PERIPHERAL_CLOCK_IR_ENABLE()                              \
125     do {                                                          \
126         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
127         regval |= (1 << 22);                                      \
128         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
129     } while (0)
130 
131 #if defined(BL606P) || defined(BL808)
132 #define PERIPHERAL_CLOCK_CAN_UART2_ENABLE()                       \
133     do {                                                          \
134         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
135         regval |= (1 << 26);                                      \
136         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
137     } while (0)
138 #elif defined(BL616) || defined(BL628)
139 #define PERIPHERAL_CLOCK_CAN_ENABLE()                             \
140     do {                                                          \
141         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
142         regval |= (1 << 26);                                      \
143         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
144     } while (0)
145 #endif
146 
147 #if defined(BL702)
148 #define PERIPHERAL_CLOCK_USB_ENABLE()                             \
149     do {                                                          \
150         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
151         regval |= (1 << 28);                                      \
152         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
153     } while (0)
154 
155 #define PERIPHERAL_CLOCK_I2S_ENABLE()                             \
156     do {                                                          \
157         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
158         regval |= (1 << 26);                                      \
159         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
160     } while (0)
161 
162 #elif defined(BL616) || defined(BL606P) || defined(BL808)
163 #define PERIPHERAL_CLOCK_USB_ENABLE()                             \
164     do {                                                          \
165         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
166         regval |= (1 << 13);                                      \
167         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
168     } while (0)
169 
170 #define PERIPHERAL_CLOCK_I2S_ENABLE()                             \
171     do {                                                          \
172         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
173         regval |= (1 << 27);                                      \
174         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
175     } while (0)
176 
177 #endif
178 
179 #if defined(BL616) || defined(BL606P) || defined(BL808) || defined(BL628)
180 #define PERIPHERAL_CLOCK_SDH_ENABLE()                             \
181     do {                                                          \
182         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN2_BASE); \
183         regval |= (1 << 22);                                      \
184         putreg32(regval, BFLB_GLB_CGEN2_BASE);                    \
185     } while (0)
186 #endif
187 
188 #if defined(BL702)
189 #define PERIPHERAL_CLOCK_EMAC_ENABLE()                            \
190     do {                                                          \
191         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
192         regval |= (1 << 13);                                      \
193         putreg32(regval, BFLB_GLB_CGEN1_BASE);                    \
194     } while (0)
195 #elif defined(BL616) || defined(BL606P) || defined(BL808)
196 #define PERIPHERAL_CLOCK_EMAC_ENABLE()                            \
197     do {                                                          \
198         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN2_BASE); \
199         regval |= (1 << 23);                                      \
200         putreg32(regval, BFLB_GLB_CGEN2_BASE);                    \
201     } while (0)
202 #endif
203 
204 #if defined(BL616)
205 #define PERIPHERAL_CLOCK_AUDIO_ENABLE()                           \
206     do {                                                          \
207         volatile uint32_t regval = getreg32(BFLB_GLB_CGEN2_BASE); \
208         regval |= (1 << 21);                                      \
209         putreg32(regval, BFLB_GLB_CGEN2_BASE);                    \
210     } while (0)
211 #endif
212 
213 #ifdef __cplusplus
214 extern "C" {
215 #endif
216 
217 /**
218  * @brief Get system clock frequence
219  *
220  * @param [in] type system clock type
221  * @return frequence
222  */
223 uint32_t bflb_clk_get_system_clock(uint8_t type);
224 
225 /**
226  * @brief Get peripheral clock frequence
227  *
228  * @param [in] type peripheral type
229  * @param [in] idx peripheral index
230  * @return frequence
231  */
232 uint32_t bflb_clk_get_peripheral_clock(uint8_t type, uint8_t idx);
233 
234 #ifdef __cplusplus
235 }
236 #endif
237 
238 /**
239   * @}
240   */
241 
242 /**
243   * @}
244   */
245 
246 #endif