1 #ifndef _BFLB_PLATFORM_DMA_H
2 #define _BFLB_PLATFORM_DMA_H
3 
4 #include "bflb_core.h"
5 
6 /** @addtogroup LHAL
7   * @{
8   */
9 
10 #define PLFM_DMA_CHANNEL_MAX 5
11 
12 /** @addtogroup PLATFORM_DMA
13   * @{
14   */
15 
16 struct bflb_platform_dma_desc {
17     /** Application subsystem address which is used as source address for DMA payload
18       * transfer*/
19     uint32_t src;
20     /** Points to the start of the embedded data buffer associated with this descriptor.
21      *  This address acts as the destination address for the DMA payload transfer*/
22     uint32_t dest;
23     /// Complete length of the buffer in memory
24     uint16_t length;
25     /// Control word for the DMA engine (e.g. for interrupt generation)
26     uint16_t ctrl;
27     /// Pointer to the next element of the chained list
28     uint32_t next;
29 };
30 
31 /// Structure describing the DMA driver environment
32 struct bflb_platform_dma_env_tag {
33     /** last DMA descriptor pushed for each channel, can point to descriptor already
34      * deallocated, but then will not be use`d because root register will be NULL
35      */
36     volatile struct bflb_platform_dma_desc *last_dma[PLFM_DMA_CHANNEL_MAX];
37 };
38 
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42 
43 /**
44  ****************************************************************************************
45  * @brief Initialize the bridge DMA registers
46  *
47  * @param [in]   dev device handle
48  ****************************************************************************************
49  */
50 void bflb_platform_dma_init(struct bflb_device_s *dev);
51 
52 /**
53  ****************************************************************************************
54  * @brief Chains a chained list of descriptors in the DMA
55  *
56  * @param [in]   dev device handle
57  * @param [in]   first First DMA descriptor of the list (filled by the caller)
58  * @param [in]   last last DMA descriptor of the list (filled by the caller)
59  *
60  ****************************************************************************************
61  */
62 void bflb_platform_dma_push(struct bflb_device_s *dev, struct bflb_platform_dma_desc *first, struct bflb_platform_dma_desc *last);
63 
64 /**
65  ****************************************************************************************
66  * @brief Interrupt service routine when a bus error is detected while in a DMA transfer.
67  * This error is considered as fatal and triggers a non-recoverable assertion.
68  *
69  * @param [in]   dev device handle
70  ****************************************************************************************
71  */
72 void bflb_platform_dma_buserr_isr(struct bflb_device_s *dev);
73 
74 /**
75  ****************************************************************************************
76  * @brief Active wait until DMA channel become inactive
77  *
78  * @param [in]   dev device handle
79  ****************************************************************************************
80  */
81 void bflb_platform_dma_wait_eot(struct bflb_device_s *dev);
82 
83 /**
84  ****************************************************************************************
85  * @brief Active wait until DMA channel become inactive
86  *
87  * @param [in]   dev device handle
88  ****************************************************************************************
89  */
90 void bflb_platform_dma_clear_eot(struct bflb_device_s *dev);
91 
92 #ifdef __cplusplus
93 }
94 #endif
95 
96 /**
97   * @}
98   */
99 
100 /**
101   * @}
102   */
103 
104 #endif